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[PARISC] Ensure all ldcw uses are ldcw,co on pa2.0
ldcw,co should always be used on pa2.0, otherwise the strict cache width alignment requirement is not relaxed. Signed-off-by: Kyle McMartin <[email protected]>
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4 changed files with 20 additions and 16 deletions
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@ -48,6 +48,7 @@
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#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
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#ifdef CONFIG_PA20
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#define LDCW ldcw,co
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#define BL b,l
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# ifdef CONFIG_64BIT
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# define LEVEL 2.0w
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@ -55,6 +56,7 @@
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# define LEVEL 2.0
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# endif
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#else
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#define LDCW ldcw
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#define BL bl
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#define LEVEL 1.1
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#endif
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@ -155,13 +155,14 @@ static inline void set_eiem(unsigned long val)
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type and dynamically select the 16-byte aligned int from the array
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for the semaphore. */
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#define __PA_LDCW_ALIGNMENT 16
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#define __ldcw_align(a) ({ \
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unsigned long __ret = (unsigned long) &(a)->lock[0]; \
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__ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \
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(volatile unsigned int *) __ret; \
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#define __PA_LDCW_ALIGNMENT 16
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#define __ldcw_align(a) ({ \
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unsigned long __ret = (unsigned long) &(a)->lock[0]; \
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__ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
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& ~(__PA_LDCW_ALIGNMENT - 1); \
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(volatile unsigned int *) __ret; \
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})
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#define LDCW "ldcw"
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#define __LDCW "ldcw"
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#else /*CONFIG_PA20*/
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/* From: "Jim Hull" <jim.hull of hp.com>
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@ -171,17 +172,18 @@ static inline void set_eiem(unsigned long val)
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they only require "natural" alignment (4-byte for ldcw, 8-byte for
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ldcd). */
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#define __PA_LDCW_ALIGNMENT 4
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#define __PA_LDCW_ALIGNMENT 4
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#define __ldcw_align(a) ((volatile unsigned int *)a)
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#define LDCW "ldcw,co"
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#define __LDCW "ldcw,co"
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#endif /*!CONFIG_PA20*/
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/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
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#define __ldcw(a) ({ \
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unsigned __ret; \
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__asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \
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__ret; \
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#define __ldcw(a) ({ \
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unsigned __ret; \
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__asm__ __volatile__(__LDCW " 0(%1),%0" \
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: "=r" (__ret) : "r" (a)); \
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__ret; \
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})
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#ifdef CONFIG_SMP
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