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ASoC: routing driver update for septenary tdm interface

Browse source 
update routing driver to support septenary tdm interface.

Change-Id: I19a02ac13f1afcdff5b01b06919640fec6d70d1f
Signed-off-by: Cong Tang <congt@codeaurora.org>
This commit is contained in:
Cong Tang 2021-04-05 15:37:54 -04:00
commit 65a3c534ee
2 changed files with 3662 additions and 899 deletions
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2640
asoc/msm-pcm-routing-v2.c Executable file → Normal file
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129
asoc/msm-pcm-routing-v2.h
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@ -185,6 +185,71 @@
#define LPASS_BE_SEN_TDM_TX_6 "SEN_TDM_TX_6"
#define LPASS_BE_SEN_TDM_RX_7 "SEN_TDM_RX_7"
#define LPASS_BE_SEN_TDM_TX_7 "SEN_TDM_TX_7"
#define LPASS_BE_SEP_TDM_RX_0 "SEP_TDM_RX_0"
#define LPASS_BE_SEP_TDM_TX_0 "SEP_TDM_TX_0"
#define LPASS_BE_SEP_TDM_RX_1 "SEP_TDM_RX_1"
#define LPASS_BE_SEP_TDM_TX_1 "SEP_TDM_TX_1"
#define LPASS_BE_SEP_TDM_RX_2 "SEP_TDM_RX_2"
#define LPASS_BE_SEP_TDM_TX_2 "SEP_TDM_TX_2"
#define LPASS_BE_SEP_TDM_RX_3 "SEP_TDM_RX_3"
#define LPASS_BE_SEP_TDM_TX_3 "SEP_TDM_TX_3"
#define LPASS_BE_SEP_TDM_RX_4 "SEP_TDM_RX_4"
#define LPASS_BE_SEP_TDM_TX_4 "SEP_TDM_TX_4"
#define LPASS_BE_SEP_TDM_RX_5 "SEP_TDM_RX_5"
#define LPASS_BE_SEP_TDM_TX_5 "SEP_TDM_TX_5"
#define LPASS_BE_SEP_TDM_RX_6 "SEP_TDM_RX_6"
#define LPASS_BE_SEP_TDM_TX_6 "SEP_TDM_TX_6"
#define LPASS_BE_SEP_TDM_RX_7 "SEP_TDM_RX_7"
#define LPASS_BE_SEP_TDM_TX_7 "SEP_TDM_TX_7"
#define LPASS_BE_HSIF0_TDM_RX_0 "HSIF0_TDM_RX_0"
#define LPASS_BE_HSIF0_TDM_TX_0 "HSIF0_TDM_TX_0"
#define LPASS_BE_HSIF0_TDM_RX_1 "HSIF0_TDM_RX_1"
#define LPASS_BE_HSIF0_TDM_TX_1 "HSIF0_TDM_TX_1"
#define LPASS_BE_HSIF0_TDM_RX_2 "HSIF0_TDM_RX_2"
#define LPASS_BE_HSIF0_TDM_TX_2 "HSIF0_TDM_TX_2"
#define LPASS_BE_HSIF0_TDM_RX_3 "HSIF0_TDM_RX_3"
#define LPASS_BE_HSIF0_TDM_TX_3 "HSIF0_TDM_TX_3"
#define LPASS_BE_HSIF0_TDM_RX_4 "HSIF0_TDM_RX_4"
#define LPASS_BE_HSIF0_TDM_TX_4 "HSIF0_TDM_TX_4"
#define LPASS_BE_HSIF0_TDM_RX_5 "HSIF0_TDM_RX_5"
#define LPASS_BE_HSIF0_TDM_TX_5 "HSIF0_TDM_TX_5"
#define LPASS_BE_HSIF0_TDM_RX_6 "HSIF0_TDM_RX_6"
#define LPASS_BE_HSIF0_TDM_TX_6 "HSIF0_TDM_TX_6"
#define LPASS_BE_HSIF0_TDM_RX_7 "HSIF0_TDM_RX_7"
#define LPASS_BE_HSIF0_TDM_TX_7 "HSIF0_TDM_TX_7"
#define LPASS_BE_HSIF1_TDM_RX_0 "HSIF1_TDM_RX_0"
#define LPASS_BE_HSIF1_TDM_TX_0 "HSIF1_TDM_TX_0"
#define LPASS_BE_HSIF1_TDM_RX_1 "HSIF1_TDM_RX_1"
#define LPASS_BE_HSIF1_TDM_TX_1 "HSIF1_TDM_TX_1"
#define LPASS_BE_HSIF1_TDM_RX_2 "HSIF1_TDM_RX_2"
#define LPASS_BE_HSIF1_TDM_TX_2 "HSIF1_TDM_TX_2"
#define LPASS_BE_HSIF1_TDM_RX_3 "HSIF1_TDM_RX_3"
#define LPASS_BE_HSIF1_TDM_TX_3 "HSIF1_TDM_TX_3"
#define LPASS_BE_HSIF1_TDM_RX_4 "HSIF1_TDM_RX_4"
#define LPASS_BE_HSIF1_TDM_TX_4 "HSIF1_TDM_TX_4"
#define LPASS_BE_HSIF1_TDM_RX_5 "HSIF1_TDM_RX_5"
#define LPASS_BE_HSIF1_TDM_TX_5 "HSIF1_TDM_TX_5"
#define LPASS_BE_HSIF1_TDM_RX_6 "HSIF1_TDM_RX_6"
#define LPASS_BE_HSIF1_TDM_TX_6 "HSIF1_TDM_TX_6"
#define LPASS_BE_HSIF1_TDM_RX_7 "HSIF1_TDM_RX_7"
#define LPASS_BE_HSIF1_TDM_TX_7 "HSIF1_TDM_TX_7"
#define LPASS_BE_HSIF2_TDM_RX_0 "HSIF2_TDM_RX_0"
#define LPASS_BE_HSIF2_TDM_TX_0 "HSIF2_TDM_TX_0"
#define LPASS_BE_HSIF2_TDM_RX_1 "HSIF2_TDM_RX_1"
#define LPASS_BE_HSIF2_TDM_TX_1 "HSIF2_TDM_TX_1"
#define LPASS_BE_HSIF2_TDM_RX_2 "HSIF2_TDM_RX_2"
#define LPASS_BE_HSIF2_TDM_TX_2 "HSIF2_TDM_TX_2"
#define LPASS_BE_HSIF2_TDM_RX_3 "HSIF2_TDM_RX_3"
#define LPASS_BE_HSIF2_TDM_TX_3 "HSIF2_TDM_TX_3"
#define LPASS_BE_HSIF2_TDM_RX_4 "HSIF2_TDM_RX_4"
#define LPASS_BE_HSIF2_TDM_TX_4 "HSIF2_TDM_TX_4"
#define LPASS_BE_HSIF2_TDM_RX_5 "HSIF2_TDM_RX_5"
#define LPASS_BE_HSIF2_TDM_TX_5 "HSIF2_TDM_TX_5"
#define LPASS_BE_HSIF2_TDM_RX_6 "HSIF2_TDM_RX_6"
#define LPASS_BE_HSIF2_TDM_TX_6 "HSIF2_TDM_TX_6"
#define LPASS_BE_HSIF2_TDM_RX_7 "HSIF2_TDM_RX_7"
#define LPASS_BE_HSIF2_TDM_TX_7 "HSIF2_TDM_TX_7"
#define LPASS_BE_SLIMBUS_7_RX "SLIMBUS_7_RX"
#define LPASS_BE_SLIMBUS_7_TX "SLIMBUS_7_TX"
@ -515,6 +580,70 @@ enum {
MSM_BACKEND_DAI_PROXY_TX,
MSM_BACKEND_DAI_HDMI_RX_MS,
MSM_BACKEND_DAI_AFE_PCM_RX1,
MSM_BACKEND_DAI_SEP_TDM_RX_0,
MSM_BACKEND_DAI_SEP_TDM_TX_0,
MSM_BACKEND_DAI_SEP_TDM_RX_1,
MSM_BACKEND_DAI_SEP_TDM_TX_1,
MSM_BACKEND_DAI_SEP_TDM_RX_2,
MSM_BACKEND_DAI_SEP_TDM_TX_2,
MSM_BACKEND_DAI_SEP_TDM_RX_3,
MSM_BACKEND_DAI_SEP_TDM_TX_3,
MSM_BACKEND_DAI_SEP_TDM_RX_4,
MSM_BACKEND_DAI_SEP_TDM_TX_4,
MSM_BACKEND_DAI_SEP_TDM_RX_5,
MSM_BACKEND_DAI_SEP_TDM_TX_5,
MSM_BACKEND_DAI_SEP_TDM_RX_6,
MSM_BACKEND_DAI_SEP_TDM_TX_6,
MSM_BACKEND_DAI_SEP_TDM_RX_7,
MSM_BACKEND_DAI_SEP_TDM_TX_7,
MSM_BACKEND_DAI_HSIF0_TDM_RX_0,
MSM_BACKEND_DAI_HSIF0_TDM_TX_0,
MSM_BACKEND_DAI_HSIF0_TDM_RX_1,
MSM_BACKEND_DAI_HSIF0_TDM_TX_1,
MSM_BACKEND_DAI_HSIF0_TDM_RX_2,
MSM_BACKEND_DAI_HSIF0_TDM_TX_2,
MSM_BACKEND_DAI_HSIF0_TDM_RX_3,
MSM_BACKEND_DAI_HSIF0_TDM_TX_3,
MSM_BACKEND_DAI_HSIF0_TDM_RX_4,
MSM_BACKEND_DAI_HSIF0_TDM_TX_4,
MSM_BACKEND_DAI_HSIF0_TDM_RX_5,
MSM_BACKEND_DAI_HSIF0_TDM_TX_5,
MSM_BACKEND_DAI_HSIF0_TDM_RX_6,
MSM_BACKEND_DAI_HSIF0_TDM_TX_6,
MSM_BACKEND_DAI_HSIF0_TDM_RX_7,
MSM_BACKEND_DAI_HSIF0_TDM_TX_7,
MSM_BACKEND_DAI_HSIF1_TDM_RX_0,
MSM_BACKEND_DAI_HSIF1_TDM_TX_0,
MSM_BACKEND_DAI_HSIF1_TDM_RX_1,
MSM_BACKEND_DAI_HSIF1_TDM_TX_1,
MSM_BACKEND_DAI_HSIF1_TDM_RX_2,
MSM_BACKEND_DAI_HSIF1_TDM_TX_2,
MSM_BACKEND_DAI_HSIF1_TDM_RX_3,
MSM_BACKEND_DAI_HSIF1_TDM_TX_3,
MSM_BACKEND_DAI_HSIF1_TDM_RX_4,
MSM_BACKEND_DAI_HSIF1_TDM_TX_4,
MSM_BACKEND_DAI_HSIF1_TDM_RX_5,
MSM_BACKEND_DAI_HSIF1_TDM_TX_5,
MSM_BACKEND_DAI_HSIF1_TDM_RX_6,
MSM_BACKEND_DAI_HSIF1_TDM_TX_6,
MSM_BACKEND_DAI_HSIF1_TDM_RX_7,
MSM_BACKEND_DAI_HSIF1_TDM_TX_7,
MSM_BACKEND_DAI_HSIF2_TDM_RX_0,
MSM_BACKEND_DAI_HSIF2_TDM_TX_0,
MSM_BACKEND_DAI_HSIF2_TDM_RX_1,
MSM_BACKEND_DAI_HSIF2_TDM_TX_1,
MSM_BACKEND_DAI_HSIF2_TDM_RX_2,
MSM_BACKEND_DAI_HSIF2_TDM_TX_2,
MSM_BACKEND_DAI_HSIF2_TDM_RX_3,
MSM_BACKEND_DAI_HSIF2_TDM_TX_3,
MSM_BACKEND_DAI_HSIF2_TDM_RX_4,
MSM_BACKEND_DAI_HSIF2_TDM_TX_4,
MSM_BACKEND_DAI_HSIF2_TDM_RX_5,
MSM_BACKEND_DAI_HSIF2_TDM_TX_5,
MSM_BACKEND_DAI_HSIF2_TDM_RX_6,
MSM_BACKEND_DAI_HSIF2_TDM_TX_6,
MSM_BACKEND_DAI_HSIF2_TDM_RX_7,
MSM_BACKEND_DAI_HSIF2_TDM_TX_7,
MSM_BACKEND_DAI_MAX,
};