diff --git a/qcom/sdxnightjar-pinctrl.dtsi b/qcom/sdxnightjar-pinctrl.dtsi
index add8b1544bc6..b9546a67ea42 100644
--- a/qcom/sdxnightjar-pinctrl.dtsi
+++ b/qcom/sdxnightjar-pinctrl.dtsi
@@ -4,7 +4,7 @@
 	tlmm_pinmux: pinctrl@1000000 {
 		compatible = "qcom,sdxnightjar-pinctrl";
 		reg = <0x1000000 0x300000>;
-		interrupts = <0 208 0>;
+		interrupts = <0 208 IRQ_TYPE_LEVEL_HIGH>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-controller;
diff --git a/qcom/sdxnightjar.dtsi b/qcom/sdxnightjar.dtsi
index e70154bb6844..95eeafc47ad1 100644
--- a/qcom/sdxnightjar.dtsi
+++ b/qcom/sdxnightjar.dtsi
@@ -589,7 +589,7 @@
 	blsp1_uart1: serial@78af000 {
 		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 		reg = <0x78af000 0x200>;
-		interrupts = <0 107 0>;
+		interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
 			 <&gcc  GCC_BLSP1_AHB_CLK>;
 		clock-names = "core", "iface";
@@ -599,7 +599,7 @@
 	blsp1_uart2: serial@78b0000 {
 		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 		reg = <0x78b0000 0x200>;
-		interrupts = <0 108 0>;
+		interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&gcc  GCC_BLSP1_UART2_APPS_CLK>,
 			 <&gcc  GCC_BLSP1_AHB_CLK>;
 		clock-names = "core", "iface";
@@ -609,7 +609,7 @@
 	blsp1_uart3: serial@78b1000 {
 		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 		reg = <0x78b1000 0x200>;
-		interrupts = <0 109 0>;
+		interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&gcc  GCC_BLSP1_UART3_APPS_CLK>,
 			 <&gcc  GCC_BLSP1_AHB_CLK>;
 		clock-names = "core", "iface";
@@ -627,7 +627,8 @@
 		compatible = "qcom,msm-watchdog";
 		reg = <0xb017000 0x1000>;
 		reg-names = "wdt-base";
-		interrupts = <1 3 0>, <1 2 0>;
+		interrupts = <1 3 IRQ_TYPE_EDGE_RISING>,
+			<1 2 IRQ_TYPE_EDGE_RISING>;
 		qcom,bark-time = <11000>;
 		qcom,pet-time = <10000>;
 	};