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arm64: Apply erratum 1024718 to Cortex A55 r2p0

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Add Cortex A55 r2p0 MIDR value to list of CPUs that impacted by erratum
1024718.

Change-Id: Ida842a099fcd892c84db28ab6a92728d2303d21b
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
This commit is contained in:
Elliot Berman 2019-07-22 10:18:00 -07:00
commit 65f975619b
1 changed files with 1 additions and 1 deletions
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arch/arm64/kernel/cpufeature.c
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@ -1080,7 +1080,7 @@ static bool cpu_has_broken_dbm(void)
/* List of CPUs which have broken DBM support. */
static const struct midr_range cpus[] = {
#ifdef CONFIG_ARM64_ERRATUM_1024718
MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0
MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 2, 0), // A55 r0p0 -r2p0
#endif
{},
};