mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 11:41:38 -04:00
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: include/asm-powerpc/unistd.h include/asm-sparc/unistd.h include/asm-sparc64/unistd.h Signed-off-by: David Woodhouse <[email protected]>
This commit is contained in:
commit
66643de455
432 changed files with 9399 additions and 3746 deletions
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@ -9,6 +9,7 @@
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* published by the Free Software Foundation.
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*/
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#include "hardware.h"
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.macro addruart,rx
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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@ -10,6 +10,7 @@
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* published by the Free Software Foundation.
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*
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*/
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#include <asm/arch/irqs.h>
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.macro disable_fiq
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.endm
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@ -16,7 +16,7 @@
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x00000000 @ physical
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movne \rx, #0xe0000000 @ virtual
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orr \rx, \rx, #0x00200000
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orreq \rx, \rx, #0x00200000 @ physical
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orr \rx, \rx, #0x00006000 @ UART1 offset
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.endm
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71
include/asm-arm/arch-pxa/pxa2xx_spi.h
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71
include/asm-arm/arch-pxa/pxa2xx_spi.h
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@ -0,0 +1,71 @@
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/*
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* Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef PXA2XX_SPI_H_
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#define PXA2XX_SPI_H_
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#define PXA2XX_CS_ASSERT (0x01)
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#define PXA2XX_CS_DEASSERT (0x02)
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#if defined(CONFIG_PXA25x)
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#define CLOCK_SPEED_HZ 3686400
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#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
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#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP_TIMEOUT_SCALE (2712)
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#elif defined(CONFIG_PXA27x)
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#define CLOCK_SPEED_HZ 13000000
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#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
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#define SSP_TIMEOUT_SCALE (769)
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#endif
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#define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE)
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#define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
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#define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
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#define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))
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enum pxa_ssp_type {
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SSP_UNDEFINED = 0,
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PXA25x_SSP, /* pxa 210, 250, 255, 26x */
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PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
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PXA27x_SSP,
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};
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/* device.platform_data for SSP controller devices */
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struct pxa2xx_spi_master {
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enum pxa_ssp_type ssp_type;
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u32 clock_enable;
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u16 num_chipselect;
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u8 enable_dma;
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};
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/* spi_board_info.controller_data for SPI slave devices,
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* copied to spi_device.platform_data ... mostly for dma tuning
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*/
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struct pxa2xx_spi_chip {
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u8 tx_threshold;
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u8 rx_threshold;
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u8 dma_burst_size;
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u32 timeout_microsecs;
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u8 enable_loopback;
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void (*cs_control)(u32 command);
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};
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#endif /*PXA2XX_SPI_H_*/
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31
include/asm-arm/arch-s3c2410/spi-gpio.h
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31
include/asm-arm/arch-s3c2410/spi-gpio.h
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@ -0,0 +1,31 @@
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/* linux/include/asm-arm/arch-s3c2410/spi.h
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*
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - SPI Controller platfrom_device info
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_SPIGPIO_H
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#define __ASM_ARCH_SPIGPIO_H __FILE__
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struct s3c2410_spigpio_info;
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struct spi_board_info;
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struct s3c2410_spigpio_info {
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unsigned long pin_clk;
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unsigned long pin_mosi;
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unsigned long pin_miso;
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unsigned long board_size;
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struct spi_board_info *board_info;
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void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
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};
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#endif /* __ASM_ARCH_SPIGPIO_H */
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29
include/asm-arm/arch-s3c2410/spi.h
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29
include/asm-arm/arch-s3c2410/spi.h
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/* linux/include/asm-arm/arch-s3c2410/spi.h
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*
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - SPI Controller platform_device info
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_SPI_H
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#define __ASM_ARCH_SPI_H __FILE__
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struct s3c2410_spi_info;
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struct spi_board_info;
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struct s3c2410_spi_info {
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unsigned long pin_cs; /* simple gpio cs */
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unsigned long board_size;
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struct spi_board_info *board_info;
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void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
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};
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#endif /* __ASM_ARCH_SPI_H */
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@ -45,8 +45,6 @@ extern unsigned int elf_hwcap;
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#endif /* __ASSEMBLY__ */
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#define PROC_INFO_SZ 48
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#define HWCAP_SWP 1
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#define HWCAP_HALF 2
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#define HWCAP_THUMB 4
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@ -142,6 +142,9 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
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: "cc");
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}
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/* write_can_lock - would write_trylock() succeed? */
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#define __raw_write_can_lock(x) ((x)->lock == 0x80000000)
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/*
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* Read locks are a bit more hairy:
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* - Exclusively load the lock value.
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@ -198,4 +201,7 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
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#define __raw_read_trylock(lock) generic__raw_read_trylock(lock)
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/* read_can_lock - would read_trylock() succeed? */
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#define __raw_read_can_lock(x) ((x)->lock < 0x80000000)
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#endif /* __ASM_SPINLOCK_H */
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