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arm64: dts: juno: enable some SMMUs
The IOMMU-backed DMA API support has now been in place for a while and proven stable, so there's no real need to keep most of Juno's SMMUs disabled. The USB, HDLCDs, and CoreSight ETR all just need to map RAM buffers for DMA - enabling their SMMUs obviates CPU bounce buffering for USB's streaming DMA to the upper memory bank, and lets the other two allocate their relatively large coherent buffers without pressuring CMA. Some more software work is still needed for the DMA-330 and PCIe before those can accommodate SMMU translation correctly in all cases, so we leave those alone for now. Tested-by: Liviu Dudau <Liviu.Dudau@arm.com> [only HDLCD] Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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1 changed files with 0 additions and 4 deletions
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@ -53,7 +53,6 @@
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#global-interrupts = <1>;
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dma-coherent;
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power-domains = <&scpi_devpd 0>;
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status = "disabled";
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};
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gic: interrupt-controller@2c010000 {
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@ -600,7 +599,6 @@
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<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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#global-interrupts = <1>;
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status = "disabled";
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};
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smmu_hdlcd0: iommu@7fb20000 {
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@ -610,7 +608,6 @@
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<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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#global-interrupts = <1>;
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status = "disabled";
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};
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smmu_usb: iommu@7fb30000 {
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@ -621,7 +618,6 @@
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#iommu-cells = <1>;
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#global-interrupts = <1>;
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dma-coherent;
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status = "disabled";
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};
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dma@7ff00000 {
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