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ARM: SoC fixes for v4.3-rc
Our first real batch of fixes this release cycle. There's a collection of
them here:
- A fixup for a build breakage that hits on arm64 allmodconfig in QCOM SCM
firmware drivers
- MMC fixes for OMAP that had quite a bit of breakage this merge window.
- Misc build/warning fixes on PXA and OMAP
- A couple of minor fixes for Beagleboard X15 which is now starting to see
a few more users in the wild
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Our first real batch of fixes this release cycle. Nothing really
concerning, and diffstat is a bit inflated due to some DT contents
moving around on STi platforms.
There's a collection of them here:
- A fixup for a build breakage that hits on arm64 allmodconfig in
QCOM SCM firmware drivers
- MMC fixes for OMAP that had quite a bit of breakage this merge
window.
- Misc build/warning fixes on PXA and OMAP
- A couple of minor fixes for Beagleboard X15 which is now starting
to see a few more users in the wild"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
ARM: sti: dt: adapt DT to fix probe/bind issues in DRM driver
ARM: dts: fix omap2+ address translation for pbias
firmware: qcom: scm: Add function stubs for ARM64
ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2
ARM: omap2plus_defconfig: enable GPIO_PCA953X
ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late
ARM: dts: am57xx-beagle-x15: Update Phy supplies
ARM: pxa: balloon3: Fix build error
ARM: dts: Fixup model name for HP t410 dts
ARM: dts: DRA7: fix a typo in ethernet
ARM: omap2plus_defconfig: make PCF857x built-in
ARM: dts: Use ti,pbias compatible string for pbias
ARM: OMAP5: Cleanup options for SoC only build
ARM: DRA7: Select missing options for SoC only build
ARM: OMAP2+: board-generic: Remove stale of_irq macros
ARM: OMAP4+: PM: erratum is used by OMAP5 and DRA7 as well
ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi
ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410
ARM: dts: am335x-phycore-som: Fix mpu voltage
...
This commit is contained in:
commit
685b5f1de6
34 changed files with 278 additions and 162 deletions
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@ -139,6 +139,14 @@ config QCOM_SCM
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bool
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depends on ARM || ARM64
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config QCOM_SCM_32
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def_bool y
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depends on QCOM_SCM && ARM
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config QCOM_SCM_64
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def_bool y
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depends on QCOM_SCM && ARM64
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source "drivers/firmware/broadcom/Kconfig"
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source "drivers/firmware/google/Kconfig"
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source "drivers/firmware/efi/Kconfig"
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@ -13,7 +13,8 @@ obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o
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obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o
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obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o
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obj-$(CONFIG_QCOM_SCM) += qcom_scm.o
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obj-$(CONFIG_QCOM_SCM) += qcom_scm-32.o
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obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o
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obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o
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CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
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obj-y += broadcom/
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63
drivers/firmware/qcom_scm-64.c
Normal file
63
drivers/firmware/qcom_scm-64.c
Normal file
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@ -0,0 +1,63 @@
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/qcom_scm.h>
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/**
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* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
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* @entry: Entry point function for the cpus
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* @cpus: The cpumask of cpus that will use the entry point
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*
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* Set the cold boot address of the cpus. Any cpu outside the supported
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* range would be removed from the cpu present mask.
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*/
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int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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{
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return -ENOTSUPP;
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}
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/**
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* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
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* @entry: Entry point function for the cpus
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* @cpus: The cpumask of cpus that will use the entry point
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*
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* Set the Linux entry point for the SCM to transfer control to when coming
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* out of a power down. CPU power down may be executed on cpuidle or hotplug.
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*/
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int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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{
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return -ENOTSUPP;
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}
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/**
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* qcom_scm_cpu_power_down() - Power down the cpu
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* @flags - Flags to flush cache
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*
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* This is an end point to power down cpu. If there was a pending interrupt,
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* the control would return from this function, otherwise, the cpu jumps to the
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* warm boot entry point set for this cpu upon reset.
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*/
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void __qcom_scm_cpu_power_down(u32 flags)
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{
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}
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int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id)
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{
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return -ENOTSUPP;
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}
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int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
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{
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return -ENOTSUPP;
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}
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