mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
arm64/dt: corfur: create the dts of corfur
remark: create the dts of corfur for SM6375 Change-Id: Ie4227e503df429dbef9bbcff772349f9be095b4f Signed-off-by: louhs1 <louhs1@motorola.com> Reviewed-on: https://gerrit.mot.com/2008259 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Ying Xu <xuying9@motorola.com> Reviewed-by: Huosheng Liao <liaohs@motorola.com> Submit-Approved: Jira Key
This commit is contained in:
louhs1
panyq6
parent
b1bcfd0941
commit
68da0aa3cd
9 changed files with 1344 additions and 10 deletions
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@ -53,11 +53,11 @@ holi-corfuq-dvt1a-overlay.dtbo-base := holi-moto-base.dtb
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holi-corfuq-dvt1c-overlay.dtbo-base := holi-moto-base.dtb
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dtbo-$(CONFIG_CORFUR_DTB) += \
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holi-corfur-dvt1b-overlay.dtbo \
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holi-corfur-dvt1d-overlay.dtbo
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blair-corfur-dvt1b-overlay.dtbo \
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blair-corfur-dvt1d-overlay.dtbo
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holi-corfur-dvt1b-overlay.dtbo-base := holi-moto-base.dtb
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holi-corfur-dvt1d-overlay.dtbo-base := holi-moto-base.dtb
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blair-corfur-dvt1b-overlay.dtbo-base := blair-moto-base.dtb
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blair-corfur-dvt1d-overlay.dtbo-base := blair-moto-base.dtb
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dtbo-$(CONFIG_CYPFG_DTB) += \
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holi-cypfg-evb-overlay.dtbo \
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737
qcom/blair-corfur-common-overlay.dtsi
Normal file
737
qcom/blair-corfur-common-overlay.dtsi
Normal file
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@ -0,0 +1,737 @@
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/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "blair-pm6125-moto-common-overlay.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include "holi-pmic-overlay-pm6125.dtsi"
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#include "holi-thermal-overlay-pm6125.dtsi"
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#include "display/holi-sde-display-mtp-pm6125.dtsi"
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#include <dt-bindings/iio/qti_power_supply_iio.h>
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#include "camera/holi-camera-pm6125-overlay.dtsi"
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#include "corfur-fps-overlay.dtsi"
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#include "corfur-display.dtsi"
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#include "corfuq-touchscreen.dtsi"
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#include "holi-audio-wcd9370-aw882xx-acf-overlay.dtsi"
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#include "moto_therm_sys_temp.dtsi"
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#include "corfup-charger.dtsi"
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#include "camera/holi-camera-sensor-mot-corfup-overlay.dtsi"
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#include "camera/holi-camera-sensor-mot-corfup-dvt1-overlay.dtsi"
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&smb1394 {
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status = "disabled";
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};
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&wcd937x_codec {
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cdc-vdd-rxtx-supply = <&L9A>;
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cdc-vddpx-supply = <&L9A>;
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qcom,cdc-static-supplies = "cdc-vdd-rxtx",
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"cdc-vddpx";
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/*
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* Overriding cdc-vdd-mic-bias-supply to dummy value
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* to avoid compilation errors as BOB is not definied
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* for pm6125
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*/
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cdc-vdd-mic-bias-supply = <>;
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};
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&tlmm {
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google_key_default: google_key_default {
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mux {
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pins = "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio11";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* GPIO 9: NFC Read Interrupt */
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* GPIO 9: NFC Read Interrupt */
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_enable_active: nfc_enable_active {
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mux {
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/* 6: Enable */
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pins = "gpio6";
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function = "gpio";
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};
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config {
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pins = "gpio6";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend {
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mux {
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/* 6: Enable */
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pins = "gpio6";
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function = "gpio";
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};
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config {
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pins = "gpio6";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_clk_req_active: nfc_clk_req_active {
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/* active state */
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mux {
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/* GPIO 7: NFC CLK Req*/
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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input-enable;
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};
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};
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nfc_clk_req_suspend: nfc_clk_req_suspend {
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/* sleep state */
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mux {
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/* GPIO 7: NFC CLK Req */
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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input-enable;
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};
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};
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};
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};
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&soc {
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gpio_keys: gpio_keys {
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compatible = "gpio-keys";
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label = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key_vol_up_default &google_key_default>;
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vol_up {
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label = "volume_up";
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gpios = <&pmr735a_gpios 1 GPIO_ACTIVE_LOW>;
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linux,input-type = <1>;
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linux,code = <KEY_VOLUMEUP>;
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gpio-key,wakeup;
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debounce-interval = <15>;
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linux,can-disable;
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};
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google_key {
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label = "google_key";
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gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
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linux,input-type = <1>;
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linux,code = <KEY_SEARCH>;
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gpio-key,wakeup;
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debounce-interval = <15>;
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linux,can-disable;
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};
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};
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};
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/* Dummy LDO reference */
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&sdhc_1 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_on>;
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pinctrl-1 = <&sdc1_off>;
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vdd-supply = <&L24A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 570000>;
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vdd-io-supply = <&L11A>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-lpm-sup;
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qcom,vdd-io-voltage-level = <1800000 1800000>;
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qcom,vdd-io-current-level = <0 325000>;
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};
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&sdhc_2 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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vdd-supply = <&L22A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L5A>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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cd-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qmp-v4-yupik";
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vdda-phy-supply = <&L7A>;
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vdda-pll-supply = <&L4A>;
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vdda-phy-max-microamp = <85700>;
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vdda-pll-max-microamp = <18300>;
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status = "ok"
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&L24A>;
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vcc-voltage-level = <2950000 2960000>;
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vcc-max-microamp = <800000>;
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vccq2-supply = <&L11A>;
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vccq2-max-microamp = <800000>;
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vccq2-voltage-level = <1800000 1800000>;
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qcom,vddp-ref-clk-supply = <&L4A>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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status = "ok"
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};
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&pm6125_l12 {
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regulator-always-on;
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qcom,init-voltage = <1800000>;
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};
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&qupv3_se8_i2c {
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sx937x@2c {
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status = "disabled";
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};
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};
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&qupv3_se10_i2c {
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status = "ok"
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cam_pmic2: wl2866d@28{
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compatible = "semi,wl2866d";
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reg = <0x28>;
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vin1-supply = <&S6A>;
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semi,init-value = <0x05>;
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regulators {
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cam_pmic2_ldo1_dvdd1: ldo1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1800000>;
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};
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cam_pmic2_ldo2_dvdd2: ldo2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1800000>;
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};
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cam_pmic2_ldo3_avdd1: ldo3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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regulator-always-on;
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};
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cam_pmic2_ldo4_avdd2: ldo4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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regulator-always-on;
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};
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};
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};
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cam_pmic1: wl2864c@29{
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compatible = "semi,wl2864c";
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reg = <0x29>;
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vin1-supply = <&S6A>;
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regulators {
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cam_pmic1_ldo1_dvdd1: ldo1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1800000>;
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};
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cam_pmic1_ldo2_dvdd2: ldo2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1800000>;
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};
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cam_pmic1_ldo3_avdd1: ldo3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_pmic1_ldo4_avdd2: ldo4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_pmic1_ldo5_vddaf: ldo5 {
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regulator-name = "ldo5";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_pmic1_ldo6_vddois: ldo6 {
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regulator-name = "ldo6";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_pmic1_ldo7_vddio: ldo7 {
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regulator-name = "ldo7";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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};
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};
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sx937x@2c {
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compatible = "Semtech,sx937x";
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reg = <0x2c>;
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&sar_int_default>;
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pinctrl-1 = <&sar_int_sleep>;
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interrupt-parent = <&tlmm>;
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interrupts = <24 0x02>;
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interrupt-names = "sx937x_irq";
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Semtech,nirq-gpio = <&tlmm 24 0x02>;
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//please fix me
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cap_vdd-supply = <&pm6125_l12>;
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/*use PH4/5/6 as the reference sensor
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set it to 0xff if the ref-phases-x is not used*/
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Semtech,ref-phases-a = <4>;
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Semtech,ref-phases-b = <5>;
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Semtech,ref-phases-c = <6>;
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Semtech,button-flag = <0x0f>;
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Semtech,reg-num = <61>;
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Semtech,reg-init = <
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0x8024 0x7F00 /*PHEN, Disable all Phases*/
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0x4004 0x74 /*irq mask*/
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0x8020 0x10 /*Set scan period*/
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/*set Phase sampling frequency to 65KHz*/
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0x8028 0x876 /*AFE_PARAM_PH0*/
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0x8034 0x876 /*AFE_PARAM_PH1*/
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0x8040 0x876 /*AFE_PARAM_PH2*/
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0x804C 0x876 /*AFE_PARAM_PH3*/
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0x8058 0x876 /*AFE_PARAM_PH4*/
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0x8064 0x876 /*AFE_PARAM_PH5*/
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0x8070 0x876 /*AFE_PARAM_PH6*/
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/*0x807C 0x876 */ /*AFE_PARAM_PH7*/
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/*set CS3 to hiz, because it used as IRQ pin*/
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0x8030 0xFEF9FF /*REG_AFEPH_PH0, CS5, ANT1, Bottom*/
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0x803C 0xBFF9FF /*REG_AFEPH_PH1, CS7, ANT2, Top Right*/
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0x8048 0xFFF9FD /*REG_AFEPH_PH2, CS0, ANT3, Top Left*/
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0x8054 0xFFD9FF /*REG_AFEPH_PH3, CS4, ANT4, Top Right side*/
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0x8060 0xF7F9FF /*REG_AFEPH_PH4, CS6, ANT1_REF, Bottom*/
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0x806C 0xFFF9EF /*REG_AFEPH_PH5, CS1, ANT2_REF, Top Right*/
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0x8078 0xFFF97F /*REG_AFEPH_PH6, CS2, ANT3_REF, Top Left*/
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0x8084 0xFFF9FF /*REG_AFEPH_PH7, NOT USE*/
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/*Set Phase Proximity Threshold*/
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0x8098 0x00009240 /*prox threshold ph0*/
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0x80B8 0x00008035 /*prox threshold ph1*/
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0x80D8 0x00004343 /*prox threshold ph2*/
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0x80F8 0x00003C3C /*prox threshold ph3*/
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0x8118 0x00000000 /*prox threshold ph4*/
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0x8138 0x00000000 /*prox threshold ph5*/
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0x8158 0x00000000 /*prox threshold ph6*/
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/*0x8178 0x00000000*/ /*prox threshold ph7*/
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/*Set Useful Filter*/
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0x808C 0x20600019 /*PH0 Filter Setup B, non-detect threshold of USE filter*/
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0x80AC 0x20600019 /*PH1 Filter Setup B, non-detect threshold of USE filter*/
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0x80CC 0x20600019 /*PH2 Filter Setup B, non-detect threshold of USE filter*/
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0x80EC 0x20600019 /*PH3 Filter Setup B, non-detect threshold of USE filter*/
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0x810C 0x20600019 /*PH4 Filter Setup B, non-detect threshold of USE filter*/
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0x812C 0x20600019 /*PH5 Filter Setup B, non-detect threshold of USE filter*/
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0x814C 0x20600019 /*PH6 Filter Setup B, non-detect threshold of USE filter*/
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0x816C 0x20600019 /*PH7 Filter Setup B, non-detect threshold of USE filter*/
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0x8090 0x50D47000
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0x80B0 0x46D87000
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0x80D0 0x46D07000
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0x80F0 0x3CDE7000
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0x8110 0x50D27000
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0x8130 0x50D27000
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0x8150 0x50D27000
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0x8170 0x50D27000
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/*PH0123 raw filter 1/4*/
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||||
0x8088 0x300000
|
||||
0x80A8 0x300000
|
||||
0x80C8 0x300000
|
||||
0x80E8 0x300000
|
||||
|
||||
/*PH456 raw filter 1/64*/
|
||||
0x8108 0x600000
|
||||
0x8128 0x600000
|
||||
0x8148 0x600000
|
||||
|
||||
/*Set Reference Phase*/
|
||||
0x8188 0x8000014 /*Reference Correction Setup B ENG1*/
|
||||
0x818C 0x0 /*Reference Correction Setup B ENG2*/
|
||||
0x8190 0x0 /*Reference Correction Setup B ENG3*/
|
||||
0x8194 0x0 /*Reference Correction Setup B ENG4*/
|
||||
|
||||
/*Set Reference Correction*/
|
||||
0x80A0 0x222200E1 /*Reference Correction Setup A PH0*/
|
||||
0x80C0 0x0 /*Reference Correction Setup A PH1*/
|
||||
0x80E0 0x0 /*Reference Correction Setup A PH2*/
|
||||
0x8100 0x0 /*Reference Correction Setup A PH3*/
|
||||
0x8120 0x0 /*Reference Correction Setup A PH4*/
|
||||
0x8140 0x0 /*Reference Correction Setup A PH5*/
|
||||
0x8160 0x0 /*Reference Correction Setup A PH6*/
|
||||
0x8180 0x0 /*Reference Correction Setup A PH7*/
|
||||
|
||||
0x8024 0x7F7F /*PHEN, Enable PH0~PH6*/
|
||||
>;
|
||||
|
||||
status = "ok"
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se8_i2c {
|
||||
status = "okay";
|
||||
qcom,i2c-touch-active="synaptics,tcm-i2c";
|
||||
|
||||
synaptics_tcm@20 {
|
||||
compatible = "synaptics,tcm-i2c";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <22 0x2008>;
|
||||
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
|
||||
"pmx_ts_release";
|
||||
pinctrl-0 = <&ts_active>;
|
||||
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
|
||||
pinctrl-2 = <&pmx_ts_release>;
|
||||
vdd-supply = <&L11A>;
|
||||
avdd-supply = <&L6A>;
|
||||
synaptics,pwr-reg-name = "avdd";
|
||||
synaptics,bus-reg-name = "vdd";
|
||||
synaptics,irq-gpio = <&tlmm 22 0x2008>;
|
||||
synaptics,irq-on-state = <0>;
|
||||
synaptics,reset-gpio = <&tlmm 21 0x00>;
|
||||
synaptics,reset-on-state = <0>;
|
||||
synaptics,reset-active-ms = <20>;
|
||||
synaptics,reset-delay-ms = <200>;
|
||||
synaptics,power-delay-ms = <200>;
|
||||
synaptics,ubl-i2c-addr = <0x20>;
|
||||
synaptics,extend_report;
|
||||
synaptics,firmware-name = "synaptics_firmware.img";
|
||||
|
||||
panel = <&dsi_rm69299_visionox_amoled_video
|
||||
&dsi_rm69299_visionox_amoled_cmd>;
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se7_i2c {
|
||||
status = "ok"
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
st21nfc@8 {
|
||||
compatible = "st,st21nfc";
|
||||
mmi,status = "/chosen", "mmi,nfc", "st"
|
||||
status = "ok"
|
||||
reg = <0x08>;
|
||||
st,irq_gpio = <&tlmm 9 0x00>;
|
||||
st,reset_gpio = <&tlmm 6 0x00>;
|
||||
st,clkreq_gpio = <&tlmm 7 0x00>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <9 0>;
|
||||
interrupt-names = "nfc_irq";
|
||||
pinctrl-names = "nfc_active", "nfc_suspend";
|
||||
pinctrl-0 = <&nfc_int_active &nfc_enable_active
|
||||
&nfc_clk_req_active>;
|
||||
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
|
||||
&nfc_clk_req_suspend>;
|
||||
};
|
||||
};
|
||||
|
||||
&pm7250b_vadc {
|
||||
cp_therm {
|
||||
reg = <ADC5_AMUX_THM2_100K_PU>;
|
||||
label = "cp_therm";
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
qcom,pre-scaling = <1 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&pm7250b_adc_tm {
|
||||
io-channels = <&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>,
|
||||
<&pm7250b_vadc ADC5_AMUX_THM2_100K_PU>,
|
||||
<&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>;
|
||||
|
||||
cp_therm {
|
||||
reg = <ADC5_AMUX_THM2_100K_PU>;
|
||||
qcom,ratiometric;
|
||||
qcom,hw-settle-time = <200>;
|
||||
};
|
||||
};
|
||||
|
||||
&thermal_zones {
|
||||
pa-therm0-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
sdm-skin-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
pa-therm1-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
quiet-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
rfc-cam-pa3-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
camera-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
chg-skin-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
conn-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
xo-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
rear-cam-therm-usr {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pa_therm2 {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
msm_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
pa_therm3 {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
pa_therm1 {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
quiet_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
chg_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
conn_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM3_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
cp_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM2_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
cam_flash_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO3_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
xo_therm {
|
||||
polling-delay-passive = <5000>;
|
||||
polling-delay = <20000>;
|
||||
thermal-governor = "user_space";
|
||||
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
|
||||
wake-capable-sensor;
|
||||
trips {
|
||||
active-config0 {
|
||||
temperature = <125000>;
|
||||
hysteresis = <1000>;
|
||||
type = "passive";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pm8008_8 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pm8008_9 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
qcom,vdd-voltage-level = <3000000 3000000>;
|
||||
};
|
||||
|
||||
&qupv3_se10_i2c_sleep {
|
||||
config {
|
||||
/delete-property/ bias-disable;
|
||||
bias-pull-up;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&pm7250b_charger {
|
||||
dpdm-supply = <&usb2_phy0>;
|
||||
};
|
||||
|
|
@ -13,11 +13,11 @@
|
|||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "holi-corfuq-common-overlay.dtsi"
|
||||
#include "blair-corfur-common-overlay.dtsi"
|
||||
|
||||
/ {
|
||||
model = "corfur";
|
||||
compatible = "qcom,holi-corfur", "qcom,holi-moto", "qcom,holi";
|
||||
qcom,msm-id = <454 0x10000>, <472 0x10000>;
|
||||
compatible = "qcom,blair-corfur", "qcom,blair-moto", "qcom,blair";
|
||||
qcom,msm-id = <507 0x10000>;
|
||||
qcom,board-id = <0x45 0xB1B0>;
|
||||
};
|
||||
|
|
@ -13,11 +13,11 @@
|
|||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "holi-corfuq-common-overlay.dtsi"
|
||||
#include "blair-corfur-common-overlay.dtsi"
|
||||
|
||||
/ {
|
||||
model = "corfur";
|
||||
compatible = "qcom,holi-corfur", "qcom,holi-moto", "qcom,holi";
|
||||
qcom,msm-id = <454 0x10000>, <472 0x10000>;
|
||||
compatible = "qcom,blair-corfur", "qcom,blair-moto", "qcom,blair";
|
||||
qcom,msm-id = <507 0x10000>;
|
||||
qcom,board-id = <0x46 0xB1D0>;
|
||||
};
|
||||
41
qcom/blair-moto-base.dts
Normal file
41
qcom/blair-moto-base.dts
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "blair.dtsi"
|
||||
|
||||
/ {
|
||||
qcom,board-id = <0 0>;
|
||||
channel-id-map = "";
|
||||
/*
|
||||
* Some nodes need labels assigned to appear in __symbols__
|
||||
*/
|
||||
chosen: chosen { };
|
||||
aliases: aliases { };
|
||||
reserved_memory: reserved-memory { };
|
||||
mot_batterydata: qcom,battery-data { };
|
||||
utags: utags { };
|
||||
hw: hw { };
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
/delete-node/ ramoops;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
/delete-node/ nfc;
|
||||
};
|
||||
|
||||
&firmware {
|
||||
/delete-node/ android;
|
||||
};
|
||||
309
qcom/blair-pm6125-moto-common-overlay.dtsi
Normal file
309
qcom/blair-pm6125-moto-common-overlay.dtsi
Normal file
|
|
@ -0,0 +1,309 @@
|
|||
/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include "blair-pm6125-overlay.dtsi"
|
||||
#include "holi-mtp-pm7250b.dtsi"
|
||||
|
||||
#include "carrier-channel-ids.dtsi"
|
||||
#include <dt-bindings/moto/moto-mem-reserve.h>
|
||||
|
||||
&utags {
|
||||
compatible = "mmi,utags";
|
||||
mmi,main-utags = "/dev/block/bootdevice/by-name/utags";
|
||||
mmi,backup-utags = "/dev/block/bootdevice/by-name/utagsBackup";
|
||||
};
|
||||
|
||||
&hw {
|
||||
compatible = "mmi,utags";
|
||||
mmi,dir-name = "hw";
|
||||
mmi,main-utags = "/dev/block/bootdevice/by-name/hw";
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
ramoops_mem {
|
||||
compatible = "ramoops";
|
||||
no-map;
|
||||
reg = <0x0 RAMOOPS_BASE_ADDR 0x0 RAMOOPS_SIZE>;
|
||||
console-size = <RAMOOPS_CONSOLE_SIZE>;
|
||||
pmsg-size = <RAMOOPS_PMSG_SIZE>;
|
||||
record-size = <RAMOOPS_RECORD_SIZE>;
|
||||
no-dump-oops;
|
||||
};
|
||||
|
||||
wdog_cpuctx_mem: wdog_cpuctx_region {
|
||||
no-map;
|
||||
reg = <0x0 WDOG_CPUCTX_BASE
|
||||
0x0 WDOG_CPUCTX_SIZE>;
|
||||
};
|
||||
|
||||
tzlog_dump_mem: tzlog_dump_mem_region {
|
||||
no-map;
|
||||
reg = <0x0 TZLOG_BCK_BASE
|
||||
0x0 TZLOG_BCK_SIZE>;
|
||||
};
|
||||
|
||||
mmi_annotate_mem: mmi_annotate_mem_region {
|
||||
no-map;
|
||||
reg = <0x0 MMI_ANNOTATE_BASE
|
||||
0x0 MMI_ANNOTATE_SIZE>;
|
||||
};
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
sar_int_default: sar_int_default {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio24";
|
||||
num-grp-pins = <1>;
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sar_int_sleep: sar_int_sleep {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio24";
|
||||
num-grp-pins = <1>;
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pm6125_l12 {
|
||||
regulator-always-on;
|
||||
qcom,init-voltage = <1800000>;
|
||||
};
|
||||
|
||||
&qupv3_se8_i2c {
|
||||
status = "okay";
|
||||
|
||||
sx937x:sx937x@2c {
|
||||
compatible = "Semtech,sx937x";
|
||||
reg = <0x2c>;
|
||||
pinctrl-names = "default","sleep";
|
||||
pinctrl-0 = <&sar_int_default>;
|
||||
pinctrl-1 = <&sar_int_sleep>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <24 0x02>;
|
||||
interrupt-names = "sx937x_irq";
|
||||
Semtech,nirq-gpio = <&tlmm 24 0x02>;
|
||||
cap_vdd-supply = <&pm6125_l12>;
|
||||
/*use PH5/6 as the reference sensor
|
||||
set it to 0xff if the ref-phases-x is not used*/
|
||||
Semtech,ref-phases-a = <5>;
|
||||
Semtech,ref-phases-b = <6>;
|
||||
Semtech,ref-phases-c = <0xff>;
|
||||
Semtech,button-flag = <0x1f>;
|
||||
Semtech,reg-num = <75>;
|
||||
Semtech,reg-init = <
|
||||
0x8024 0x7F00 /*PHEN, Disable all Phases*/
|
||||
0x4004 0x70 /*irq mask*/
|
||||
0x8008 0x0
|
||||
0x4280 0x0
|
||||
0x8020 0x32
|
||||
0x8028 0x25E /*AFE_PARAM_PH0*/
|
||||
0x8034 0x25E /*AFE_PARAM_PH1*/
|
||||
0x8040 0x25E /*AFE_PARAM_PH2*/
|
||||
0x804C 0x25E /*AFE_PARAM_PH3*/
|
||||
0x8058 0x25E /*AFE_PARAM_PH4*/
|
||||
0x8064 0x25E /*AFE_PARAM_PH5*/
|
||||
0x8070 0x25E /*AFE_PARAM_PH6*/
|
||||
0x807C 0x25E /*AFE_PARAM_PH7*/
|
||||
/*set CS3 to hiz, because it used as IRQ pin*/
|
||||
0x8030 0xFFF9FD /*REG_AFEPH_PH0, CS0, ANT0, Bottom center*/
|
||||
0x803C 0xBFF9FF /*REG_AFEPH_PH1, CS7, ANT6, Top Left*/
|
||||
0x8048 0xFFF97F /*REG_AFEPH_PH2, CS2, ANT1, Bottom Right*/
|
||||
0x8054 0xFFD9FF /*REG_AFEPH_PH3, CS4, ANT4, Right*/
|
||||
0x8060 0xF7F9FF /*REG_AFEPH_PH4, CS6, ANT5, Back center*/
|
||||
0x806C 0xFFF9EF /*REG_AFEPH_PH5, CS1, REF*/
|
||||
0x8078 0xFEF9FF /*REG_AFEPH_PH6, CS5, REF*/
|
||||
0x8084 0xFFF9FF /*REG_AFEPH_PH7, NOT USE*/
|
||||
0x802C 0x0
|
||||
0x8038 0x0
|
||||
0x8044 0x0
|
||||
0x8050 0x0
|
||||
0x805C 0x0
|
||||
0x8068 0x0
|
||||
0x8074 0x0
|
||||
0x8080 0x0
|
||||
0x8098 0xC8644D2C
|
||||
0x80B8 0xC8644D2C
|
||||
0x80D8 0xC8644D2C
|
||||
0x80F8 0xC8644D2C
|
||||
0x8118 0xC8644D2C
|
||||
0x8138 0xC8644D2C
|
||||
0x8158 0xC8644D2C
|
||||
0x8178 0xC8644D2C
|
||||
0x80A0 0x0
|
||||
0x80C0 0x0
|
||||
0x80E0 0x0
|
||||
0x8100 0x0
|
||||
0x8120 0x0
|
||||
0x8140 0x0
|
||||
0x8160 0x0
|
||||
0x8180 0x0
|
||||
0x8188 0x0
|
||||
0x818C 0x0
|
||||
0x8190 0x0
|
||||
0x8194 0x0
|
||||
0x8090 0x2AD67000
|
||||
0x80B0 0x2AD67000
|
||||
0x80D0 0x2AD67000
|
||||
0x80F0 0x2AD67000
|
||||
0x8110 0x2AD67000
|
||||
0x8130 0x2AD67000
|
||||
0x8150 0x2AD67000
|
||||
0x8170 0x2AD67000
|
||||
0x8088 0x300000
|
||||
0x80A8 0x300000
|
||||
0x80C8 0x300000
|
||||
0x80E8 0x300000
|
||||
0x8108 0x300000
|
||||
0x8128 0x300000
|
||||
0x8148 0x300000
|
||||
0x8168 0x300000
|
||||
0x808C 0x60200018
|
||||
0x80AC 0x60200018
|
||||
0x80CC 0x60200018
|
||||
0x80EC 0x60200018
|
||||
0x810C 0x60200018
|
||||
0x812C 0x60200018
|
||||
0x814C 0x60200018
|
||||
0x816C 0x60200018
|
||||
0x8024 0x7F7F
|
||||
0x4280 0xe
|
||||
>;
|
||||
|
||||
status = "ok"
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
mot_batterydata: qcom,battery-data {
|
||||
df-serialnum = "SB18D00294";
|
||||
qcom,batt-id-range-pct = <15>;
|
||||
#include "qg-batterydata-md50-amperex-5000mah.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
&pm7250b_charger {
|
||||
status = "ok"
|
||||
qcom,battery-data = <&mot_batterydata>;
|
||||
qcom,sec-charger-config = <0>;
|
||||
qcom,auto-recharge-soc = <98>;
|
||||
qcom,charger-temp-max = <800>;
|
||||
qcom,smb-temp-max = <800>;
|
||||
qcom,suspend-input-on-debug-batt;
|
||||
qcom,hvdcp3-standalone-config;
|
||||
qcom,fcc-max-ua = <4000000>;
|
||||
qcom,fv-max-uv = <4450000>;
|
||||
qcom,usb-icl-ua = <3000000>;
|
||||
qcom,thermal-mitigation = <4000000 3500000
|
||||
3000000 2500000
|
||||
2000000 1500000
|
||||
1200000 900000
|
||||
600000 300000>;
|
||||
qcom,pd-voltage-max-uv = <9000000>;
|
||||
qcom,usbpd-phandle = <&pm7250b_pdphy>;
|
||||
};
|
||||
|
||||
&spmi_bus {
|
||||
qcom,pm7250b@2 {
|
||||
pm7250b_mmi: qcom,qpnp-smb5-mmi {
|
||||
status = "ok"
|
||||
compatible = "qcom,mmi-pm7250b-smb5";
|
||||
#io-channel-cells = <1>;
|
||||
io-channels = <&pm7250b_charger PSY_IIO_CTM_CURRENT_MAX>,
|
||||
<&pm7250b_charger PSY_IIO_CURRENT_MAX>,
|
||||
<&pm7250b_charger PSY_IIO_TYPEC_MODE>,
|
||||
<&pm7250b_charger PSY_IIO_DP_DM>,
|
||||
<&pm7250b_charger PSY_IIO_PD_ACTIVE>,
|
||||
<&pm7250b_charger PSY_IIO_USB_REAL_TYPE>,
|
||||
<&pm7250b_charger PSY_IIO_HW_CURRENT_MAX>,
|
||||
<&pm7250b_charger PSY_IIO_USB_INPUT_CURRENT_SETTLED>,
|
||||
<&pm7250b_charger PSY_IIO_RERUN_AICL>,
|
||||
<&pm7250b_charger PSY_IIO_SW_JEITA_ENABLED>,
|
||||
<&pm7250b_qg PSY_IIO_VOLTAGE_NOW>,
|
||||
<&pm7250b_qg PSY_IIO_CURRENT_NOW>,
|
||||
<&pm7250b_qg PSY_IIO_TEMP>,
|
||||
<&pm7250b_qg PSY_IIO_CAPACITY>,
|
||||
<&pm7250b_qg PSY_IIO_CHARGE_FULL>,
|
||||
<&pm7250b_qg PSY_IIO_BATT_FULL_CURRENT>,
|
||||
<&pm7250b_qg PSY_IIO_CHARGE_FULL_DESIGN>;
|
||||
io-channel-names = "usb_ctm_current_max",
|
||||
"main_current_max",
|
||||
"usb_typec_mode",
|
||||
"battery_dp_dm",
|
||||
"usb_pd_active",
|
||||
"usb_real_type",
|
||||
"usb_hw_current_max",
|
||||
"usb_input_current_settled",
|
||||
"battery_rerun_aicl",
|
||||
"battery_sw_jeita_enabled",
|
||||
"voltage_now",
|
||||
"current_now",
|
||||
"temp",
|
||||
"capacity",
|
||||
"charge_full",
|
||||
"batt_full_current",
|
||||
"charge_full_design";
|
||||
qcom,enable-charging-limit;
|
||||
qcom,upper-limit-capacity = <65>;
|
||||
qcom,lower-limit-capacity = <60>;
|
||||
qcom,mmi-temp-zones = <0 4200 970 0>,
|
||||
<10 4200 2500 970>,
|
||||
<15 0 2500 2500>,
|
||||
<45 0 4000 4000>,
|
||||
<60 4200 2500 0>;
|
||||
qcom,iterm-ma = <242>;
|
||||
qcom,vfloat-comp-uv = <20000>;
|
||||
qcom,force-hvdcp-5v;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pm7250b_qg {
|
||||
status = "ok"
|
||||
qcom,battery-data = <&mot_batterydata>;
|
||||
qcom,qg-iterm-ma = <150>;
|
||||
qcom,hold-soc-while-full;
|
||||
qcom,linearize-soc;
|
||||
qcom,cl-feedback-on;
|
||||
qcom,cl-min-start-soc = <0>;
|
||||
qcom,cl-max-start-soc = <5>;
|
||||
qcom,cl-min-temp = <150>;
|
||||
qcom,cl-max-temp = <450>;
|
||||
qcom,cl-max-increment = <5>;
|
||||
qcom,cl-max-decrement = <10>;
|
||||
qcom,cl-min-limit = <200>;
|
||||
qcom,cl-max-limit = <30>;
|
||||
qcom,s3-entry-ibat-ua = <35000>;
|
||||
qcom,s3-exit-ibat-ua = <50000>;
|
||||
};
|
||||
|
||||
&pm7250b_pdphy {
|
||||
qcom,default-sink-caps = <5000 3000>, /*5V @ 3A*/
|
||||
<9000 2000>; /*9V @ 2A*/
|
||||
};
|
||||
|
||||
&bcl_soc {
|
||||
io-channels = <&pm7250b_charger PSY_IIO_HW_CURRENT_MAX>;
|
||||
io-channel-names = "usb_hw_current_max";
|
||||
qcom,bcl-not-mitigate-icl = <2500>;
|
||||
};
|
||||
75
qcom/blair-pm6125-overlay.dtsi
Normal file
75
qcom/blair-pm6125-overlay.dtsi
Normal file
|
|
@ -0,0 +1,75 @@
|
|||
&mdss_dsi_phy0 {
|
||||
vdda-0p9-supply = <&S1E_LEVEL>;
|
||||
};
|
||||
|
||||
&mdss_dsi0 {
|
||||
vdda-1p2-supply = <&L4A>;
|
||||
};
|
||||
|
||||
&icnss {
|
||||
vdd-cx-mx-supply = <&L2E>;
|
||||
vdd-1.8-xo-supply = <&L16A>;
|
||||
vdd-1.3-rfa-supply = <&L2A>;
|
||||
vdd-3.3-ch1-supply = <&L21A>;
|
||||
vdd-3.3-ch0-supply = <&L23A>;
|
||||
vdd-smps-supply = <&S5A>;
|
||||
qcom,vdd-cx-mx-config = <640000 640000>;
|
||||
qcom,vdd-3.3-ch1-config = <3000000 3312000>;
|
||||
qcom,vdd-3.3-ch0-config = <3000000 3312000>;
|
||||
};
|
||||
|
||||
&bluetooth {
|
||||
qcom,bt-vdd-smps-supply = <&S5A>; /* SMPS */
|
||||
qcom,bt-vdd-io-supply = <&L9A>; /* IO */
|
||||
qcom,bt-vdd-core-supply = <&L2A>; /* RFA */
|
||||
qcom,bt-vdd-pa-supply = <&L23A>; /* CH0 */
|
||||
qcom,bt-vdd-xtal-supply = <&L16A>; /* XO */
|
||||
|
||||
qcom,bt-vdd-smps-config = <984000 984000 1 0>;
|
||||
};
|
||||
|
||||
&dispcc {
|
||||
vdd_cx-supply = <&S2E_LEVEL>; /* VDD_CX_LEVEL */
|
||||
};
|
||||
|
||||
&gpucc {
|
||||
vdd_cx-supply = <&S2E_LEVEL>; /* VDD_CX_LEVEL */
|
||||
vdd_mx-supply = <&S1E_LEVEL>; /* VDD_MX_LEVEL */
|
||||
vdd_gx-supply = <&S8A_LEVEL>; /* VDD_GFX_LEVEL */
|
||||
};
|
||||
|
||||
&gpu_cx_gdsc {
|
||||
parent-supply = <&S2E_LEVEL>; /* VDD_CX_LEVEL */
|
||||
};
|
||||
|
||||
&gpu_gx_gdsc {
|
||||
parent-supply = <&S8A_LEVEL>; /* VDD_GFX_LEVEL */
|
||||
};
|
||||
|
||||
&gcc {
|
||||
vdd_cx-supply = <&S2E_LEVEL>; /* VDD_CX_LEVEL */
|
||||
vdd_mx-supply = <&S1E_LEVEL>; /* VDD_MX_LEVEL */
|
||||
};
|
||||
|
||||
&msm_gpu {
|
||||
vdd-parent-supply = <&S8A_LEVEL>; /* VDD_GFX_LEVEL */
|
||||
};
|
||||
|
||||
&pil_turing {
|
||||
vdd_cx-supply = <&S2E_LEVEL>; /* VDD_CX_LEVEL */
|
||||
};
|
||||
|
||||
&pil_modem {
|
||||
vdd_cx-supply = <&S2E_LEVEL>; /* VDD_CX_LEVEL */
|
||||
};
|
||||
|
||||
&pil_lpass {
|
||||
vdd_lpi_cx-supply = <&L1A_LEVEL>;
|
||||
vdd_lpi_mx-supply = <&L17A_LEVEL>;
|
||||
};
|
||||
|
||||
|
||||
&usb_qmp_dp_phy {
|
||||
vdd-supply = <&L18A>;
|
||||
core-supply = <&L4A>;
|
||||
};
|
||||
87
qcom/corfur-display.dtsi
Normal file
87
qcom/corfur-display.dtsi
Normal file
|
|
@ -0,0 +1,87 @@
|
|||
|
||||
#include "dsi-panel-mot-visionox-vtdr6110c-fhd-video.dtsi"
|
||||
#include "dsi-panel-mot-dummy-qhd-video.dtsi"
|
||||
|
||||
|
||||
&sde_dsi {
|
||||
/delete-property/ qcom,dsi-default-panel;
|
||||
qcom,dsi-default-panel = <&dsi_vtdr6110c_visionox_video>;
|
||||
|
||||
/delete-property/ avdd-supply;
|
||||
vddio-supply = <&L13A>;
|
||||
};
|
||||
|
||||
&soc {
|
||||
dsi_panel_pwr_supply_visionox: dsi_panel_pwr_supply_visionox {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qcom,panel-supply-entry@0 {
|
||||
reg = <0>;
|
||||
qcom,supply-name = "vddio";
|
||||
qcom,supply-min-voltage = <1800000>;
|
||||
qcom,supply-max-voltage = <1800000>;
|
||||
qcom,supply-enable-load = <62000>;
|
||||
qcom,supply-disable-load = <80>;
|
||||
qcom,supply-post-on-sleep = <20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&display_panel_avdd {
|
||||
/delete-property/ gpio;
|
||||
/delete-property/ pinctrl-0;
|
||||
};
|
||||
|
||||
&dsi_vtdr6110c_visionox_video {
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_visionox>;
|
||||
|
||||
qcom,mdss-dsi-bl-min-level = <16>;
|
||||
qcom,mdss-dsi-bl-max-level = <2047>;
|
||||
qcom,mdss-dsi-bl-default-level = <1023>;
|
||||
qcom,mdss-brightness-max-level = <2047>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,bklt-dcs-2bytes-enabled;
|
||||
|
||||
qcom,esd-check-enabled;
|
||||
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
|
||||
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
|
||||
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
|
||||
qcom,mdss-dsi-panel-status-value = <0x9c>;
|
||||
qcom,mdss-dsi-panel-status-read-length = <1>;
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
qcom,mdss-dsi-t-clk-post = <0x0E>;
|
||||
qcom,mdss-dsi-t-clk-pre = <0x1D>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 22 09 09 19 23 09
|
||||
09 09 02 04 00 1D 0E];
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mot_dummy_vid_qhd {
|
||||
qcom,platform-te-gpio = <&tlmm 23 0>;
|
||||
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
|
||||
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_visionox>;
|
||||
|
||||
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
|
||||
qcom,mdss-dsi-t-clk-post = <0x09>;
|
||||
qcom,mdss-dsi-t-clk-pre = <0x15>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dummy";
|
||||
qcom,mdss-dsi-display-timings {
|
||||
timing@0 {
|
||||
qcom,mdss-dsi-panel-phy-timings = [01 09 01 01 1b 1b 01
|
||||
01 02 02 04 00 0a 11];
|
||||
qcom,display-topology = <1 0 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
85
qcom/corfur-fps-overlay.dtsi
Normal file
85
qcom/corfur-fps-overlay.dtsi
Normal file
|
|
@ -0,0 +1,85 @@
|
|||
&tlmm {
|
||||
fps_rst_active: fps_rst_active {
|
||||
/* active state */
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
fps_rst_suspend: fps_rst_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
fps_int_active: fps_int_active {
|
||||
/* active state */
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio17";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
fps_int_suspend: fps_int_suspend {
|
||||
/* sleep state */
|
||||
mux {
|
||||
pins = "gpio17";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio17";
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
fpc: fpc_fpc1020 {
|
||||
compatible = "fpc,fpc1020";
|
||||
status = "ok"
|
||||
irq = <&tlmm 17 0>;
|
||||
rst = <&tlmm 18 0>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <17 0>;
|
||||
pinctrl-names = "default", "suspend";
|
||||
pinctrl-0 = <&fps_rst_active &fps_int_active>;
|
||||
pinctrl-1 = <&fps_rst_suspend &fps_int_suspend>;
|
||||
};
|
||||
goodix_fingerprint{
|
||||
//status = "/chosen", "mmi,fps", "true"
|
||||
status = "ok"
|
||||
compatible = "goodix,fingerprint";
|
||||
fp-gpio-reset = <&tlmm 18 0x00>;
|
||||
fp-gpio-irq = <&tlmm 17 0x00>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <17 0>;
|
||||
interrupt-controller;
|
||||
pinctrl-names = "default", "suspend";
|
||||
pinctrl-0 = <&fps_rst_active &fps_int_active>;
|
||||
pinctrl-1 = <&fps_rst_suspend &fps_int_suspend>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in a new issue