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Merge "ARM: dts: msm: update interconnect devices for Monaco"

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qctecmdr 2021-04-30 07:35:58 -07:00 • committed by Gerrit - the friendly Code Review server
commit 697780835d
1 changed files with 29 additions and 0 deletions
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29
qcom/monaco.dtsi
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@ -986,31 +986,60 @@
clk_virt: interconnect {
compatible = "qcom,monaco-clk_virt";
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_QUP_CLK>,
<&rpmcc RPM_SMD_QUP_A_CLK>;
};
mmnrt_virt: interconnect@0 {
compatible = "qcom,monaco-mmnrt_virt";
#interconnect-cells = <1>;
qcom,util-factor = <142>;
qcom,keepalive;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
<&rpmcc RPM_SMD_MMNRT_A_CLK>;
};
mmrt_virt: interconnect@1 {
compatible = "qcom,monaco-mmrt_virt";
#interconnect-cells = <1>;
qcom,util-factor = <142>;
qcom,keepalive;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
<&rpmcc RPM_SMD_MMRT_A_CLK>;
};
system_noc: interconnect@1880000 {
reg = <0x01880000 0x5e200>;
compatible = "qcom,monaco-system_noc";
#interconnect-cells = <1>;
qcom,keepalive;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
<&rpmcc RPM_SMD_SNOC_A_CLK>;
};
config_noc: interconnect@1900000 {
reg = <0x01900000 0x1000>;
compatible = "qcom,monaco-config_noc";
#interconnect-cells = <1>;
qcom,keepalive;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
<&rpmcc RPM_SMD_CNOC_A_CLK>;
};
bimc: interconnect@4480000 {
reg = <0x04480000 0x80000>;
compatible = "qcom,monaco-bimc";
#interconnect-cells = <1>;
qcom,util-factor = <151>;
qcom,keepalive;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
rpm_bus: qcom,rpm-smd {