Merge "ARM: dts: msm: Update PCIe0 PHY settings to v1.01 for lahaina v2.1"

This commit is contained in:
qctecmdr 2020-09-11 08:25:27 -07:00 • committed by Gerrit - the friendly Code Review server
commit 697a88b598

View file

@ -8,7 +8,7 @@
&pcie0 {
qcom,l1ss-sleep-disable = <0x0>;
qcom,pcie-phy-ver = <21100>;
qcom,pcie-phy-ver = <21101>;
qcom,phy-sequence = <0x0240 0x03 0x0
0x0094 0x08 0x0
0x0154 0x34 0x0
@ -66,6 +66,7 @@
0x1180 0xa6 0x0
0x1190 0x34 0x0
0x10d8 0x07 0x0
0x0e3c 0x1d 0x0
0x0e40 0x0c 0x0
0x10dc 0x00 0x0
0x104c 0x08 0x0
@ -78,7 +79,7 @@
0x06a8 0x0f 0x0
0x0048 0x90 0x0
0x0620 0xc1 0x0
0x0388 0xa8 0x0
0x0388 0x77 0x0
0x0398 0x0b 0x0
0x02dc 0x05 0x0
0x0200 0x00 0x0