From 7f2c7d7ec7dd99e072f613b6a9e03fb62344d13d Mon Sep 17 00:00:00 2001 From: Nilesh Laad Date: Tue, 13 Jun 2023 16:21:42 +0530 Subject: [PATCH 1/5] ARM: dts: msm: add backlight properties for eDP Add properties for eDP backlight and remove pwm-backlight. Change-Id: Ia438ae7c187c1b374a076eb607d5470d3131cfa7 --- qcom/yupik-iot-hsp.dtsi | 32 +++++--------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) diff --git a/qcom/yupik-iot-hsp.dtsi b/qcom/yupik-iot-hsp.dtsi index 9a78f463913e..87506bc98fb7 100644 --- a/qcom/yupik-iot-hsp.dtsi +++ b/qcom/yupik-iot-hsp.dtsi @@ -21,6 +21,11 @@ qcom,edp-backlight-en-gpio = <&pm8350c_gpios 7 0>; qcom,edp-default-panel = <&edp_panel_1080p_video>; qcom,panel-notifier-support; + qcom,edp-bl-min-level = <1>; + qcom,edp-bl-max-level = <4095>; + qcom,edp-brightness-max-level = <255>; + qcom,bl-pmic-pwm-period-usecs = <100>; + pwms = <&pm8350c_pwm_2 0 65535>; }; &mdss_mdp { @@ -46,15 +51,6 @@ }; &pm8350c_gpios { - pmic_edp_bl_en: pmic-edp-bl-en-state { - pins = "gpio7"; - function = "normal"; - bias-disable; - qcom,drive-strength = ; - /* Force backlight to be disabled to match state at boot. */ - output-low; - }; - pmic_edp_bl_pwm: pmic-edp-bl-pwm-state { pins = "gpio8"; function = "func1"; @@ -69,24 +65,6 @@ status = "ok"; }; -&soc { - edp_panel_bl_reg: edp_panel_bl_reg { - compatible = "qcom,stub-regulator"; - regulator-name = "edp_panel_bl_reg"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - pm8350c_pwm_backlight: backlight { - compatible = "pwm-backlight"; - power-supply = <&edp_panel_bl_reg>; - enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_edp_bl_en>; - pwms = <&pm8350c_pwm_2 0 65535 0>; - }; -}; - &pcie0 { status = "ok"; }; From 991aaf8f8c6315a266171de0ed7709abdba68b4c Mon Sep 17 00:00:00 2001 From: Raihan Haider Date: Fri, 17 Mar 2023 10:23:51 +0530 Subject: [PATCH 2/5] ARM: dts: qcom: Add pcie node for Realtek r8168 driver Add pcie entry for Realtek r8168 driver on sdxlemur platform. Number of Rx and Tx descriptors set to 256. Change-Id: I7e0920c2eefda405c1ce5f8e70ecfeba8475f7f4 --- qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi | 42 +++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi index c2d9043b1248..d27abf805344 100644 --- a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi +++ b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi @@ -48,6 +48,30 @@ qcom,mod-usecs-min = <30>; qcom,mod-usecs-max = <60>; }; + + ioss_r8168_eth0_rx: r8168_rx@eth0 { + qcom,dir-rx; + qcom,rx-filter-ip; + + qcom,ring-size = <256>; + qcom,buff-size = <2048>; + + qcom,mod-count-min = <32>; + qcom,mod-count-max = <64>; + qcom,mod-usecs-min = <30>; + qcom,mod-usecs-max = <60>; + }; + + ioss_r8168_eth0_tx: r8168_tx@eth0 { + qcom,dir-tx; + qcom,ring-size = <256>; + qcom,buff-size = <2048>; + + qcom,mod-count-min = <32>; + qcom,mod-count-max = <64>; + qcom,mod-usecs-min = <30>; + qcom,mod-usecs-max = <60>; + }; }; &pcie0_rp { @@ -118,6 +142,24 @@ }; + realtek,rtl8168@pcie0_rp { + reg = <0 0 0 0 0>; + + compatible = "qcom,ioss-v2-device"; + qcom,ioss = <&ioss>; + qcom,ioss_instance = <0>; + qcom,ioss_channels = + <&ioss_r8168_eth0_rx>, + <&ioss_r8168_eth0_tx>; + + /* ipa shares this group with rtl */ + qcom,iommu-group = <&ipa_eth_group1>; + + pci-ids = + "10ec:8168", + "17cb:0308"; + }; + pcie0_generic_ep: pcie0_generic_ep { reg = <0 0 0 0 0>; qcom,iommu-group = <&pcie0_generic_ep_iommu_group>; From 3d401bff5697ad752213872732f739509e8e94e7 Mon Sep 17 00:00:00 2001 From: Raihan Haider Date: Wed, 5 Jul 2023 15:37:20 +0530 Subject: [PATCH 3/5] ARM: dts: qcom: Add property for multiple rx queues Add dt entry for multiple rx queues in r8168 Change-Id: I6a93666ec6388203bee95fabad4d9d5dd3aa34f6 --- qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi index d27abf805344..73eac3727208 100644 --- a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi +++ b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi @@ -53,6 +53,8 @@ qcom,dir-rx; qcom,rx-filter-ip; + qcom,multi_rx_queues; + qcom,ring-size = <256>; qcom,buff-size = <2048>; From 11fea7e98531c4b366e460d017a68f729fce48ef Mon Sep 17 00:00:00 2001 From: Raihan Haider Date: Mon, 24 Jul 2023 17:53:24 +0530 Subject: [PATCH 4/5] ARM: dts: qcom: Set number of descriptors to 1024 Increase number of Rx and Tx descriptors to 1024 from 256 Change-Id: Ia3f131606cd7c4a55a5754539fec2e93d7b28e86 --- qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi index 73eac3727208..2ac93a65cdfa 100644 --- a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi +++ b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dtsi @@ -55,7 +55,7 @@ qcom,multi_rx_queues; - qcom,ring-size = <256>; + qcom,ring-size = <1024>; qcom,buff-size = <2048>; qcom,mod-count-min = <32>; @@ -66,7 +66,7 @@ ioss_r8168_eth0_tx: r8168_tx@eth0 { qcom,dir-tx; - qcom,ring-size = <256>; + qcom,ring-size = <1024>; qcom,buff-size = <2048>; qcom,mod-count-min = <32>; From 942ef11d8eae81eaf1f6a0d4d6a37acd42cde4df Mon Sep 17 00:00:00 2001 From: Swetha Chikkaboraiah Date: Tue, 4 Jul 2023 16:11:59 +0530 Subject: [PATCH 5/5] ARM: dts: msm: Add APQ-XR support for Blair Add APQ-XR support for Blair. Change-Id: I18245c67d01fd17f9ada54e0adff4f900bea5af8 --- qcom/blairp-atp-overlay.dts | 2 +- qcom/blairp-cdp-overlay.dts | 2 +- qcom/blairp-mtp-nopmi-overlay.dts | 2 +- qcom/blairp-mtp-overlay.dts | 2 +- qcom/blairp-mtp-usbc-overlay.dts | 2 +- qcom/blairp-qrd-nopmi-overlay.dts | 2 +- qcom/blairp-qrd-overlay.dts | 2 +- qcom/blairp.dtsi | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/qcom/blairp-atp-overlay.dts b/qcom/blairp-atp-overlay.dts index bb7b8787bdd3..90570c8657c0 100644 --- a/qcom/blairp-atp-overlay.dts +++ b/qcom/blairp-atp-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp ATP"; compatible = "qcom,blairp-atp", "qcom,blairp", "qcom,atp"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <33 0>; }; diff --git a/qcom/blairp-cdp-overlay.dts b/qcom/blairp-cdp-overlay.dts index 02704e07a2a9..2f59f31a2303 100644 --- a/qcom/blairp-cdp-overlay.dts +++ b/qcom/blairp-cdp-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp CDP"; compatible = "qcom,blairp-cdp", "qcom,blairp", "qcom,cdp"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <1 0>; }; diff --git a/qcom/blairp-mtp-nopmi-overlay.dts b/qcom/blairp-mtp-nopmi-overlay.dts index 58003066810b..fd856d7c217f 100644 --- a/qcom/blairp-mtp-nopmi-overlay.dts +++ b/qcom/blairp-mtp-nopmi-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp MTP NOPMI"; compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <8 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x0 0x0>; diff --git a/qcom/blairp-mtp-overlay.dts b/qcom/blairp-mtp-overlay.dts index 37651c24ece1..d7c310ee25f3 100644 --- a/qcom/blairp-mtp-overlay.dts +++ b/qcom/blairp-mtp-overlay.dts @@ -7,7 +7,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp MTP"; compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <8 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; diff --git a/qcom/blairp-mtp-usbc-overlay.dts b/qcom/blairp-mtp-usbc-overlay.dts index 8df452b841c0..638dfd632e0e 100644 --- a/qcom/blairp-mtp-usbc-overlay.dts +++ b/qcom/blairp-mtp-usbc-overlay.dts @@ -7,7 +7,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp MTP USBC audio"; compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <8 1>; }; diff --git a/qcom/blairp-qrd-nopmi-overlay.dts b/qcom/blairp-qrd-nopmi-overlay.dts index d3a8ca2f0c0b..41f0bc59156e 100644 --- a/qcom/blairp-qrd-nopmi-overlay.dts +++ b/qcom/blairp-qrd-nopmi-overlay.dts @@ -6,7 +6,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp QRD NOPMI"; compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <0x1000B 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x0 0x0>; diff --git a/qcom/blairp-qrd-overlay.dts b/qcom/blairp-qrd-overlay.dts index 40c9baef8462..4f886bb0fbe0 100644 --- a/qcom/blairp-qrd-overlay.dts +++ b/qcom/blairp-qrd-overlay.dts @@ -7,7 +7,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp QRD"; compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; qcom,board-id = <0x1000B 0>; qcom,pmic-id-size = <4>; qcom,pmic-id = <0x2D 0x0 0x2E 0x0>; diff --git a/qcom/blairp.dtsi b/qcom/blairp.dtsi index 192f3b55e620..f50f83d2301a 100644 --- a/qcom/blairp.dtsi +++ b/qcom/blairp.dtsi @@ -5,7 +5,7 @@ / { model = "Qualcomm Technologies, Inc. Blairp SoC"; compatible = "qcom,blairp"; - qcom,msm-id = <565 0x10000>; + qcom,msm-id = <565 0x10000>, <628 0x10000>; }; &soc {