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wls-chg: set fix register definition error

Browse source 
For original code from vender, some registers are defined
incorrectly. We should fix them as CPS4019's data sheet.

Change-Id: I2e5004a0578cbcd92ee046cea7e8d1af6e6900f3
Reviewed-on: https://gerrit.mot.com/2262811
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
weiweij 2022-05-07 18:03:38 +08:00 • committed by Wei Wei
commit 6a46f28d25
2 changed files with 17 additions and 28 deletions
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29
drivers/power/cps4019_wls_charger/cps4019_wls_charger.c
View file

@ -1041,38 +1041,27 @@ static int cps_wls_irq_process(int int_flag)
{
int rc = 0;
if ( int_flag & INT_TX_DATA_RECEIVED ) {
if (int_flag & INT_TX_DATA_RECEIVED) {
//todo
}
if( int_flag & INT_UV ) {
if(int_flag & INT_UV) {
//todo
}
if(int_flag & INT_OT) {
}
}
if(int_flag & INT_OC) {
}
}
if(int_flag & INT_OV) {
}
if(int_flag & INT_OPERATION_MODE) {
}
if(int_flag & INT_STAT_VRECT) {
}
if(int_flag & INT_ID_CFG_FINISH) {
cps_wls_set_int_enable();
}
if(int_flag & INT_STAT_VOUT) {
}
if(int_flag & INT_DATA_STORE) {
}
if(int_flag & INT_AC_MIS_DET) {
if(int_flag & INT_VOUT_STATE) {
}
//if(int_flag & INT_DATA_STORE){}
//if(int_flag & INT_AC_MIS_DET){}
return rc;
}

16
drivers/power/cps4019_wls_charger/cps4019_wls_charger.h
View file

@ -17,19 +17,19 @@
#define INT_TX_DATA_RECEIVED (0x01 << 0)
#define INT_UV (0x01 << 1)
#define INT_OT (0x01 << 2)
#define INT_OC (0x01 << 3)
#define INT_OV (0x01 << 4)
#define INT_OPERATION_MODE (0x01 << 5)
#define INT_STAT_VRECT (0x01 << 6)
#define INT_STAT_VOUT (0x01 << 7)
#define INT_OV (0x01 << 3)
#define INT_OC (0x01 << 4)
#define INT_ID_CFG_FINISH (0x01 << 5)
#define INT_VOUT_STATE (0x01 << 6)
#define INT_RSV_BIT_7 (0x01 << 7)
#define INT_RSV_BIT_8 (0x01 << 8)
#define INT_RSV_BIT_9 (0x01 << 9)
#define INT_RSV_BIT_A (0x01 << 10)
#define INT_RSV_BIT_B (0x01 << 11)
#define INT_RSV_BIT_C (0x01 << 12)
#define INT_RSV_BIT_D (0x01 << 13)
#define INT_DATA_STORE (0x01 << 14)
#define INT_AC_MIS_DET (0x01 << 15)
#define INT_RSV_BIT_E (0x01 << 14)
#define INT_RSV_BIT_F (0x01 << 15)
/*command define*/
#define CMD_SEND_RX_DATA (0x01 << 0)
@ -38,7 +38,7 @@
#define CMD_SEND_EPT_PKT (0x01 << 3)
#define CMD_SEND_CS_PKT (0x01 << 4)
#define CMD_CLEAR_INT (0x01 << 5)
#define CMD_WATCHDOG_RESET (0x01 << 6)
//#define CMD_WATCHDOG_RESET (0x01 << 6)
#define CMD_WATCHDOG_EN (0x01 << 7)
/*firmware download define*/