mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 13:44:26 -04:00
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: net/bluetooth/l2cap_core.c
This commit is contained in:
commit
6a7ebdf2fd
350 changed files with 26458 additions and 1786 deletions
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@ -117,10 +117,10 @@
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/* drbdsetup XY resize -d Z
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* you are free to reduce the device size to nothing, if you want to.
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* the upper limit with 64bit kernel, enough ram and flexible meta data
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* is 16 TB, currently. */
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* is 1 PiB, currently. */
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/* DRBD_MAX_SECTORS */
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#define DRBD_DISK_SIZE_SECT_MIN 0
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#define DRBD_DISK_SIZE_SECT_MAX (16 * (2LLU << 30))
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#define DRBD_DISK_SIZE_SECT_MAX (1 * (2LLU << 40))
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#define DRBD_DISK_SIZE_SECT_DEF 0 /* = disabled = no user size... */
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#define DRBD_ON_IO_ERROR_DEF EP_PASS_ON
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@ -204,6 +204,8 @@ extern bool __fscache_check_page_write(struct fscache_cookie *, struct page *);
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extern void __fscache_wait_on_page_write(struct fscache_cookie *, struct page *);
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extern bool __fscache_maybe_release_page(struct fscache_cookie *, struct page *,
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gfp_t);
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extern void __fscache_uncache_all_inode_pages(struct fscache_cookie *,
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struct inode *);
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/**
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* fscache_register_netfs - Register a filesystem as desiring caching services
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@ -643,4 +645,23 @@ bool fscache_maybe_release_page(struct fscache_cookie *cookie,
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return false;
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}
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/**
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* fscache_uncache_all_inode_pages - Uncache all an inode's pages
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* @cookie: The cookie representing the inode's cache object.
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* @inode: The inode to uncache pages from.
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*
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* Uncache all the pages in an inode that are marked PG_fscache, assuming them
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* to be associated with the given cookie.
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*
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* This function may sleep. It will wait for pages that are being written out
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* and will wait whilst the PG_fscache mark is removed by the cache.
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*/
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static inline
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void fscache_uncache_all_inode_pages(struct fscache_cookie *cookie,
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struct inode *inode)
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{
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if (fscache_cookie_valid(cookie))
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__fscache_uncache_all_inode_pages(cookie, inode);
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}
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#endif /* _LINUX_FSCACHE_H */
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@ -24,12 +24,6 @@
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* See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory()
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*/
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#define MEM_ALLOC_THRESHOLD (1024*768*4+32)
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/* Minimum value that the pixel clock can be set to in pico seconds
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* This is determined by platform clock/3 where the minimum platform
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* clock is 533MHz. This gives 5629 pico seconds.
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*/
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#define MIN_PIX_CLK 5629
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#define MAX_PIX_CLK 96096
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#include <linux/types.h>
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@ -676,7 +676,8 @@ void irq_gc_mask_disable_reg(struct irq_data *d);
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void irq_gc_mask_set_bit(struct irq_data *d);
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void irq_gc_mask_clr_bit(struct irq_data *d);
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void irq_gc_unmask_enable_reg(struct irq_data *d);
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void irq_gc_ack(struct irq_data *d);
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void irq_gc_ack_set_bit(struct irq_data *d);
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void irq_gc_ack_clr_bit(struct irq_data *d);
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void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
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void irq_gc_eoi(struct irq_data *d);
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int irq_gc_set_wake(struct irq_data *d, unsigned int on);
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@ -20,6 +20,8 @@
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#include <linux/compiler.h>
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#include <linux/mutex.h>
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#define MIN_MEMORY_BLOCK_SIZE (1 << SECTION_SIZE_BITS)
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struct memory_block {
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unsigned long start_section_nr;
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unsigned long end_section_nr;
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@ -3,4 +3,11 @@
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struct ds1wm_driver_data {
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int active_high;
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int clock_rate;
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/* in milliseconds, the amount of time to */
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/* sleep following a reset pulse. Zero */
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/* should work if your bus devices recover*/
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/* time respects the 1-wire spec since the*/
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/* ds1wm implements the precise timings of*/
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/* a reset pulse/presence detect sequence.*/
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unsigned int reset_recover_delay;
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};
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@ -64,6 +64,19 @@ struct mmc_ext_csd {
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unsigned long long enhanced_area_offset; /* Units: Byte */
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unsigned int enhanced_area_size; /* Units: KB */
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unsigned int boot_size; /* in bytes */
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u8 raw_partition_support; /* 160 */
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u8 raw_erased_mem_count; /* 181 */
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u8 raw_ext_csd_structure; /* 194 */
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u8 raw_card_type; /* 196 */
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u8 raw_s_a_timeout; /* 217 */
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u8 raw_hc_erase_gap_size; /* 221 */
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u8 raw_erase_timeout_mult; /* 223 */
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u8 raw_hc_erase_grp_size; /* 224 */
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u8 raw_sec_trim_mult; /* 229 */
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u8 raw_sec_erase_mult; /* 230 */
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u8 raw_sec_feature_support;/* 231 */
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u8 raw_trim_mult; /* 232 */
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u8 raw_sectors[4]; /* 212 - 4 bytes */
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};
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struct sd_scr {
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@ -808,7 +808,7 @@ enum cpu_idle_type {
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* when BITS_PER_LONG <= 32 are pretty high and the returns do not justify the
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* increased costs.
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*/
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#if BITS_PER_LONG > 32
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#if 0 /* BITS_PER_LONG > 32 -- currently broken: it increases power usage under light load */
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# define SCHED_LOAD_RESOLUTION 10
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# define scale_load(w) ((w) << SCHED_LOAD_RESOLUTION)
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# define scale_load_down(w) ((w) >> SCHED_LOAD_RESOLUTION)
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@ -9,7 +9,7 @@
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#ifndef _LINUX_LIRC_DEV_H
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#define _LINUX_LIRC_DEV_H
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#define MAX_IRCTL_DEVICES 4
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#define MAX_IRCTL_DEVICES 8
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#define BUFLEN 16
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#define mod(n, div) ((n) % (div))
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@ -2,10 +2,10 @@
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* Driver header for M-5MOLS 8M Pixel camera sensor with ISP
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*
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* Copyright (C) 2011 Samsung Electronics Co., Ltd.
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* Author: HeungJun Kim, riverful.kim@samsung.com
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* Author: HeungJun Kim <riverful.kim@samsung.com>
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*
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* Copyright (C) 2009 Samsung Electronics Co., Ltd.
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* Author: Dongsoo Nathaniel Kim, dongsoo45.kim@samsung.com
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* Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -173,16 +173,20 @@ struct v4l2_subdev_core_ops {
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struct v4l2_event_subscription *sub);
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};
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/* s_mode: switch the tuner to a specific tuner mode. Replacement of s_radio.
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/* s_radio: v4l device was opened in radio mode.
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s_radio: v4l device was opened in Radio mode, to be replaced by s_mode.
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g_frequency: freq->type must be filled in. Normally done by video_ioctl2
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or the bridge driver.
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g_tuner:
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s_tuner: vt->type must be filled in. Normally done by video_ioctl2 or the
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bridge driver.
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s_type_addr: sets tuner type and its I2C addr.
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s_config: sets tda9887 specific stuff, like port1, port2 and qss
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*/
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struct v4l2_subdev_tuner_ops {
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int (*s_mode)(struct v4l2_subdev *sd, enum v4l2_tuner_type);
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int (*s_radio)(struct v4l2_subdev *sd);
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int (*s_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq);
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int (*g_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq);
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@ -63,6 +63,7 @@ typedef enum {
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SCTP_CMD_ECN_ECNE, /* Do delayed ECNE processing. */
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SCTP_CMD_ECN_CWR, /* Do delayed CWR processing. */
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SCTP_CMD_TIMER_START, /* Start a timer. */
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SCTP_CMD_TIMER_START_ONCE, /* Start a timer once */
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SCTP_CMD_TIMER_RESTART, /* Restart a timer. */
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SCTP_CMD_TIMER_STOP, /* Stop a timer. */
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SCTP_CMD_INIT_CHOOSE_TRANSPORT, /* Choose transport for an INIT. */
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@ -80,7 +80,7 @@ static inline struct sctp_ulpevent *sctp_skb2event(struct sk_buff *skb)
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void sctp_ulpevent_free(struct sctp_ulpevent *);
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int sctp_ulpevent_is_notification(const struct sctp_ulpevent *);
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void sctp_queue_purge_ulpevents(struct sk_buff_head *list);
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unsigned int sctp_queue_purge_ulpevents(struct sk_buff_head *list);
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struct sctp_ulpevent *sctp_ulpevent_make_assoc_change(
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const struct sctp_association *asoc,
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@ -99,7 +99,14 @@ struct snd_sb_csp_info {
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/* get CSP information */
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#define SNDRV_SB_CSP_IOCTL_INFO _IOR('H', 0x10, struct snd_sb_csp_info)
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/* load microcode to CSP */
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#define SNDRV_SB_CSP_IOCTL_LOAD_CODE _IOW('H', 0x11, struct snd_sb_csp_microcode)
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/* NOTE: struct snd_sb_csp_microcode overflows the max size (13 bits)
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* defined for some architectures like MIPS, and it leads to build errors.
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* (x86 and co have 14-bit size, thus it's valid, though.)
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* As a workaround for skipping the size-limit check, here we don't use the
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* normal _IOW() macro but _IOC() with the manual argument.
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*/
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#define SNDRV_SB_CSP_IOCTL_LOAD_CODE \
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_IOC(_IOC_WRITE, 'H', 0x11, sizeof(struct snd_sb_csp_microcode))
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/* unload microcode from CSP */
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#define SNDRV_SB_CSP_IOCTL_UNLOAD_CODE _IO('H', 0x12)
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/* start CSP */
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