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Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6

Browse source 
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (37 commits)
  PCI: merge almost all of pci_32.h and pci_64.h together
  PCI: X86: Introduce and enable PCI domain support
  PCI: Add 'nodomains' boot option, and pci_domains_supported global
  PCI: modify PCI bridge control ISA flag for clarity
  PCI: use _CRS for PCI resource allocation
  PCI: avoid P2P prefetch window for expansion ROMs
  PCI: skip ISA ioresource alignment on some systems
  PCI: remove transparent bridge sizing
  pci: write file size to inode on proc bus file write
  pci: use size stored in proc_dir_entry for proc bus files
  pci: implement "pci=noaer"
  PCI: fix IDE legacy mode resources
  MSI: Use correct data offset for 32-bit MSI in read_msi_msg()
  PCI: Fix incorrect argument order to list_add_tail() in PCI dynamic ID code
  PCI: i386: Compaq EVO N800c needs PCI bus renumbering
  PCI: Remove no longer correct documentation regarding MSI vector assignment
  PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"
  PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID
  PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID
  cpqphp: Use PCI_CLASS_REVISION instead of PCI_REVISION_ID for read
  ...
This commit is contained in:
Linus Torvalds 2007-10-12 15:50:23 -07:00
commit 6a84258e5f
38 changed files with 654 additions and 544 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/pci/hotplug/cpqphp_core.c
View file

@ -549,7 +549,7 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
* slot. */
bus->number = tbus;
pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
PCI_REVISION_ID, &work);
PCI_CLASS_REVISION, &work);
if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
pci_bus_read_config_dword(bus,

74
drivers/pci/hotplug/cpqphp_ctrl.c
View file

@ -37,6 +37,7 @@
#include <linux/smp_lock.h>
#include <linux/pci.h>
#include <linux/pci_hotplug.h>
#include <linux/kthread.h>
#include "cpqphp.h"
static u32 configure_new_device(struct controller* ctrl, struct pci_func *func,
@ -45,34 +46,20 @@ static int configure_new_function(struct controller* ctrl, struct pci_func *func
u8 behind_bridge, struct resource_lists *resources);
static void interrupt_event_handler(struct controller *ctrl);
static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
static struct semaphore event_exit; /* guard ensure thread has exited before calling it quits */
static int event_finished;
static unsigned long pushbutton_pending; /* = 0 */
/* things needed for the long_delay function */
static struct semaphore delay_sem;
static wait_queue_head_t delay_wait;
static struct task_struct *cpqhp_event_thread;
static unsigned long pushbutton_pending; /* = 0 */
/* delay is in jiffies to wait for */
static void long_delay(int delay)
{
DECLARE_WAITQUEUE(wait, current);
/* only allow 1 customer into the delay queue at once
* yes this makes some people wait even longer, but who really cares?
* this is for _huge_ delays to make the hardware happy as the
* signals bounce around
/*
* XXX(hch): if someone is bored please convert all callers
* to call msleep_interruptible directly. They really want
* to specify timeouts in natural units and spend a lot of
* effort converting them to jiffies..
*/
down (&delay_sem);
init_waitqueue_head(&delay_wait);
add_wait_queue(&delay_wait, &wait);
msleep_interruptible(jiffies_to_msecs(delay));
remove_wait_queue(&delay_wait, &wait);
up(&delay_sem);
}
@ -955,8 +942,8 @@ irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
}
if (schedule_flag) {
up(&event_semaphore);
dbg("Signal event_semaphore\n");
wake_up_process(cpqhp_event_thread);
dbg("Waking even thread");
}
return IRQ_HANDLED;
}
@ -973,16 +960,13 @@ struct pci_func *cpqhp_slot_create(u8 busnumber)
struct pci_func *new_slot;
struct pci_func *next;
new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
if (new_slot == NULL) {
/* I'm not dead yet!
* You will be. */
return new_slot;
}
memset(new_slot, 0, sizeof(struct pci_func));
new_slot->next = NULL;
new_slot->configured = 1;
@ -1738,7 +1722,7 @@ static u32 remove_board(struct pci_func * func, u32 replace_flag, struct control
static void pushbutton_helper_thread(unsigned long data)
{
pushbutton_pending = data;
up(&event_semaphore);
wake_up_process(cpqhp_event_thread);
}
@ -1747,13 +1731,13 @@ static int event_thread(void* data)
{
struct controller *ctrl;
daemonize("phpd_event");
while (1) {
dbg("!!!!event_thread sleeping\n");
down_interruptible (&event_semaphore);
dbg("event_thread woken finished = %d\n", event_finished);
if (event_finished) break;
set_current_state(TASK_INTERRUPTIBLE);
schedule();
if (kthread_should_stop())
break;
/* Do stuff here */
if (pushbutton_pending)
cpqhp_pushbutton_thread(pushbutton_pending);
@ -1762,38 +1746,24 @@ static int event_thread(void* data)
interrupt_event_handler(ctrl);
}
dbg("event_thread signals exit\n");
up(&event_exit);
return 0;
}
int cpqhp_event_start_thread(void)
{
int pid;
/* initialize our semaphores */
init_MUTEX(&delay_sem);
init_MUTEX_LOCKED(&event_semaphore);
init_MUTEX_LOCKED(&event_exit);
event_finished=0;
pid = kernel_thread(event_thread, NULL, 0);
if (pid < 0) {
cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event");
if (IS_ERR(cpqhp_event_thread)) {
err ("Can't start up our event thread\n");
return -1;
return PTR_ERR(cpqhp_event_thread);
}
dbg("Our event thread pid = %d\n", pid);
return 0;
}
void cpqhp_event_stop_thread(void)
{
event_finished = 1;
dbg("event_thread finish command given\n");
up(&event_semaphore);
dbg("wait for event_thread to exit\n");
down(&event_exit);
kthread_stop(cpqhp_event_thread);
}

57
drivers/pci/hotplug/ibmphp_hpc.c
View file

@ -35,7 +35,7 @@
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/sched.h>
#include <linux/kthread.h>
#include "ibmphp.h"
static int to_debug = 0;
@ -101,12 +101,11 @@ static int to_debug = 0;
//----------------------------------------------------------------------------
// global variables
//----------------------------------------------------------------------------
static int ibmphp_shutdown;
static int tid_poll;
static struct mutex sem_hpcaccess; // lock access to HPC
static struct semaphore semOperations; // lock all operations and
// access to data structures
static struct semaphore sem_exit; // make sure polling thread goes away
static struct task_struct *ibmphp_poll_thread;
//----------------------------------------------------------------------------
// local function prototypes
//----------------------------------------------------------------------------
@ -116,10 +115,9 @@ static u8 hpc_writecmdtoindex (u8, u8);
static u8 hpc_readcmdtoindex (u8, u8);
static void get_hpc_access (void);
static void free_hpc_access (void);
static void poll_hpc (void);
static int poll_hpc(void *data);
static int process_changeinstatus (struct slot *, struct slot *);
static int process_changeinlatch (u8, u8, struct controller *);
static int hpc_poll_thread (void *);
static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *);
//----------------------------------------------------------------------------
@ -137,8 +135,6 @@ void __init ibmphp_hpc_initvars (void)
init_MUTEX (&semOperations);
init_MUTEX_LOCKED (&sem_exit);
to_debug = 0;
ibmphp_shutdown = 0;
tid_poll = 0;
debug ("%s - Exit\n", __FUNCTION__);
}
@ -819,7 +815,7 @@ void ibmphp_unlock_operations (void)
#define POLL_LATCH_REGISTER 0
#define POLL_SLOTS 1
#define POLL_SLEEP 2
static void poll_hpc (void)
static int poll_hpc(void *data)
{
struct slot myslot;
struct slot *pslot = NULL;
@ -833,10 +829,7 @@ static void poll_hpc (void)
debug ("%s - Entry\n", __FUNCTION__);
while (!ibmphp_shutdown) {
if (ibmphp_shutdown)
break;
while (!kthread_should_stop()) {
/* try to get the lock to do some kind of hardware access */
down (&semOperations);
@ -896,7 +889,7 @@ static void poll_hpc (void)
up (&semOperations);
msleep(POLL_INTERVAL_SEC * 1000);
if (ibmphp_shutdown)
if (kthread_should_stop())
break;
down (&semOperations);
@ -915,6 +908,7 @@ static void poll_hpc (void)
}
up (&sem_exit);
debug ("%s - Exit\n", __FUNCTION__);
return 0;
}
@ -1049,29 +1043,6 @@ static int process_changeinlatch (u8 old, u8 new, struct controller *ctrl)
return rc;
}
/*----------------------------------------------------------------------
* Name: hpc_poll_thread
*
* Action: polling
*
* Return 0
* Value:
*---------------------------------------------------------------------*/
static int hpc_poll_thread (void *data)
{
debug ("%s - Entry\n", __FUNCTION__);
daemonize("hpc_poll");
allow_signal(SIGKILL);
poll_hpc ();
tid_poll = 0;
debug ("%s - Exit\n", __FUNCTION__);
return 0;
}
/*----------------------------------------------------------------------
* Name: ibmphp_hpc_start_poll_thread
*
@ -1079,18 +1050,14 @@ static int hpc_poll_thread (void *data)
*---------------------------------------------------------------------*/
int __init ibmphp_hpc_start_poll_thread (void)
{
int rc = 0;
debug ("%s - Entry\n", __FUNCTION__);
tid_poll = kernel_thread (hpc_poll_thread, NULL, 0);
if (tid_poll < 0) {
ibmphp_poll_thread = kthread_run(poll_hpc, NULL, "hpc_poll");
if (IS_ERR(ibmphp_poll_thread)) {
err ("%s - Error, thread not started\n", __FUNCTION__);
rc = -1;
return PTR_ERR(ibmphp_poll_thread);
}
debug ("%s - Exit tid_poll[%d] rc[%d]\n", __FUNCTION__, tid_poll, rc);
return rc;
return 0;
}
/*----------------------------------------------------------------------
@ -1102,7 +1069,7 @@ void __exit ibmphp_hpc_stop_poll_thread (void)
{
debug ("%s - Entry\n", __FUNCTION__);
ibmphp_shutdown = 1;
kthread_stop(ibmphp_poll_thread);
debug ("before locking operations \n");
ibmphp_lock_operations ();
debug ("after locking operations \n");

24
drivers/pci/hotplug/pciehp_core.c
View file

@ -304,8 +304,8 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
hotplug_slot->info->attention_status = status;
if (ATTN_LED(slot->ctrl->ctrlcap))
if (ATTN_LED(slot->ctrl->ctrlcap))
slot->hpc_ops->set_attention_status(slot, status);
return 0;
@ -405,7 +405,7 @@ static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe
int retval;
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
retval = slot->hpc_ops->get_max_bus_speed(slot, value);
if (retval < 0)
*value = PCI_SPEED_UNKNOWN;
@ -419,7 +419,7 @@ static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe
int retval;
dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
retval = slot->hpc_ops->get_cur_bus_speed(slot, value);
if (retval < 0)
*value = PCI_SPEED_UNKNOWN;
@ -434,7 +434,7 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
struct slot *t_slot;
u8 value;
struct pci_dev *pdev;
ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
if (!ctrl) {
err("%s : out of memory\n", __FUNCTION__);
@ -502,23 +502,23 @@ static void pciehp_remove (struct pcie_device *dev)
#ifdef CONFIG_PM
static int pciehp_suspend (struct pcie_device *dev, pm_message_t state)
{
printk("%s ENTRY\n", __FUNCTION__);
printk("%s ENTRY\n", __FUNCTION__);
return 0;
}
static int pciehp_resume (struct pcie_device *dev)
{
printk("%s ENTRY\n", __FUNCTION__);
printk("%s ENTRY\n", __FUNCTION__);
return 0;
}
#endif
static struct pcie_port_service_id port_pci_ids[] = { {
.vendor = PCI_ANY_ID,
static struct pcie_port_service_id port_pci_ids[] = { {
.vendor = PCI_ANY_ID,
.device = PCI_ANY_ID,
.port_type = PCIE_ANY_PORT,
.service_type = PCIE_PORT_SERVICE_HP,
.driver_data = 0,
.driver_data = 0,
}, { /* end: all zeroes */ }
};
static const char device_name[] = "hpdriver";
@ -540,10 +540,6 @@ static int __init pcied_init(void)
{
int retval = 0;
#ifdef CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE
pciehp_poll_mode = 1;
#endif
retval = pcie_port_service_register(&hpdriver_portdrv);
dbg("pcie_port_service_register = %d\n", retval);
info(DRIVER_DESC " version: " DRIVER_VERSION "\n");

20
drivers/pci/hotplug/pciehp_ctrl.c
View file

@ -173,7 +173,7 @@ u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl)
return 1;
}
/* The following routines constitute the bulk of the
/* The following routines constitute the bulk of the
hotplug controller logic
*/
@ -181,7 +181,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot)
{
/* turn off slot, turn on Amber LED, turn off Green LED if supported*/
if (POWER_CTRL(ctrl->ctrlcap)) {
if (pslot->hpc_ops->power_off_slot(pslot)) {
if (pslot->hpc_ops->power_off_slot(pslot)) {
err("%s: Issue of Slot Power Off command failed\n",
__FUNCTION__);
return;
@ -189,7 +189,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot)
}
if (PWR_LED(ctrl->ctrlcap))
pslot->hpc_ops->green_led_off(pslot);
pslot->hpc_ops->green_led_off(pslot);
if (ATTN_LED(ctrl->ctrlcap)) {
if (pslot->hpc_ops->set_attention_status(pslot, 1)) {
@ -231,7 +231,7 @@ static int board_added(struct slot *p_slot)
if (retval)
return retval;
}
if (PWR_LED(ctrl->ctrlcap))
p_slot->hpc_ops->green_led_blink(p_slot);
@ -548,7 +548,7 @@ int pciehp_enable_slot(struct slot *p_slot)
mutex_unlock(&p_slot->ctrl->crit_sect);
return -ENODEV;
}
if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
if (rc || getstatus) {
info("%s: latch open on slot(%s)\n", __FUNCTION__,
@ -557,8 +557,8 @@ int pciehp_enable_slot(struct slot *p_slot)
return -ENODEV;
}
}
if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
if (rc || getstatus) {
info("%s: already enabled on slot(%s)\n", __FUNCTION__,
@ -593,7 +593,7 @@ int pciehp_disable_slot(struct slot *p_slot)
/* Check to see if (latch closed, card present, power on) */
mutex_lock(&p_slot->ctrl->crit_sect);
if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) {
if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) {
ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
if (ret || !getstatus) {
info("%s: no adapter on slot(%s)\n", __FUNCTION__,
@ -603,7 +603,7 @@ int pciehp_disable_slot(struct slot *p_slot)
}
}
if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
if (ret || getstatus) {
info("%s: latch open on slot(%s)\n", __FUNCTION__,
@ -613,7 +613,7 @@ int pciehp_disable_slot(struct slot *p_slot)
}
}
if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
if (ret || !getstatus) {
info("%s: already disabled slot(%s)\n", __FUNCTION__,

203
drivers/pci/hotplug/pciehp_hpc.c
View file

@ -39,37 +39,6 @@
#include "../pci.h"
#include "pciehp.h"
#ifdef DEBUG
#define DBG_K_TRACE_ENTRY ((unsigned int)0x00000001) /* On function entry */
#define DBG_K_TRACE_EXIT ((unsigned int)0x00000002) /* On function exit */
#define DBG_K_INFO ((unsigned int)0x00000004) /* Info messages */
#define DBG_K_ERROR ((unsigned int)0x00000008) /* Error messages */
#define DBG_K_TRACE (DBG_K_TRACE_ENTRY|DBG_K_TRACE_EXIT)
#define DBG_K_STANDARD (DBG_K_INFO|DBG_K_ERROR|DBG_K_TRACE)
/* Redefine this flagword to set debug level */
#define DEBUG_LEVEL DBG_K_STANDARD
#define DEFINE_DBG_BUFFER char __dbg_str_buf[256];
#define DBG_PRINT( dbg_flags, args... ) \
do { \
if ( DEBUG_LEVEL & ( dbg_flags ) ) \
{ \
int len; \
len = sprintf( __dbg_str_buf, "%s:%d: %s: ", \
__FILE__, __LINE__, __FUNCTION__ ); \
sprintf( __dbg_str_buf + len, args ); \
printk( KERN_NOTICE "%s\n", __dbg_str_buf ); \
} \
} while (0)
#define DBG_ENTER_ROUTINE DBG_PRINT (DBG_K_TRACE_ENTRY, "%s", "[Entry]");
#define DBG_LEAVE_ROUTINE DBG_PRINT (DBG_K_TRACE_EXIT, "%s", "[Exit]");
#else
#define DEFINE_DBG_BUFFER
#define DBG_ENTER_ROUTINE
#define DBG_LEAVE_ROUTINE
#endif /* DEBUG */
static atomic_t pciehp_num_controllers = ATOMIC_INIT(0);
@ -160,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
/* Link Width Encoding */
#define LNK_X1 0x01
#define LNK_X2 0x02
#define LNK_X4 0x04
#define LNK_X4 0x04
#define LNK_X8 0x08
#define LNK_X12 0x0C
#define LNK_X16 0x10
#define LNK_X16 0x10
#define LNK_X32 0x20
/*Field definitions of Link Status Register */
@ -221,8 +190,6 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
#define EMI_STATE 0x0080
#define EMI_STATUS_BIT 7
DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */
static irqreturn_t pcie_isr(int irq, void *dev_id);
static void start_int_poll_timer(struct controller *ctrl, int sec);
@ -231,14 +198,12 @@ static void int_poll_timeout(unsigned long data)
{
struct controller *ctrl = (struct controller *)data;
DBG_ENTER_ROUTINE
/* Poll for interrupt events. regs == NULL => polling */
pcie_isr(0, ctrl);
init_timer(&ctrl->poll_timer);
if (!pciehp_poll_time)
pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/
pciehp_poll_time = 2; /* default polling interval is 2 sec */
start_int_poll_timer(ctrl, pciehp_poll_time);
}
@ -289,8 +254,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
u16 slot_ctrl;
unsigned long flags;
DBG_ENTER_ROUTINE
mutex_lock(&ctrl->ctrl_lock);
retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
@ -299,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
goto out;
}
if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
/* After 1 sec and CMD_COMPLETED still not set, just
proceed forward to issue the next command according
to spec. Just print out the error message */
@ -332,7 +295,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
retval = pcie_wait_cmd(ctrl);
out:
mutex_unlock(&ctrl->ctrl_lock);
DBG_LEAVE_ROUTINE
return retval;
}
@ -341,8 +303,6 @@ static int hpc_check_lnk_status(struct controller *ctrl)
u16 lnk_status;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status);
if (retval) {
err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
@ -350,26 +310,22 @@ static int hpc_check_lnk_status(struct controller *ctrl)
}
dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status);
if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) ||
if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) ||
!(lnk_status & NEG_LINK_WD)) {
err("%s : Link Training Error occurs \n", __FUNCTION__);
retval = -1;
return retval;
}
DBG_LEAVE_ROUTINE
return retval;
}
static int hpc_get_attention_status(struct slot *slot, u8 *status)
{
struct controller *ctrl = slot->ctrl;
u16 slot_ctrl;
u8 atten_led_state;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl);
if (retval) {
@ -400,7 +356,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status)
break;
}
DBG_LEAVE_ROUTINE
return 0;
}
@ -410,8 +365,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status)
u16 slot_ctrl;
u8 pwr_state;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl);
if (retval) {
@ -428,35 +381,30 @@ static int hpc_get_power_status(struct slot *slot, u8 *status)
*status = 1;
break;
case 1:
*status = 0;
*status = 0;
break;
default:
*status = 0xFF;
break;
}
DBG_LEAVE_ROUTINE
return retval;
}
static int hpc_get_latch_status(struct slot *slot, u8 *status)
{
struct controller *ctrl = slot->ctrl;
u16 slot_status;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
if (retval) {
err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
return retval;
}
*status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1;
*status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1;
DBG_LEAVE_ROUTINE
return 0;
}
@ -467,8 +415,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
u8 card_state;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
if (retval) {
err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
@ -477,7 +423,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
card_state = (u8)((slot_status & PRSN_STATE) >> 6);
*status = (card_state == 1) ? 1 : 0;
DBG_LEAVE_ROUTINE
return 0;
}
@ -488,16 +433,13 @@ static int hpc_query_power_fault(struct slot *slot)
u8 pwr_fault;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
if (retval) {
err("%s: Cannot check for power fault\n", __FUNCTION__);
return retval;
}
pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1);
DBG_LEAVE_ROUTINE
return pwr_fault;
}
@ -507,8 +449,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status)
u16 slot_status;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status);
if (retval) {
err("%s : Cannot check EMI status\n", __FUNCTION__);
@ -516,7 +456,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status)
}
*status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT;
DBG_LEAVE_ROUTINE
return retval;
}
@ -526,8 +465,6 @@ static int hpc_toggle_emi(struct slot *slot)
u16 cmd_mask;
int rc;
DBG_ENTER_ROUTINE
slot_cmd = EMI_CTRL;
cmd_mask = EMI_CTRL;
if (!pciehp_poll_mode) {
@ -537,7 +474,7 @@ static int hpc_toggle_emi(struct slot *slot)
rc = pcie_write_cmd(slot, slot_cmd, cmd_mask);
slot->last_emi_toggle = get_seconds();
DBG_LEAVE_ROUTINE
return rc;
}
@ -548,8 +485,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
u16 cmd_mask;
int rc;
DBG_ENTER_ROUTINE
cmd_mask = ATTN_LED_CTRL;
switch (value) {
case 0 : /* turn off */
@ -572,19 +507,15 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
rc = pcie_write_cmd(slot, slot_cmd, cmd_mask);
dbg("%s: SLOTCTRL %x write cmd %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
DBG_LEAVE_ROUTINE
return rc;
}
static void hpc_set_green_led_on(struct slot *slot)
{
struct controller *ctrl = slot->ctrl;
u16 slot_cmd;
u16 cmd_mask;
DBG_ENTER_ROUTINE
slot_cmd = 0x0100;
cmd_mask = PWR_LED_CTRL;
@ -597,8 +528,6 @@ static void hpc_set_green_led_on(struct slot *slot)
dbg("%s: SLOTCTRL %x write cmd %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
DBG_LEAVE_ROUTINE
return;
}
static void hpc_set_green_led_off(struct slot *slot)
@ -607,8 +536,6 @@ static void hpc_set_green_led_off(struct slot *slot)
u16 slot_cmd;
u16 cmd_mask;
DBG_ENTER_ROUTINE
slot_cmd = 0x0300;
cmd_mask = PWR_LED_CTRL;
if (!pciehp_poll_mode) {
@ -619,9 +546,6 @@ static void hpc_set_green_led_off(struct slot *slot)
pcie_write_cmd(slot, slot_cmd, cmd_mask);
dbg("%s: SLOTCTRL %x write cmd %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
DBG_LEAVE_ROUTINE
return;
}
static void hpc_set_green_led_blink(struct slot *slot)
@ -629,8 +553,6 @@ static void hpc_set_green_led_blink(struct slot *slot)
struct controller *ctrl = slot->ctrl;
u16 slot_cmd;
u16 cmd_mask;
DBG_ENTER_ROUTINE
slot_cmd = 0x0200;
cmd_mask = PWR_LED_CTRL;
@ -643,14 +565,10 @@ static void hpc_set_green_led_blink(struct slot *slot)
dbg("%s: SLOTCTRL %x write cmd %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
DBG_LEAVE_ROUTINE
return;
}
static void hpc_release_ctlr(struct controller *ctrl)
{
DBG_ENTER_ROUTINE
if (pciehp_poll_mode)
del_timer(&ctrl->poll_timer);
else
@ -662,8 +580,6 @@ static void hpc_release_ctlr(struct controller *ctrl)
*/
if (atomic_dec_and_test(&pciehp_num_controllers))
destroy_workqueue(pciehp_wq);
DBG_LEAVE_ROUTINE
}
static int hpc_power_on_slot(struct slot * slot)
@ -674,8 +590,6 @@ static int hpc_power_on_slot(struct slot * slot)
u16 slot_status;
int retval = 0;
DBG_ENTER_ROUTINE
dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot);
/* Clear sticky power-fault bit from previous power failures */
@ -719,8 +633,6 @@ static int hpc_power_on_slot(struct slot * slot)
dbg("%s: SLOTCTRL %x write cmd %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
DBG_LEAVE_ROUTINE
return retval;
}
@ -731,8 +643,6 @@ static int hpc_power_off_slot(struct slot * slot)
u16 cmd_mask;
int retval = 0;
DBG_ENTER_ROUTINE
dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot);
slot_cmd = POWER_OFF;
@ -764,8 +674,6 @@ static int hpc_power_off_slot(struct slot * slot)
dbg("%s: SLOTCTRL %x write cmd %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
DBG_LEAVE_ROUTINE
return retval;
}
@ -784,8 +692,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
return IRQ_NONE;
}
intr_detect = ( ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | MRL_SENS_CHANGED |
PRSN_DETECT_CHANGED | CMD_COMPLETED );
intr_detect = (ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED |
MRL_SENS_CHANGED | PRSN_DETECT_CHANGED | CMD_COMPLETED);
intr_loc = slot_status & intr_detect;
@ -807,7 +715,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n",
__FUNCTION__, temp_word);
temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
temp_word = (temp_word & ~HP_INTR_ENABLE &
~CMD_CMPL_INTR_ENABLE) | 0x00;
rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);
if (rc) {
err("%s: Cannot write to SLOTCTRL register\n",
@ -825,7 +734,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
}
dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n",
__FUNCTION__, slot_status);
/* Clear command complete interrupt caused by this write */
temp_word = 0x1f;
rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
@ -835,10 +744,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
return IRQ_NONE;
}
}
if (intr_loc & CMD_COMPLETED) {
/*
* Command Complete Interrupt Pending
/*
* Command Complete Interrupt Pending
*/
ctrl->cmd_busy = 0;
wake_up_interruptible(&ctrl->queue);
@ -892,7 +801,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
__FUNCTION__);
return IRQ_NONE;
}
/* Clear command complete interrupt caused by this write */
temp_word = 0x1F;
rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
@ -904,19 +813,17 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n",
__FUNCTION__, temp_word);
}
return IRQ_HANDLED;
}
static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
static int hpc_get_max_lnk_speed(struct slot *slot, enum pci_bus_speed *value)
{
struct controller *ctrl = slot->ctrl;
enum pcie_link_speed lnk_speed;
u32 lnk_cap;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap);
if (retval) {
err("%s: Cannot read LNKCAP register\n", __FUNCTION__);
@ -934,19 +841,18 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
*value = lnk_speed;
dbg("Max link speed = %d\n", lnk_speed);
DBG_LEAVE_ROUTINE
return retval;
}
static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value)
static int hpc_get_max_lnk_width(struct slot *slot,
enum pcie_link_width *value)
{
struct controller *ctrl = slot->ctrl;
enum pcie_link_width lnk_wdth;
u32 lnk_cap;
int retval = 0;
DBG_ENTER_ROUTINE
retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap);
if (retval) {
err("%s: Cannot read LNKCAP register\n", __FUNCTION__);
@ -985,19 +891,17 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value
*value = lnk_wdth;
dbg("Max link width = %d\n", lnk_wdth);
DBG_LEAVE_ROUTINE
return retval;
}
static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
static int hpc_get_cur_lnk_speed(struct slot *slot, enum pci_bus_speed *value)
{
struct controller *ctrl = slot->ctrl;
enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN;
int retval = 0;
u16 lnk_status;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status);
if (retval) {
err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
@ -1015,25 +919,24 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
*value = lnk_speed;
dbg("Current link speed = %d\n", lnk_speed);
DBG_LEAVE_ROUTINE
return retval;
}
static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value)
static int hpc_get_cur_lnk_width(struct slot *slot,
enum pcie_link_width *value)
{
struct controller *ctrl = slot->ctrl;
enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
int retval = 0;
u16 lnk_status;
DBG_ENTER_ROUTINE
retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status);
if (retval) {
err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
return retval;
}
switch ((lnk_status & 0x03F0) >> 4){
case 0:
lnk_wdth = PCIE_LNK_WIDTH_RESRV;
@ -1066,7 +969,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value
*value = lnk_wdth;
dbg("Current link width = %d\n", lnk_wdth);
DBG_LEAVE_ROUTINE
return retval;
}
@ -1085,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = {
.get_cur_bus_speed = hpc_get_cur_lnk_speed,
.get_max_lnk_width = hpc_get_max_lnk_width,
.get_cur_lnk_width = hpc_get_cur_lnk_width,
.query_power_fault = hpc_query_power_fault,
.green_led_on = hpc_set_green_led_on,
.green_led_off = hpc_set_green_led_off,
.green_led_blink = hpc_set_green_led_blink,
.release_ctlr = hpc_release_ctlr,
.check_lnk_status = hpc_check_lnk_status,
};
@ -1138,6 +1041,7 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev)
dbg("Trying to get hotplug control for %s \n",
(char *)string.pointer);
status = pci_osc_control_set(handle,
OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL |
OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
if (status == AE_NOT_FOUND)
status = acpi_run_oshp(handle);
@ -1163,8 +1067,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev)
}
#endif
int pcie_init(struct controller * ctrl, struct pcie_device *dev)
{
int rc;
@ -1176,8 +1078,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
u16 slot_status, slot_ctrl;
struct pci_dev *pdev;
DBG_ENTER_ROUTINE
pdev = dev->port;
ctrl->pci_dev = pdev; /* save pci_dev in context */
@ -1201,9 +1101,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
dbg("%s: CAPREG offset %x cap_reg %x\n",
__FUNCTION__, ctrl->cap_base + CAPREG, cap_reg);
if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040)
if (((cap_reg & SLOT_IMPL) == 0) ||
(((cap_reg & DEV_PORT_TYPE) != 0x0040)
&& ((cap_reg & DEV_PORT_TYPE) != 0x0060))) {
dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__);
dbg("%s : This is not a root port or the port is not "
"connected to a slot\n", __FUNCTION__);
goto abort_free_ctlr;
}
@ -1236,14 +1138,15 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl);
for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
for (rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
if (pci_resource_len(pdev, rc) > 0)
dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc,
(unsigned long long)pci_resource_start(pdev, rc),
(unsigned long long)pci_resource_len(pdev, rc));
info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device,
pdev->subsystem_vendor, pdev->subsystem_device);
info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
pdev->vendor, pdev->device,
pdev->subsystem_vendor, pdev->subsystem_device);
mutex_init(&ctrl->crit_sect);
mutex_init(&ctrl->ctrl_lock);
@ -1267,7 +1170,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
dbg("%s: SLOTCTRL %x value read %x\n",
__FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word);
temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) |
0x00;
rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);
if (rc) {
@ -1330,14 +1234,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
if (ATTN_BUTTN(slot_cap))
intr_enable = intr_enable | ATTN_BUTTN_ENABLE;
if (POWER_CTRL(slot_cap))
intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE;
if (MRL_SENS(slot_cap))
intr_enable = intr_enable | MRL_DETECT_ENABLE;
temp_word = (temp_word & ~intr_enable) | intr_enable;
temp_word = (temp_word & ~intr_enable) | intr_enable;
if (pciehp_poll_mode) {
temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0;
@ -1345,7 +1249,10 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
}
/* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */
/*
* Unmask Hot-plug Interrupt Enable for the interrupt
* notification mechanism case.
*/
rc = pciehp_writew(ctrl, SLOTCTRL, temp_word);
if (rc) {
err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__);
@ -1356,14 +1263,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
goto abort_disable_intr;
}
temp_word = 0x1F; /* Clear all events */
rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
if (rc) {
err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__);
goto abort_disable_intr;
}
if (pciehp_force) {
dbg("Bypassing BIOS check for pciehp use on %s\n",
pci_name(ctrl->pci_dev));
@ -1375,10 +1282,9 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
ctrl->hpc_ops = &pciehp_hpc_ops;
DBG_LEAVE_ROUTINE
return 0;
/* We end up here for the many possible ways to fail this API. */
/* We end up here for the many possible ways to fail this API. */
abort_disable_intr:
rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word);
if (!rc) {
@ -1395,6 +1301,5 @@ abort_free_irq:
free_irq(ctrl->pci_dev->irq, ctrl);
abort_free_ctlr:
DBG_LEAVE_ROUTINE
return -1;
}

24
drivers/pci/hotplug/pciehp_pci.c
View file

@ -243,9 +243,10 @@ int pciehp_configure_device(struct slot *p_slot)
int pciehp_unconfigure_device(struct slot *p_slot)
{
int rc = 0;
int ret, rc = 0;
int j;
u8 bctl = 0;
u8 presence = 0;
struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus,
@ -263,23 +264,28 @@ int pciehp_unconfigure_device(struct slot *p_slot)
continue;
}
if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl);
if (bctl & PCI_BRIDGE_CTL_VGA) {
err("Cannot remove display device %s\n",
ret = p_slot->hpc_ops->get_adapter_status(p_slot,
&presence);
if (!ret && presence) {
pci_read_config_byte(temp, PCI_BRIDGE_CONTROL,
&bctl);
if (bctl & PCI_BRIDGE_CTL_VGA) {
err("Cannot remove display device %s\n",
pci_name(temp));
pci_dev_put(temp);
continue;
pci_dev_put(temp);
continue;
}
}
}
pci_remove_bus_device(temp);
pci_dev_put(temp);
}
/*
/*
* Some PCI Express root ports require fixup after hot-plug operation.
*/
if (pcie_mch_quirk)
if (pcie_mch_quirk)
pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev);
return rc;
}

2
drivers/pci/msi.c
View file

@ -132,7 +132,7 @@ void read_msi_msg(unsigned int irq, struct msi_msg *msg)
pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
} else {
msg->address_hi = 0;
pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
}
msg->data = data;
break;

3
drivers/pci/pci-driver.c
View file

@ -54,7 +54,6 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count)
if (!dynid)
return -ENOMEM;
INIT_LIST_HEAD(&dynid->node);
dynid->id.vendor = vendor;
dynid->id.device = device;
dynid->id.subvendor = subvendor;
@ -65,7 +64,7 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count)
driver_data : 0UL;
spin_lock(&pdrv->dynids.lock);
list_add_tail(&pdrv->dynids.list, &dynid->node);
list_add_tail(&dynid->node, &pdrv->dynids.list);
spin_unlock(&pdrv->dynids.lock);
if (get_driver(&pdrv->driver)) {

20
drivers/pci/pci.c
View file

@ -17,11 +17,16 @@
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/log2.h>
#include <asm/dma.h> /* isa_dma_bridge_buggy */
#include "pci.h"
unsigned int pci_pm_d3_delay = 10;
#ifdef CONFIG_PCI_DOMAINS
int pci_domains_supported = 1;
#endif
#define DEFAULT_CARDBUS_IO_SIZE (256)
#define DEFAULT_CARDBUS_MEM_SIZE (64*1024*1024)
/* pci=cbmemsize=nnM,cbiosize=nn can override this */
@ -1454,7 +1459,7 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
int cap, err = -EINVAL;
u32 stat, cmd, v, o;
if (mmrbc < 512 || mmrbc > 4096 || (mmrbc & (mmrbc-1)))
if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc))
goto out;
v = ffs(mmrbc) - 10;
@ -1526,7 +1531,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
int cap, err = -EINVAL;
u16 ctl, v;
if (rq < 128 || rq > 4096 || (rq & (rq-1)))
if (rq < 128 || rq > 4096 || !is_power_of_2(rq))
goto out;
v = (ffs(rq) - 8) << 12;
@ -1566,6 +1571,13 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags)
return bars;
}
static void __devinit pci_no_domains(void)
{
#ifdef CONFIG_PCI_DOMAINS
pci_domains_supported = 0;
#endif
}
static int __devinit pci_init(void)
{
struct pci_dev *dev = NULL;
@ -1585,6 +1597,10 @@ static int __devinit pci_setup(char *str)
if (*str && (str = pcibios_setup(str)) && *str) {
if (!strcmp(str, "nomsi")) {
pci_no_msi();
} else if (!strcmp(str, "noaer")) {
pci_no_aer();
} else if (!strcmp(str, "nodomains")) {
pci_no_domains();
} else if (!strncmp(str, "cbiosize=", 9)) {
pci_cardbus_io_size = memparse(str + 9, &str);
} else if (!strncmp(str, "cbmemsize=", 10)) {

6
drivers/pci/pci.h
View file

@ -51,6 +51,12 @@ void pci_restore_msi_state(struct pci_dev *dev);
static inline void pci_restore_msi_state(struct pci_dev *dev) {}
#endif
#ifdef CONFIG_PCIEAER
void pci_no_aer(void);
#else
static inline void pci_no_aer(void) { }
#endif
static inline int pci_no_d1d2(struct pci_dev *dev)
{
unsigned int parent_dstates = 0;

9
drivers/pci/pcie/Kconfig
View file

@ -25,13 +25,4 @@ config HOTPLUG_PCI_PCIE
When in doubt, say N.
config HOTPLUG_PCI_PCIE_POLL_EVENT_MODE
bool "Use polling mechanism for hot-plug events (for testing purpose)"
depends on HOTPLUG_PCI_PCIE
help
Say Y here if you want to use the polling mechanism for hot-plug
events for early platform testing.
When in doubt, say N.
source "drivers/pci/pcie/aer/Kconfig"

9
drivers/pci/pcie/aer/aerdrv.c
View file

@ -81,6 +81,13 @@ static struct pcie_port_service_driver aerdriver = {
.reset_link = aer_root_reset,
};
static int pcie_aer_disable;
void pci_no_aer(void)
{
pcie_aer_disable = 1; /* has priority over 'forceload' */
}
/**
* aer_irq - Root Port's ISR
* @irq: IRQ assigned to Root Port
@ -327,6 +334,8 @@ static void aer_error_resume(struct pci_dev *dev)
**/
static int __init aer_service_init(void)
{
if (pcie_aer_disable)
return -ENXIO;
return pcie_port_service_register(&aerdriver);
}

53
drivers/pci/probe.c
View file

@ -276,8 +276,7 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK);
if (sz) {
res->flags = (l & IORESOURCE_ROM_ENABLE) |
IORESOURCE_MEM | IORESOURCE_PREFETCH |
IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
IORESOURCE_MEM | IORESOURCE_READONLY;
res->start = l & PCI_ROM_ADDRESS_MASK;
res->end = res->start + (unsigned long) sz;
}
@ -597,7 +596,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass
pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
if (!is_cardbus) {
child->bridge_ctl = bctl | PCI_BRIDGE_CTL_NO_ISA;
child->bridge_ctl = bctl;
/*
* Adjust subordinate busnr in parent buses.
* We do this before scanning for children because
@ -744,22 +743,46 @@ static int pci_setup_device(struct pci_dev * dev)
*/
if (class == PCI_CLASS_STORAGE_IDE) {
u8 progif;
struct pci_bus_region region;
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
if ((progif & 1) == 0) {
dev->resource[0].start = 0x1F0;
dev->resource[0].end = 0x1F7;
dev->resource[0].flags = LEGACY_IO_RESOURCE;
dev->resource[1].start = 0x3F6;
dev->resource[1].end = 0x3F6;
dev->resource[1].flags = LEGACY_IO_RESOURCE;
struct resource resource = {
.start = 0x1F0,
.end = 0x1F7,
.flags = LEGACY_IO_RESOURCE,
};
pcibios_resource_to_bus(dev, &region, &resource);
dev->resource[0].start = region.start;
dev->resource[0].end = region.end;
dev->resource[0].flags = resource.flags;
resource.start = 0x3F6;
resource.end = 0x3F6;
resource.flags = LEGACY_IO_RESOURCE;
pcibios_resource_to_bus(dev, &region, &resource);
dev->resource[1].start = region.start;
dev->resource[1].end = region.end;
dev->resource[1].flags = resource.flags;
}
if ((progif & 4) == 0) {
dev->resource[2].start = 0x170;
dev->resource[2].end = 0x177;
dev->resource[2].flags = LEGACY_IO_RESOURCE;
dev->resource[3].start = 0x376;
dev->resource[3].end = 0x376;
dev->resource[3].flags = LEGACY_IO_RESOURCE;
struct resource resource = {
.start = 0x170,
.end = 0x177,
.flags = LEGACY_IO_RESOURCE,
};
pcibios_resource_to_bus(dev, &region, &resource);
dev->resource[2].start = region.start;
dev->resource[2].end = region.end;
dev->resource[2].flags = resource.flags;
resource.start = 0x376;
resource.end = 0x376;
resource.flags = LEGACY_IO_RESOURCE;
pcibios_resource_to_bus(dev, &region, &resource);
dev->resource[3].start = region.start;
dev->resource[3].end = region.end;
dev->resource[3].flags = resource.flags;
}
}
break;

7
drivers/pci/proc.c
View file

@ -60,7 +60,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
*/
if (capable(CAP_SYS_ADMIN))
size = dev->cfg_size;
size = dp->size;
else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
size = 128;
else
@ -129,11 +129,11 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
static ssize_t
proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
{
const struct inode *ino = file->f_path.dentry->d_inode;
struct inode *ino = file->f_path.dentry->d_inode;
const struct proc_dir_entry *dp = PDE(ino);
struct pci_dev *dev = dp->data;
int pos = *ppos;
int size = dev->cfg_size;
int size = dp->size;
int cnt;
if (pos >= size)
@ -193,6 +193,7 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
}
*ppos = pos;
i_size_write(ino, dp->size);
return nbytes;
}

43
drivers/pci/quirks.c
View file

@ -472,11 +472,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_3, quirk_
*/
static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev)
{
u8 rev;
u32 region;
pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
if (rev & 0x10) {
if (dev->revision & 0x10) {
pci_read_config_dword(dev, 0x48, &region);
region &= PCI_BASE_ADDRESS_IO_MASK;
quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI");
@ -629,12 +627,9 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk
*/
static void __init quirk_amd_8131_mmrbc(struct pci_dev *dev)
{
unsigned char revid;
pci_read_config_byte(dev, PCI_REVISION_ID, &revid);
if (dev->subordinate && revid <= 0x12) {
if (dev->subordinate && dev->revision <= 0x12) {
printk(KERN_INFO "AMD8131 rev %x detected, disabling PCI-X "
"MMRBC\n", revid);
"MMRBC\n", dev->revision);
dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC;
}
}
@ -930,38 +925,6 @@ static void __init quirk_eisa_bridge(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge );
/*
* On the MSI-K8T-Neo2Fir Board, the internal Soundcard is disabled
* when a PCI-Soundcard is added. The BIOS only gives Options
* "Disabled" and "AUTO". This Quirk Sets the corresponding
* Register-Value to enable the Soundcard.
*
* FIXME: Presently this quirk will run on anything that has an 8237
* which isn't correct, we need to check DMI tables or something in
* order to make sure it only runs on the MSI-K8T-Neo2Fir. Because it
* runs everywhere at present we suppress the printk output in most
* irrelevant cases.
*/
static void k8t_sound_hostbridge(struct pci_dev *dev)
{
unsigned char val;
pci_read_config_byte(dev, 0x50, &val);
if (val == 0xc8) {
/* Assume it's probably a MSI-K8T-Neo2Fir */
printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, attempting to turn soundcard ON\n");
pci_write_config_byte(dev, 0x50, val & (~0x40));
/* Verify the Change for Status output */
pci_read_config_byte(dev, 0x50, &val);
if (val & 0x40)
printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard still off\n");
else
printk(KERN_INFO "PCI: MSI-K8T-Neo2Fir, soundcard on\n");
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge);
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_hostbridge);
/*
* On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge

5
drivers/pci/setup-bus.c
View file

@ -472,7 +472,12 @@ void pci_bus_size_bridges(struct pci_bus *bus)
break;
case PCI_CLASS_BRIDGE_PCI:
/* don't size subtractive decoding (transparent)
* PCI-to-PCI bridges */
if (bus->self->transparent)
break;
pci_bridge_check_ranges(bus);
/* fall through */
default:
pbus_size_io(bus);
/* If the bridge supports prefetchable range, size it