diff --git a/qcom/Makefile b/qcom/Makefile
index f33d75c4c022..a5593e0a6a67 100644
--- a/qcom/Makefile
+++ b/qcom/Makefile
@@ -242,6 +242,11 @@ dtb-$(CONFIG_ARCH_QTI_VM) += yupik-vm-rumi.dtb \
 endif
 endif
 
+dtb-$(CONFIG_QTI_QUIN_GVM) += sa8155-vm-la.dtb \
+	sa8155-vm-lv.dtb \
+	sa8155-vm-la-mt.dtb \
+	sa8155-vm-lv-mt.dtb
+
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
 clean-files	:= *.dtb *.dtbo
diff --git a/qcom/quin-vm-common.dtsi b/qcom/quin-vm-common.dtsi
new file mode 100644
index 000000000000..a8993b0c00a1
--- /dev/null
+++ b/qcom/quin-vm-common.dtsi
@@ -0,0 +1,182 @@
+#include <dt-bindings/arm/msm/msm_ion_ids.h>
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	chosen {
+		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket";
+	};
+
+	soc: soc { };
+
+	reserved_memory: reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* global autoconfigured region for contiguous allocations */
+		linux,cma {
+			compatible = "shared-dma-pool";
+			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
+			reusable;
+			alignment = <0x0 0x400000>;
+			size = <0x0 0x2000000>;
+			linux,cma-default;
+		};
+
+		qseecom_mem: qseecom_region {
+			compatible = "shared-dma-pool";
+			alloc-ranges = <0 0x00000000 0 0xffffffff>;
+			reusable;
+			alignment = <0 0x400000>;
+			size = <0 0x1400000>;
+		};
+
+		qseecom_ta_mem: qseecom_ta_region {
+			compatible = "shared-dma-pool";
+			alloc-ranges = <0 0x00000000 0 0xffffffff>;
+			reusable;
+			alignment = <0 0x400000>;
+			size = <0 0x1000000>;
+		};
+	};
+
+	firmware: firmware {
+		android {
+			compatible = "android,firmware";
+			vbmeta {
+				compatible = "android,vbmeta";
+				parts = "vbmeta,boot,system,vendor,dtbo";
+			};
+
+			fstab {
+				compatible = "android,fstab";
+				vendor {
+					compatible = "android,vendor";
+					dev="/dev/block/platform/vdevs/1c0f0000.virtio_blk/vdc";
+					type = "ext4";
+					mnt_flags = "ro,barrier=1,discard";
+					fsmgr_flags = "wait";
+					status = "ok";
+				};
+			};
+		};
+	};
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&intc>;
+	ranges = <0 0 0 0xffffffff>;
+	compatible = "simple-bus";
+
+	intc: vgic@0 {
+		qvm,vdev = "gic";
+	};
+
+	dummycc: qcom,dummycc {
+		compatible = "qcom,dummycc";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	gcc: virtio_clock@1c200000 {
+		compatible = "virtio,mmio";
+		reg = <0x1c200000 0x1000>;
+		interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	scc: virtio_clock@1c300000 {
+		compatible = "virtio,mmio";
+		reg = <0x1c300000 0x1000>;
+		interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
+		#clock-cells = <1>;
+	};
+
+	regulator: virtio_regulator@1c700000 {
+		compatible = "virtio,mmio";
+		reg = <0x1c700000 0x1000>;
+		interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	msm_ion: qcom,ion {
+		compatible = "qcom,msm-ion";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		system_heap: qcom,ion-heap@25 {
+			reg = <ION_SYSTEM_HEAP_ID>;
+			qcom,ion-heap-type = "SYSTEM";
+		};
+
+		qcom,ion-heap@27 { /* QSEECOM HEAP */
+			reg = <ION_QSECOM_HEAP_ID>;
+			memory-region = <&qseecom_mem>;
+			qcom,ion-heap-type = "DMA";
+		};
+
+		qcom,ion-heap@19 { /* QSEECOM TA HEAP */
+			reg = <ION_QSECOM_TA_HEAP_ID>;
+			memory-region = <&qseecom_ta_mem>;
+			qcom,ion-heap-type = "DMA";
+		};
+	};
+
+	qcom,msm-imem@14680000 {
+		compatible = "qcom,msm-imem";
+		reg = <0x14680000 0x1000>;
+		ranges = <0x0 0x14680000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		mem_dump_table@10 {
+			compatible = "qcom,msm-imem-mem_dump_table";
+			reg = <0x10 0x8>;
+		};
+
+		restart_reason@65c {
+			compatible = "qcom,msm-imem-restart_reason";
+			reg = <0x65c 0x4>;
+		};
+
+		dload_type@1c {
+			compatible = "qcom,msm-imem-dload-type";
+			reg = <0x1c 0x4>;
+		};
+
+		boot_stats@6b0 {
+			compatible = "qcom,msm-imem-boot_stats";
+			reg = <0x6b0 0x20>;
+		};
+
+		kaslr_offset@6d0 {
+			compatible = "qcom,msm-imem-kaslr_offset";
+			reg = <0x6d0 0xc>;
+		};
+
+		pil@94c {
+			compatible = "qcom,msm-imem-pil";
+			reg = <0x94c 0xc8>;
+		};
+
+		diag_dload@c8 {
+			compatible = "qcom,msm-imem-diag-dload";
+			reg = <0xc8 0xc8>;
+		};
+	};
+
+	qcom,mpm2-sleep-counter@0xc221000 {
+		compatible = "qcom,mpm2-sleep-counter";
+		reg = <0xc221000 0x1000>;
+		clock-frequency = <32768>;
+	};
+};
diff --git a/qcom/sa8155-vm-la-mt.dts b/qcom/sa8155-vm-la-mt.dts
new file mode 100644
index 000000000000..156d1895f826
--- /dev/null
+++ b/qcom/sa8155-vm-la-mt.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "sa8155-vm.dtsi"
+#include "sa8155-vm-la-mt.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SA8155 Multi LA Virtual Machine";
+	compatible = "qcom,sa8155";
+	qcom,pmic-name = "PM8150";
+	qcom,board-id = <0x2000001 0>;
+};
diff --git a/qcom/sa8155-vm-la-mt.dtsi b/qcom/sa8155-vm-la-mt.dtsi
new file mode 100644
index 000000000000..63e1d6eabba3
--- /dev/null
+++ b/qcom/sa8155-vm-la-mt.dtsi
@@ -0,0 +1,6 @@
+&reserved_memory {
+	pmem_shared: pmem_shared_region {
+		reg = <0x1 0x2c200000 0x0 0x53e00000>;
+		label = "pmem_shared_mem";
+	};
+};
diff --git a/qcom/sa8155-vm-la.dts b/qcom/sa8155-vm-la.dts
new file mode 100644
index 000000000000..7ca0c92eb6f2
--- /dev/null
+++ b/qcom/sa8155-vm-la.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "sa8155-vm.dtsi"
+#include "sa8155-vm-la.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SA8155 Single LA Virtual Machine";
+	compatible = "qcom,sa8155";
+	qcom,pmic-name = "PM8150";
+	qcom,board-id = <0x1000001 0>;
+};
diff --git a/qcom/sa8155-vm-la.dtsi b/qcom/sa8155-vm-la.dtsi
new file mode 100644
index 000000000000..c38dc4de64e2
--- /dev/null
+++ b/qcom/sa8155-vm-la.dtsi
@@ -0,0 +1,6 @@
+&reserved_memory {
+	pmem_shared: pmem_shared_region {
+		reg = <0x1 0x6a500000 0x0 0x51400000>;
+		label = "pmem_shared_mem";
+	};
+};
diff --git a/qcom/sa8155-vm-lv-mt.dts b/qcom/sa8155-vm-lv-mt.dts
new file mode 100644
index 000000000000..7798a82c5c47
--- /dev/null
+++ b/qcom/sa8155-vm-lv-mt.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "sa8155-vm.dtsi"
+#include "sa8155-vm-lv-mt.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SA8155 Multi LV Virtual Machine";
+	compatible = "qcom,sa8155";
+	qcom,pmic-name = "PM8150";
+	qcom,board-id = <0x2000002 0>;
+};
diff --git a/qcom/sa8155-vm-lv-mt.dtsi b/qcom/sa8155-vm-lv-mt.dtsi
new file mode 100644
index 000000000000..63e1d6eabba3
--- /dev/null
+++ b/qcom/sa8155-vm-lv-mt.dtsi
@@ -0,0 +1,6 @@
+&reserved_memory {
+	pmem_shared: pmem_shared_region {
+		reg = <0x1 0x2c200000 0x0 0x53e00000>;
+		label = "pmem_shared_mem";
+	};
+};
diff --git a/qcom/sa8155-vm-lv.dts b/qcom/sa8155-vm-lv.dts
new file mode 100644
index 000000000000..d7b7655d2720
--- /dev/null
+++ b/qcom/sa8155-vm-lv.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "sa8155-vm.dtsi"
+#include "sa8155-vm-lv.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SA8155 Single LV Virtual Machine";
+	compatible = "qcom,sa8155";
+	qcom,pmic-name = "PM8150";
+	qcom,board-id = <0x1000002 0>;
+};
diff --git a/qcom/sa8155-vm-lv.dtsi b/qcom/sa8155-vm-lv.dtsi
new file mode 100644
index 000000000000..c38dc4de64e2
--- /dev/null
+++ b/qcom/sa8155-vm-lv.dtsi
@@ -0,0 +1,6 @@
+&reserved_memory {
+	pmem_shared: pmem_shared_region {
+		reg = <0x1 0x6a500000 0x0 0x51400000>;
+		label = "pmem_shared_mem";
+	};
+};
diff --git a/qcom/sa8155-vm.dtsi b/qcom/sa8155-vm.dtsi
new file mode 100644
index 000000000000..6c89f083c055
--- /dev/null
+++ b/qcom/sa8155-vm.dtsi
@@ -0,0 +1,196 @@
+#include <dt-bindings/clock/qcom,gcc-sm8150.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "quin-vm-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SA8155 Virtual Machine";
+	qcom,msm-name = "SA8155 V2";
+	qcom,msm-id = <362 0x20000>;
+};
+
+
+&soc {
+	apps_smmu: apps-smmu@0x15000000 {
+		compatible = "qcom,qsmmu-v500";
+		reg = <0x15000000 0x100000>,
+			<0x15182000 0x20>;
+		reg-names = "base", "tcu-base";
+		#iommu-cells = <2>;
+		qcom,skip-init;
+		qcom,use-3-lvl-tables;
+		qcom,disable-atos;
+		#global-interrupts = <1>;
+		#size-cells = <1>;
+		#address-cells = <1>;
+		ranges;
+		interrupts =	<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
+	};
+};
+
+&regulator {
+	usb30_prim_gdsc: usb30_prim_gdsc {
+		regulator-name = "usb30_prim_gdsc";
+	};
+
+	usb30_sec_gdsc: usb30_sec_gdsc {
+		regulator-name = "usb30_sec_gdsc";
+	};
+
+	pcie_0_gdsc: pcie_0_gdsc {
+		regulator-name = "pcie_0_gdsc";
+	};
+
+	pcie_1_gdsc: pcie_1_gdsc {
+		regulator-name = "pcie_1_gdsc";
+	};
+
+	L2A: pm8150_1_l2: regulator-pm8150-1-l2 {
+		regulator-name = "ldoa2";
+		regulator-min-microvolt = <3072000>;
+		regulator-max-microvolt = <3072000>;
+	};
+
+	L5A: pm8150_1_l5: regulator-pm8150-1-l5 {
+		regulator-name = "ldoa5";
+		regulator-min-microvolt = <880000>;
+		regulator-max-microvolt = <880000>;
+	};
+
+	L12A: pm8150_1_l12: regulator-pm8150-1-l12 {
+		regulator-name = "ldoa12";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
+	L17A: pm8150_1_l17: regulator-pm8150-1-l17 {
+		regulator-name = "ldoa17";
+		regulator-min-microvolt = <2704000>;
+		regulator-max-microvolt = <2960000>;
+	};
+
+	L8C: pm8150_2_l8: regulator-pm8150-2-l8 {
+		regulator-name = "ldoc8";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-allow-set-load;
+	};
+
+	L13C: pm8150_2_l13: regulator-pm8150-2-l13 {
+		regulator-name = "ldoc13";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <2960000>;
+	};
+
+	L15C: pm8150_2_l15: regulator-pm8150-2-l15 {
+		regulator-name = "ldoc15";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1904000>;
+	};
+
+	L18C: pm8150_2_l18: regulator-pm8150-2-l18 {
+		regulator-name = "ldoc18";
+		regulator-min-microvolt = <880000>;
+		regulator-max-microvolt = <880000>;
+		regulator-allow-set-load;
+	};
+
+	S6A: pm8150_1_s6: regulator-pm8150-1-s6 {
+		regulator-name = "smpa6";
+		regulator-min-microvolt = <600000>;
+		regulator-max-microvolt = <1352000>;
+	};
+
+	S4C: pm8150_2_s4: regulator-pm8150-2-s4 {
+		regulator-name = "smpc4";
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1400000>;
+	};
+
+	S5C: pm8150_2_s5: regulator-pm8150-2-s5 {
+		regulator-name = "smpc5";
+		regulator-min-microvolt = <1824000>;
+		regulator-max-microvolt = <2040000>;
+	};
+};