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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Char/Misc driver patches for 3.19-rc1
Here's the big char/misc driver update for 3.19-rc1 Lots of little things all over the place in different drivers, and a new subsystem, "coresight" has been added. Full details are in the shortlog. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAlSODosACgkQMUfUDdst+ykSNwCfcqx1Z3rQzbLwSrR2sa1fV3Zb yEAAniJoLZ4ZkoQK4/1ozsFc31q+gXNm =/epr -----END PGP SIGNATURE----- Merge tag 'char-misc-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here's the big char/misc driver update for 3.19-rc1 Lots of little things all over the place in different drivers, and a new subsystem, "coresight" has been added. Full details are in the shortlog" * tag 'char-misc-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (73 commits) parport: parport_pc, do not remove parent devices early spmi: Remove shutdown/suspend/resume kernel-doc carma-fpga-program: drop videobuf dependency carma-fpga: drop videobuf dependency carma-fpga-program.c: fix compile errors i8k: Fix temperature bug handling in i8k_get_temp() cxl: Name interrupts in /proc/interrupt CXL: Return error to PSL if IRQ demultiplexing fails & print clearer warning coresight-replicator: remove .owner field for driver coresight: fixed comments in coresight.h coresight: fix typo in comment in coresight-priv.h coresight: bindings for coresight drivers coresight: Adding ABI documentation w1: support auto-load of w1_bq27000 module. w1: avoid potential u16 overflow cn: verify msg->len before making callback mei: export fw status registers through sysfs mei: read and print all six FW status registers mei: txe: add cherrytrail device id mei: kill cached host and me csr values ...
This commit is contained in:
Linus Torvalds
commit
6ae840e7cc
93 changed files with 9174 additions and 1177 deletions
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@ -23,6 +23,7 @@
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#define AMBA_NR_IRQS 9
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#define AMBA_CID 0xb105f00d
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#define CORESIGHT_CID 0xb105900d
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struct clk;
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263
include/linux/coresight.h
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263
include/linux/coresight.h
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@ -0,0 +1,263 @@
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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _LINUX_CORESIGHT_H
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#define _LINUX_CORESIGHT_H
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#include <linux/device.h>
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/* Peripheral id registers (0xFD0-0xFEC) */
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#define CORESIGHT_PERIPHIDR4 0xfd0
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#define CORESIGHT_PERIPHIDR5 0xfd4
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#define CORESIGHT_PERIPHIDR6 0xfd8
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#define CORESIGHT_PERIPHIDR7 0xfdC
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#define CORESIGHT_PERIPHIDR0 0xfe0
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#define CORESIGHT_PERIPHIDR1 0xfe4
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#define CORESIGHT_PERIPHIDR2 0xfe8
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#define CORESIGHT_PERIPHIDR3 0xfeC
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/* Component id registers (0xFF0-0xFFC) */
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#define CORESIGHT_COMPIDR0 0xff0
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#define CORESIGHT_COMPIDR1 0xff4
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#define CORESIGHT_COMPIDR2 0xff8
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#define CORESIGHT_COMPIDR3 0xffC
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#define ETM_ARCH_V3_3 0x23
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#define ETM_ARCH_V3_5 0x25
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#define PFT_ARCH_V1_0 0x30
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#define PFT_ARCH_V1_1 0x31
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#define CORESIGHT_UNLOCK 0xc5acce55
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extern struct bus_type coresight_bustype;
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enum coresight_dev_type {
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CORESIGHT_DEV_TYPE_NONE,
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CORESIGHT_DEV_TYPE_SINK,
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CORESIGHT_DEV_TYPE_LINK,
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CORESIGHT_DEV_TYPE_LINKSINK,
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CORESIGHT_DEV_TYPE_SOURCE,
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};
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enum coresight_dev_subtype_sink {
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CORESIGHT_DEV_SUBTYPE_SINK_NONE,
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CORESIGHT_DEV_SUBTYPE_SINK_PORT,
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CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
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};
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enum coresight_dev_subtype_link {
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CORESIGHT_DEV_SUBTYPE_LINK_NONE,
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CORESIGHT_DEV_SUBTYPE_LINK_MERG,
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CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
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CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
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};
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enum coresight_dev_subtype_source {
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CORESIGHT_DEV_SUBTYPE_SOURCE_NONE,
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CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
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CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
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CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
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};
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/**
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* struct coresight_dev_subtype - further characterisation of a type
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* @sink_subtype: type of sink this component is, as defined
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by @coresight_dev_subtype_sink.
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* @link_subtype: type of link this component is, as defined
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by @coresight_dev_subtype_link.
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* @source_subtype: type of source this component is, as defined
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by @coresight_dev_subtype_source.
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*/
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struct coresight_dev_subtype {
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enum coresight_dev_subtype_sink sink_subtype;
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enum coresight_dev_subtype_link link_subtype;
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enum coresight_dev_subtype_source source_subtype;
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};
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/**
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* struct coresight_platform_data - data harvested from the DT specification
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* @cpu: the CPU a source belongs to. Only applicable for ETM/PTMs.
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* @name: name of the component as shown under sysfs.
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* @nr_inport: number of input ports for this component.
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* @outports: list of remote endpoint port number.
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* @child_names:name of all child components connected to this device.
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* @child_ports:child component port number the current component is
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connected to.
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* @nr_outport: number of output ports for this component.
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* @clk: The clock this component is associated to.
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*/
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struct coresight_platform_data {
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int cpu;
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const char *name;
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int nr_inport;
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int *outports;
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const char **child_names;
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int *child_ports;
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int nr_outport;
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struct clk *clk;
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};
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/**
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* struct coresight_desc - description of a component required from drivers
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* @type: as defined by @coresight_dev_type.
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* @subtype: as defined by @coresight_dev_subtype.
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* @ops: generic operations for this component, as defined
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by @coresight_ops.
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* @pdata: platform data collected from DT.
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* @dev: The device entity associated to this component.
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* @groups: operations specific to this component. These will end up
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in the component's sysfs sub-directory.
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*/
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struct coresight_desc {
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enum coresight_dev_type type;
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struct coresight_dev_subtype subtype;
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const struct coresight_ops *ops;
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struct coresight_platform_data *pdata;
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struct device *dev;
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const struct attribute_group **groups;
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};
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/**
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* struct coresight_connection - representation of a single connection
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* @outport: a connection's output port number.
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* @chid_name: remote component's name.
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* @child_port: remote component's port number @output is connected to.
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* @child_dev: a @coresight_device representation of the component
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connected to @outport.
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*/
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struct coresight_connection {
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int outport;
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const char *child_name;
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int child_port;
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struct coresight_device *child_dev;
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};
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/**
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* struct coresight_device - representation of a device as used by the framework
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* @conns: array of coresight_connections associated to this component.
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* @nr_inport: number of input port associated to this component.
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* @nr_outport: number of output port associated to this component.
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* @type: as defined by @coresight_dev_type.
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* @subtype: as defined by @coresight_dev_subtype.
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* @ops: generic operations for this component, as defined
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by @coresight_ops.
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* @dev: The device entity associated to this component.
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* @refcnt: keep track of what is in use.
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* @path_link: link of current component into the path being enabled.
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* @orphan: true if the component has connections that haven't been linked.
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* @enable: 'true' if component is currently part of an active path.
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* @activated: 'true' only if a _sink_ has been activated. A sink can be
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activated but not yet enabled. Enabling for a _sink_
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happens when a source has been selected for that it.
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*/
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struct coresight_device {
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struct coresight_connection *conns;
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int nr_inport;
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int nr_outport;
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enum coresight_dev_type type;
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struct coresight_dev_subtype subtype;
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const struct coresight_ops *ops;
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struct device dev;
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atomic_t *refcnt;
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struct list_head path_link;
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bool orphan;
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bool enable; /* true only if configured as part of a path */
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bool activated; /* true only if a sink is part of a path */
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};
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#define to_coresight_device(d) container_of(d, struct coresight_device, dev)
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#define source_ops(csdev) csdev->ops->source_ops
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#define sink_ops(csdev) csdev->ops->sink_ops
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#define link_ops(csdev) csdev->ops->link_ops
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#define CORESIGHT_DEBUGFS_ENTRY(__name, __entry_name, \
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__mode, __get, __set, __fmt) \
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DEFINE_SIMPLE_ATTRIBUTE(__name ## _ops, __get, __set, __fmt); \
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static const struct coresight_ops_entry __name ## _entry = { \
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.name = __entry_name, \
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.mode = __mode, \
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.ops = &__name ## _ops \
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}
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/**
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* struct coresight_ops_sink - basic operations for a sink
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* Operations available for sinks
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* @enable: enables the sink.
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* @disable: disables the sink.
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*/
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struct coresight_ops_sink {
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int (*enable)(struct coresight_device *csdev);
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void (*disable)(struct coresight_device *csdev);
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};
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/**
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* struct coresight_ops_link - basic operations for a link
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* Operations available for links.
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* @enable: enables flow between iport and oport.
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* @disable: disables flow between iport and oport.
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*/
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struct coresight_ops_link {
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int (*enable)(struct coresight_device *csdev, int iport, int oport);
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void (*disable)(struct coresight_device *csdev, int iport, int oport);
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};
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/**
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* struct coresight_ops_source - basic operations for a source
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* Operations available for sources.
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* @trace_id: returns the value of the component's trace ID as known
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to the HW.
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* @enable: enables tracing from a source.
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* @disable: disables tracing for a source.
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*/
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struct coresight_ops_source {
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int (*trace_id)(struct coresight_device *csdev);
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int (*enable)(struct coresight_device *csdev);
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void (*disable)(struct coresight_device *csdev);
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};
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struct coresight_ops {
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const struct coresight_ops_sink *sink_ops;
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const struct coresight_ops_link *link_ops;
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const struct coresight_ops_source *source_ops;
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};
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#ifdef CONFIG_CORESIGHT
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extern struct coresight_device *
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coresight_register(struct coresight_desc *desc);
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extern void coresight_unregister(struct coresight_device *csdev);
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extern int coresight_enable(struct coresight_device *csdev);
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extern void coresight_disable(struct coresight_device *csdev);
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extern int coresight_is_bit_set(u32 val, int position, int value);
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extern int coresight_timeout(void __iomem *addr, u32 offset,
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int position, int value);
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#ifdef CONFIG_OF
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extern struct coresight_platform_data *of_get_coresight_platform_data(
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struct device *dev, struct device_node *node);
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#endif
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#else
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static inline struct coresight_device *
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coresight_register(struct coresight_desc *desc) { return NULL; }
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static inline void coresight_unregister(struct coresight_device *csdev) {}
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static inline int
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coresight_enable(struct coresight_device *csdev) { return -ENOSYS; }
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static inline void coresight_disable(struct coresight_device *csdev) {}
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static inline int coresight_is_bit_set(u32 val, int position, int value)
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{ return 0; }
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static inline int coresight_timeout(void __iomem *addr, u32 offset,
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int position, int value) { return 1; }
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#ifdef CONFIG_OF
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static inline struct coresight_platform_data *of_get_coresight_platform_data(
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struct device *dev, struct device_node *node) { return NULL; }
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#endif
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#endif
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#endif
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@ -61,9 +61,9 @@ static inline void devm_ioport_unmap(struct device *dev, void __iomem *addr)
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#define IOMEM_ERR_PTR(err) (__force void __iomem *)ERR_PTR(err)
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void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
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unsigned long size);
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resource_size_t size);
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void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset,
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unsigned long size);
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resource_size_t size);
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void devm_iounmap(struct device *dev, void __iomem *addr);
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int check_signature(const volatile void __iomem *io_addr,
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const unsigned char *signature, int length);
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@ -134,9 +134,6 @@ void spmi_controller_remove(struct spmi_controller *ctrl);
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* this structure.
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* @probe: binds this driver to a SPMI device.
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* @remove: unbinds this driver from the SPMI device.
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* @shutdown: standard shutdown callback used during powerdown/halt.
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* @suspend: standard suspend callback used during system suspend.
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* @resume: standard resume callback used during system resume.
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*
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* If PM runtime support is desired for a slave, a device driver can call
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* pm_runtime_put() from their probe() routine (and a balancing
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@ -35,7 +35,7 @@ struct uio_map;
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struct uio_mem {
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const char *name;
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phys_addr_t addr;
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unsigned long size;
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resource_size_t size;
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int memtype;
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void __iomem *internal_addr;
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struct uio_map *map;
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