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drm/tegra: Add eDP support
Add support for eDP functionality found on Tegra124 and later SoCs. Only fast link training is currently supported. Signed-off-by: Thierry Reding <[email protected]>
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10 changed files with 2077 additions and 2 deletions
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@ -190,6 +190,48 @@ of the following host1x client modules:
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- nvidia,edid: supplies a binary EDID blob
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- nvidia,panel: phandle of a display panel
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- sor: serial output resource
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Required properties:
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- compatible: "nvidia,tegra124-sor"
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- reg: Physical base address and length of the controller's registers.
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- interrupts: The interrupt outputs from the controller.
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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- sor: clock input for the SOR hardware
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- parent: input for the pixel clock
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- dp: reference clock for the SOR clock
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- safe: safe reference for the SOR clock during power up
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- sor
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Optional properties:
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- nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
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- nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
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- nvidia,edid: supplies a binary EDID blob
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- nvidia,panel: phandle of a display panel
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Optional properties when driving an eDP output:
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- nvidia,dpaux: phandle to a DispayPort AUX interface
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- dpaux: DisplayPort AUX interface
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- compatible: "nvidia,tegra124-dpaux"
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- reg: Physical base address and length of the controller's registers.
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- interrupts: The interrupt outputs from the controller.
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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- dpaux: clock input for the DPAUX hardware
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- parent: reference clock
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- dpaux
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- vdd-supply: phandle of a supply that powers the DisplayPort link
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Example:
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/ {
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