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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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qcacld-3.0: Reorganize VHT caps from hdd_update_config_dat API
Reorganizing VHT caps from hdd_update_config_dat API before refactoring it. Change-Id: Id9b514590185f331c7437d5e20259b14411a40dc CRs-Fixed: 1069659
This commit is contained in:
Krunal Soni
qcabuildsw
parent
52198e44db
commit
6c7c39fd27
1 changed files with 127 additions and 104 deletions
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@ -6163,7 +6163,7 @@ QDF_STATUS hdd_hex_string_to_u16_array(char *str,
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/**
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* hdd_update_ht_cap_in_cfg() - to update HT cap in global CFG
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* @hdd_ctx: pointer to hdd context
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* @pHddCtx: pointer to hdd context
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*
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* This API will update the HT config in CFG after taking intersection
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* of INI and firmware capabilities provided reading CFG
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@ -6215,6 +6215,127 @@ static bool hdd_update_ht_cap_in_cfg(hdd_context_t *pHddCtx)
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return fStatus;
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}
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/**
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* hdd_update_vht_cap_in_cfg() - to update VHT cap in global CFG
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* @pHddctx: pointer to hdd context
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*
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* This API will update the VHT config in CFG after taking intersection
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* of INI and firmware capabilities provided reading CFG
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*
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* Return: true or false
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*/
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static bool hdd_update_vht_cap_in_cfg(hdd_context_t *pHddCtx)
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{
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bool fStatus = true;
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uint32_t val;
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struct hdd_config *pConfig = pHddCtx->config;
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_ENABLE_TXBF_20MHZ,
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pConfig->enableTxBFin20MHz) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not set value for WNI_CFG_VHT_ENABLE_TXBF_20MHZ");
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}
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/* Based on cfg.ini, update the Basic MCS set, RX/TX MCS map
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* in the cfg.dat. Valid values are 0(MCS0-7), 1(MCS0-8), 2(MCS0-9)
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* we update only the least significant 2 bits in the
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* corresponding fields.
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*/
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if ((pConfig->dot11Mode == eHDD_DOT11_MODE_AUTO) ||
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(pConfig->dot11Mode == eHDD_DOT11_MODE_11ac_ONLY) ||
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(pConfig->dot11Mode == eHDD_DOT11_MODE_11ac)) {
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/* Currently shortGI40Mhz is used for shortGI80Mhz */
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if (sme_cfg_set_int
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(pHddCtx->hHal, WNI_CFG_VHT_SHORT_GI_80MHZ,
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pConfig->ShortGI40MhzEnable) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass WNI_VHT_SHORT_GI_80MHZ to CFG");
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}
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/* Hardware is capable of doing
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* 128K AMPDU in 11AC mode */
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_AMPDU_LEN_EXPONENT,
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pConfig->fVhtAmpduLenExponent) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_AMPDU_LEN_EXPONENT to CFG");
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}
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/* Change MU Bformee only when TxBF is enabled */
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if (pConfig->enableTxBF) {
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sme_cfg_get_int(pHddCtx->hHal,
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WNI_CFG_VHT_MU_BEAMFORMEE_CAP, &val);
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if (val != pConfig->enableMuBformee) {
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_MU_BEAMFORMEE_CAP,
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pConfig->enableMuBformee
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) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_MU_BEAMFORMEE_CAP to CFG");
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}
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}
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_MAX_MPDU_LENGTH,
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pConfig->vhtMpduLen) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_MAX_MPDU_LENGTH to CFG");
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}
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if (pConfig->enable2x2 && pConfig->enable_su_tx_bformer) {
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_SU_BEAMFORMER_CAP,
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pConfig->enable_su_tx_bformer) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hdd_err("set SU_BEAMFORMER_CAP to CFG failed");
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}
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS,
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NUM_OF_SOUNDING_DIMENSIONS) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hdd_err("failed to set NUM_OF_SOUNDING_DIM");
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}
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}
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_RXSTBC,
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pConfig->enableRxSTBC) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE, "Could not pass on WNI_CFG_VHT_RXSTBC to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_TXSTBC,
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pConfig->enableTxSTBC) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE, "Could not pass on WNI_CFG_VHT_TXSTBC to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_LDPC_CODING_CAP,
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pConfig->enableRxLDPC) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_LDPC_CODING_CAP to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED,
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pConfig->txBFCsnValue) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED to CFG");
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}
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return fStatus;
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}
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/**
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* hdd_update_config_dat() - scan the string and convery to u8 array
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* @str: the pointer to the string
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@ -6239,6 +6360,11 @@ bool hdd_update_config_dat(hdd_context_t *pHddCtx)
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hddLog(LOGE, "Could not set HT CAP in cfg");
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}
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if (!hdd_update_vht_cap_in_cfg(pHddCtx)) {
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fStatus = false;
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hddLog(LOGE, "Could not set VHT CAP in cfg");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_FIXED_RATE, pConfig->TxRate)
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== QDF_STATUS_E_FAILURE) {
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fStatus = false;
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@ -6532,14 +6658,6 @@ bool hdd_update_config_dat(hdd_context_t *pHddCtx)
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"Failure: Could not set value for WNI_CFG_DFS_MASTER_ENABLED");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_ENABLE_TXBF_20MHZ,
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pConfig->enableTxBFin20MHz) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not set value for WNI_CFG_VHT_ENABLE_TXBF_20MHZ");
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}
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if (sme_cfg_set_int
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(pHddCtx->hHal, WNI_CFG_HEART_BEAT_THRESHOLD,
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pConfig->HeartbeatThresh24) == QDF_STATUS_E_FAILURE) {
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@ -6564,93 +6682,7 @@ bool hdd_update_config_dat(hdd_context_t *pHddCtx)
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hddLog(LOGE,
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"Could not pass on WNI_CFG_ENABLE_MC_ADDR_LIST to CFG");
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}
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/* Based on cfg.ini, update the Basic MCS set, RX/TX MCS map
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* in the cfg.dat. Valid values are 0(MCS0-7), 1(MCS0-8), 2(MCS0-9)
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* we update only the least significant 2 bits in the
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* corresponding fields.
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*/
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if ((pConfig->dot11Mode == eHDD_DOT11_MODE_AUTO) ||
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(pConfig->dot11Mode == eHDD_DOT11_MODE_11ac_ONLY) ||
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(pConfig->dot11Mode == eHDD_DOT11_MODE_11ac)) {
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/* Currently shortGI40Mhz is used for shortGI80Mhz */
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if (sme_cfg_set_int
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(pHddCtx->hHal, WNI_CFG_VHT_SHORT_GI_80MHZ,
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pConfig->ShortGI40MhzEnable) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass WNI_VHT_SHORT_GI_80MHZ to CFG");
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}
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/* Hardware is capable of doing
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* 128K AMPDU in 11AC mode */
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_AMPDU_LEN_EXPONENT,
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pConfig->fVhtAmpduLenExponent) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_AMPDU_LEN_EXPONENT to CFG");
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}
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/* Change MU Bformee only when TxBF is enabled */
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if (pConfig->enableTxBF) {
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sme_cfg_get_int(pHddCtx->hHal,
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WNI_CFG_VHT_MU_BEAMFORMEE_CAP, &val);
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if (val != pConfig->enableMuBformee) {
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_MU_BEAMFORMEE_CAP,
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pConfig->enableMuBformee
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) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_MU_BEAMFORMEE_CAP to CFG");
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}
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}
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_MAX_MPDU_LENGTH,
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pConfig->vhtMpduLen) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_MAX_MPDU_LENGTH to CFG");
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}
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if (pConfig->enable2x2 && pConfig->enable_su_tx_bformer) {
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_SU_BEAMFORMER_CAP,
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pConfig->enable_su_tx_bformer) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hdd_err("set SU_BEAMFORMER_CAP to CFG failed");
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}
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_NUM_SOUNDING_DIMENSIONS,
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NUM_OF_SOUNDING_DIMENSIONS) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hdd_err("failed to set NUM_OF_SOUNDING_DIM");
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}
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}
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_RXSTBC,
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pConfig->enableRxSTBC) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE, "Could not pass on WNI_CFG_VHT_RXSTBC to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_TXSTBC,
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pConfig->enableTxSTBC) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE, "Could not pass on WNI_CFG_VHT_TXSTBC to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_VHT_LDPC_CODING_CAP,
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pConfig->enableRxLDPC) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_LDPC_CODING_CAP to CFG");
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}
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#ifdef WLAN_SOFTAP_VSTA_FEATURE
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if (pConfig->fEnableVSTASupport) {
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sme_cfg_get_int(pHddCtx->hHal, WNI_CFG_ASSOC_STA_LIMIT, &val);
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@ -6827,15 +6859,6 @@ bool hdd_update_config_dat(hdd_context_t *pHddCtx)
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"Could not pass on WNI_CFG_IBSS_ATIM_WIN_SIZE to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal,
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WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED,
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pConfig->txBFCsnValue) ==
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QDF_STATUS_E_FAILURE) {
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fStatus = false;
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hddLog(LOGE,
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"Could not pass on WNI_CFG_VHT_CSN_BEAMFORMEE_ANT_SUPPORTED to CFG");
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}
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if (sme_cfg_set_int(pHddCtx->hHal, WNI_CFG_TGT_GTX_USR_CFG,
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pConfig->tgt_gtx_usr_cfg) == QDF_STATUS_E_FAILURE) {
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fStatus = false;
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