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dts: add init dts files for pnangn

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[Details]
Add initial dts files for penang5G NA
Most files are inherited from penang5G ROW but with 2 changes:
a. temp removed discrete charging dtsi to make adb works
b. temp disabled sar sensor to make reboot/poweroff works

Change-Id: I6609dc18faa3106d463146071cb77e635490ddb9
Reviewed-on: https://gerrit.mot.com/2355036
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Submit-Approved: Jira Key
Tested-by: Jira Key
Reviewed-by: Xianhong Li <lixh8@lenovo.com>
Reviewed-on: https://gerrit.mot.com/2368039
Reviewed-by: Wang Wang <wangwang1@lenovo.com>
This commit is contained in:
liujg6 2022-08-05 10:59:55 +08:00 • committed by panyq6
commit 6cd068bb40
11 changed files with 1777 additions and 0 deletions
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5
qcom/Makefile
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@ -105,6 +105,11 @@ dtbo-$(CONFIG_PENANG_DTB) += \
holi-penang-evt1-overlay.dtbo-base := holi-moto-base.dtb
dtbo-$(CONFIG_PNANGN_DTB) += \
holi-pnangn-evt1-overlay.dtbo
holi-pnangn-evt1-overlay.dtbo-base := holi-moto-base.dtb
dtbo-$(CONFIG_RHODEP_DTB) += \
blair-rhodep-evt1-overlay.dtbo \
blair-rhodep-evt2-overlay.dtbo \

211
qcom/discrete_charging_pnangn.dtsi Normal file
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@ -0,0 +1,211 @@
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <dt-bindings/iio/qti_power_supply_iio.h>
#include "sgm7220-pnangn.dtsi"
#include "discrete-rt-pd-manger.dtsi"
&pm6125_vadc {
gpio6_div3{
reg = <ADC5_GPIO3_DIV3>;
label = "gpio3_div3";
qcom,pre-scaling = <1 3>;
};
};
&pm6125_gpios {
gpio6_adc{
gpio6_adc_default:gpio6_adc_default{
pins = "gpio6";
function = "normal";
bias-high-impedance;
};
};
};
&qupv3_se8_i2c {
status = "okay";
cw2217@64 {
compatible = "cellwise,cw2217";
reg = <0x64>;
status = "okay";
sense_r_mohm = <5>;
factory_mode_ntc_exist = <0>;
df-serialnum = "SB18D34202";
#include "bat_setting/CW_nd50-atl-4850mah.dtsi"
#include "bat_setting/CW_nd50-jiade-4850mah.dtsi"
#include "bat_setting/CW_nd50-local-4850mah.dtsi"
};
};
&qupv3_se10_i2c {
status = "okay";
sgm41543: sgm41543@0B {
status = "okay";
compatible = "sgm,sgm41543D";
reg = <0x0B>;
pinctrl-names = "default";
pinctrl-0 = <&sgm4154x_gpio_pins &gpio6_adc_default>;
#io-channel-cells = <1>;
io-channels = <&pm6125_vadc ADC5_GPIO3_DIV3>;
io-channel-names = "gpio3_div3";
interrupt-parent = <&tlmm>;
interrupts = <59 0>; //irq num base on hardware design
sgm,irq-gpio = <&tlmm 59 0>; //irq num base on hardware design
// sgm,chg-en-gpio = <&tlmm 45 0>; //gpio num base on hardware design 1.MTK parent node name is pio 2.QUALCOMM parent node name is tlmm or other
dpdm-supply = <&qusb_phy0>;
mmi,qc3-support;
enable_sw_jeita;
jeita_temp_above_t4_cv = <0>;
jeita_temp_t3_to_t4_cv = <4100000>;
jeita_temp_t2_to_t3_cv = <4350000>;
jeita_temp_t1_to_t2_cv = <4350000>;
jeita_temp_t0_to_t1_cv = <0>;
jeita_temp_below_t0_cv = <0>;
jeita_temp_above_t4_cc_current = <0>;
jeita_temp_t3_to_t4_cc_current = <1000000>;
jeita_temp_t2_to_t3_cc_current = <1250000>;
jeita_temp_t1_to_t2_cc_current = <1000000>;
jeita_temp_below_t0_cc_current = <0>;
temp_t4_thres = <50>;
temp_t4_thres_minus_x_degree = <48>;
temp_t3_thres = <45>;
temp_t3_thres_minus_x_degree = <45>;
temp_t2_thres = <20>;
temp_t2_thres_plus_x_degree = <15>;
temp_t1_thres = <0>;
temp_t1_thres_plus_x_degree = <0>;
temp_t0_thres = <0>;
temp_t0_thres_plus_x_degree = <2>;
temp_neg_10_thres = <0>;
};
bq25890: bq25890@6A {
status = "okay";
compatible = "ti,bq2589x-1";
reg = <0x6A>;
pinctrl-names = "default";
pinctrl-0 = <&bq2589x_irq &gpio6_adc_default>;
#io-channel-cells = <1>;
io-channels = <&pm6125_vadc ADC5_GPIO3_DIV3>;
io-channel-names = "gpio3_div3";
bq2589x_irq-gpio = <&tlmm 59 0>;
//bq2589x_en-gpio = <&tlmm 45 0>;
dpdm-supply = <&qusb_phy0>;
mmi,qc3-support;
ti,bq2589x,vbus-volt-high-level = <8700>;/* tune adapter to output 9v */
ti,bq2589x,vbus-volt-low-level = <4400>;/* tune adapter to output 5v */
ti,bq2589x,vbat-min-volt-to-tuneup = <3000>;
ti,bq2589x,charge-voltage = <4450>;
ti,bq2589x,charge-current = <3000>;
ti,bq2589x,term-current = <128>;
ti,bq2589x,enable-auto-dpdm;
ti,bq2589x,enable-termination;
ti,bq2589x,enable-ico;
ti,bq2589x,use-absolute-vindpm;
};
};
&soc {
mmi_charger: mmi,charger {
status = "ok"
compatible = "mmi,mmi-charger";
mmi,enable-charging-limit;
mmi,upper-limit-capacity = <70>;
mmi,lower-limit-capacity = <65>;
mmi,heartbeat-interval = <5000>;
mmi,dcp-power-max = <10000>;
mmi,hvdcp-power-max = <18000>;
};
mmi_discrete_charger: mmi,discrete-charging {
status = "ok"
compatible = "mmi,mmi-discrete-charger";
#io-channel-cells = <1>;
battery-names = "battery";
supplied-from = "mmi_battery";
mmi,chrg-iterm-ma = <243>;
mmi,fg-iterm-ma = <500>;
mmi,max-fv-mv = <4450>;
mmi,max-fcc-ma = <4000>;
mmi,demo-fv-mv = <4000>;
mmi,otg-cl-ua = <1200000>;
mmi,df-serialnum = "SB18D34202";
mmi,mmi-temp-zones = <0 4200 1000 0>,
<10 4250 2500 1000>,
<15 0 2500 2500>,
<45 0 4000 4000>,
<60 4200 4000 0>;
mmi,thermal-mitigation = <4000000 3000000 2500000
2000000 1500000
1200000 900000
600000 300000>;
};
};
&tlmm {
sgm4154x_gpio_pins: sgm4154x_gpio_pins {
mux {
pins = "gpio59";
function = "gpio";
};
config {
pins = "gpio59";
drive-strength = <2>;
bias-pull-up;
input-enable;
};
};
bq2589x_irq: bq2589x_irq {
mux {
pins = "gpio59";
function = "gpio";
};
config {
pins = "gpio59";
drive-strength = <2>;
bias-pull-up;
input-enable;
};
};
/*
chg_irq_default: chg_irq_default {
mux {
pins = "gpio59";
function = "gpio";
};
config {
pins = "gpio59";
bias-pull-up;
drive-strength = <2>;
input-enable;
};
};
*/
};

365
qcom/holi-audio-pnangn-overlay.dtsi Normal file
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@ -0,0 +1,365 @@
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
#include <dt-bindings/sound/audio-codec-port-types.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
&cdc_dmic01_gpios {
status = "disabled";
};
&cdc_dmic23_gpios {
status = "disabled";
};
&rx_swr_gpios {
status = "okay";
};
&dai_mi2s0_rx {
status = "okay";
qcom,msm-mi2s-lines = <1>;
};
&dai_mi2s0_tx {
status = "okay";
qcom,msm-mi2s-lines = <0>;
};
&dai_mi2s1_rx {
status = "okay";
qcom,msm-mi2s-lines = <1>;
};
&dai_mi2s1_tx {
status = "okay";
qcom,msm-mi2s-lines = <2>;
};
&dai_mi2s2_rx {
status = "okay";
qcom,msm-mi2s-lines = <1>;
};
&dai_mi2s2_tx {
status = "okay";
qcom,msm-mi2s-lines = <0>;
};
&dai_mi2s3_rx {
status = "okay";
qcom,msm-mi2s-lines = <1>;
};
&dai_mi2s3_tx {
status = "okay";
qcom,msm-mi2s-lines = <0>;
};
&bolero {
qcom,num-macros = <3>;
qcom,bolero-version = <5>;
#address-cells = <1>;
#size-cells = <1>;
bolero-clk-rsc-mngr {
compatible = "qcom,bolero-clk-rsc-mngr";
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
qcom,rx_mclk_mode_muxsel = <0x0A5640D8>;
qcom,va_mclk_mode_muxsel = <0x0A7A0000>;
clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
"va_core_clk", "va_npl_clk";
clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
};
va_macro: va-macro@A730000 {
compatible = "qcom,va-macro";
reg = <0xA730000 0x0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,va-dmic-sample-rate = <600000>;
qcom,default-clk-id = <TX_CORE_CLK>;
qcom,is-used-swr-gpio = <1>;
qcom,va-swr-gpios = <&va_swr_gpios>;
swr0: va_swr_master {
compatible = "qcom,swr-mstr";
qcom,is_wcd937x = <1>;
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <3>;
qcom,swrm-hctl-reg = <0x0A7EC100>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0xA740000 0x0>;
interrupts-extended =
<&wakegic 5 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 128 GPIO_ACTIVE_HIGH>;
interrupt-names = "swr_master_irq", "swr_wake_irq";
qcom,swr-num-ports = <3>;
qcom,swr-port-mapping = <1 SWRM_TX1_CH1 0x1>,
<1 SWRM_TX1_CH2 0x2>,
<1 SWRM_TX1_CH3 0x4>, <1 SWRM_TX1_CH4 0x8>,
<2 SWRM_TX2_CH1 0x1>, <2 SWRM_TX2_CH2 0x2>,
<2 SWRM_TX2_CH3 0x4>, <2 SWRM_TX2_CH4 0x8>,
<3 SWRM_TX3_CH1 0x1>, <3 SWRM_TX3_CH2 0x2>,
<3 SWRM_TX3_CH3 0x4>, <3 SWRM_TX3_CH4 0x8>;
qcom,swr-num-dev = <1>;
qcom,swr-phy-dev-addr = <0x0A 0x01170223>,
<0x08 0x58350223>,
<0x08 0x58350222>,
<0x08 0x58350221>,
<0x08 0x58350220>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-mstr-irq-wakeup-capable = <1>;
qcom,is-always-on = <1>;
wcd937x_tx_slave: wcd937x-tx-slave {
compatible = "qcom,wcd937x-slave";
reg = <0x0A 0x01170223>;
};
};
};
tx_macro: tx-macro@A620000 {
compatible = "qcom,tx-macro";
reg = <0xA620000 0x0>;
clock-names = "tx_core_clk", "tx_npl_clk";
clocks = <&clock_audio_tx_1 0>,
<&clock_audio_tx_2 0>;
qcom,tx-dmic-sample-rate = <2400000>;
qcom,is-used-swr-gpio = <0>;
};
rx_macro: rx-macro@A600000 {
compatible = "qcom,rx-macro";
reg = <0xA600000 0x0>;
clock-names = "rx_core_clk", "rx_npl_clk";
clocks = <&clock_audio_rx_1 0>,
<&clock_audio_rx_2 0>;
qcom,rx-swr-gpios = <&rx_swr_gpios>;
qcom,rx_mclk_mode_muxsel = <0xA5640D8>;
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <TX_CORE_CLK>;
swr1: rx_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <2>;
qcom,swrm-hctl-reg = <0x0A6A9098>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0xA610000 0x0>;
interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <6>;
qcom,swr-port-mapping = <1 HPH_L 0x1>,
<1 HPH_R 0x2>, <2 CLSH 0x1>,
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
<4 LO 0x1>, <5 DSD_L 0x1>,
<5 DSD_R 0x2>, <6 PCM_OUT1 0x01>;
qcom,swr-num-dev = <1>;
qcom,swr-clock-stop-mode0 = <1>;
wcd937x_rx_slave: wcd937x-rx-slave {
compatible = "qcom,wcd937x-slave";
reg = <0x0A 0x01170224>;
};
};
};
wcd937x_codec: wcd937x-codec {
compatible = "qcom,wcd937x-codec";
qcom,split-codec = <1>;
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
<4 DSD_R 0x2 0 DSD_R>;
qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>,
<1 ADC2 0x1 0 SWRM_TX2_CH1>,
<1 ADC3 0x2 0 SWRM_TX2_CH2>,
<2 DMIC0 0x1 0 SWRM_TX1_CH4>,
<2 DMIC1 0x2 0 SWRM_TX2_CH1>,
<2 MBHC 0x4 0 SWRM_TX2_CH2>,
<3 DMIC2 0x1 0 SWRM_TX2_CH3>,
<3 DMIC3 0x2 0 SWRM_TX2_CH4>,
<3 DMIC4 0x4 0 SWRM_TX3_CH1>,
<3 DMIC5 0x8 0 SWRM_TX3_CH2>;
qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>;
qcom,rx-slave = <&wcd937x_rx_slave>;
qcom,tx-slave = <&wcd937x_tx_slave>;
cdc-vdd-rxtx-supply = <&L11A>;
qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
qcom,cdc-vdd-rxtx-current = <30000>;
cdc-vddpx-supply = <&L11A>;
qcom,cdc-vddpx-voltage = <1800000 1800000>;
qcom,cdc-vddpx-current = <30000>;
cdc-vdd-buck-supply = <&L14A>;
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
qcom,cdc-vdd-buck-current = <650000>;
cdc-vdd-mic-bias-supply = <&BOB>;
qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
qcom,cdc-vdd-mic-bias-current = <45000>;
qcom,cdc-micbias1-mv = <2800>;
qcom,cdc-micbias2-mv = <2800>;
qcom,cdc-micbias3-mv = <2800>;
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
"cdc-vddpx",
"cdc-vdd-mic-bias";
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
};
};
&holi_snd {
qcom,model = "holi-9370_aw87xxx-snd-card";
qcom,wcn-btfm = <1>;
qcom,tdm-max-slots = <4>;
qcom,mi2s-audio-intf = <0>;
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"Analog Mic1", "MIC BIAS1",
"AMIC2", "Analog Mic2",
"Analog Mic2", "MIC BIAS2",
"AMIC3", "Analog Mic3",
"Analog Mic3", "MIC BIAS3",
"Analog Mic4", "MIC BIAS3",
"TX DMIC0", "Digital Mic0",
"TX DMIC0", "MIC BIAS1",
"TX DMIC1", "Digital Mic1",
"TX DMIC1", "MIC BIAS1",
"TX DMIC2", "Digital Mic2",
"TX DMIC2", "MIC BIAS3",
"TX DMIC3", "Digital Mic3",
"TX DMIC3", "MIC BIAS3",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK",
"VA DMIC0", "Digital Mic0",
"VA DMIC1", "Digital Mic1",
"VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3",
"VA DMIC4", "Digital Mic4",
"VA DMIC5", "Digital Mic5",
"VA DMIC0", "VA MIC BIAS1",
"VA DMIC1", "VA MIC BIAS1",
"VA DMIC2", "VA MIC BIAS3",
"VA DMIC3", "VA MIC BIAS3";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
asoc-codec = <&stub_codec>, <&bolero>,
<&wcd937x_codec>;
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
"wcd937x_codec";
qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>,
<&bolero>;
qcom,msm-mbhc-hs-mic-max-threshold-mv = <2700>;
qcom,msm-mbhc-hs-mic-min-threshold-mv = <116>;
};
&qupv3_se7_i2c {
status = "ok"
aw887xx_smartpa_0: aw87xxx_pa@58 {
compatible = "awinic,aw87xxx_pa";
reg = <0x58>;
dev_index = < 0 >;
aw-rx-topo-id = <0x1000ff00>;
aw-rx-port-id = <0xB030>;
status = "okay";
};
aw887xx_smartpa_1: aw87xxx_pa@59 {
compatible = "awinic,aw87xxx_pa";
reg = <0x59>;
dev_index = < 1 >;
aw-rx-topo-id = <0x1000ff00>;
aw-rx-port-id = <0xB030>;
status = "okay";
};
};
&va_cdc_dma_0_tx {
qcom,msm-dai-is-island-supported = <1>;
};
&soc {
wcd937x_rst_gpio: msm_cdc_pinctrl@32 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wcd937x_reset_active>;
pinctrl-1 = <&wcd937x_reset_sleep>;
};
clock_audio_rx_1: rx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
qcom,codec-lpass-ext-clk-freq = <22579200>;
qcom,codec-lpass-clk-id = <0x30E>;
#clock-cells = <1>;
};
clock_audio_rx_2: rx_npl_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
qcom,codec-lpass-ext-clk-freq = <22579200>;
qcom,codec-lpass-clk-id = <0x30F>;
#clock-cells = <1>;
};
clock_audio_tx_1: tx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30C>;
#clock-cells = <1>;
};
clock_audio_tx_2: tx_npl_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30D>;
#clock-cells = <1>;
};
clock_audio_va_1: va_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30B>;
#clock-cells = <1>;
};
clock_audio_va_2: va_npl_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x310>;
#clock-cells = <1>;
};
};
&adsp_loader {
nvmem-cells = <&adsp_variant>;
nvmem-cell-names = "adsp_variant";
adsp-fw-names = "adsp2";
adsp-fw-bit-values = <0x1>;
};

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qcom/holi-pnangn-common-overlay.dtsi Normal file
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@ -0,0 +1,619 @@
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "holi-audio-pnangn-overlay.dtsi"
#include "holi-nopmi-moto-common-overlay.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include "holi-pmic-overlay-pm6125.dtsi"
#include "holi-thermal-overlay-pm6125.dtsi"
#include "display/holi-sde-display-mtp-pm6125.dtsi"
#include "pnangn-fps-overlay.dtsi"
#include "pnangn-display.dtsi"
#include "pnangn-touchscreen.dtsi"
#include "pnangn-fmr-overlay.dtsi"
//#include "camera/holi-camera-sensor-mot-penang-overlay.dtsi"
//#include "discrete_charging_pnangn.dtsi"
#include "moto_therm_sys_temp.dtsi"
&wcd937x_codec {
cdc-vdd-rxtx-supply = <&L9A>;
cdc-vddpx-supply = <&L9A>;
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
"cdc-vddpx";
/*
* Overriding cdc-vdd-mic-bias-supply to dummy value
* to avoid compilation errors as BOB is not definied
* for pm6125
*/
cdc-vdd-mic-bias-supply = <>;
};
&holi_snd {
qcom,msm-hs-linein-threshold = <4000>;
};
/* Dummy LDO reference */
&sdhc_1 {
status = "disabled";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_on>;
pinctrl-1 = <&sdc1_off>;
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
};
&sdhc_2 {
status = "ok"
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 22000>;
cd-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v3";
vdda-phy-supply = <&L7A>;
vdda-pll-supply = <&L4A>;
vdda-phy-max-microamp = <62900>;
vdda-pll-max-microamp = <18300>;
status = "ok"
};
&ufshc_mem {
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vcc-voltage-level = <2950000 2960000>;
vcc-max-microamp = <800000>;
vccq2-supply = <&L11A>;
vccq2-max-microamp = <800000>;
vccq2-voltage-level = <1800000 1800000>;
qcom,vddp-ref-clk-supply = <&L4A>;
qcom,vddp-ref-clk-max-microamp = <100>;
status = "ok"
};
&tlmm {
nfc {
nfc_int_active: nfc_int_active {
/* active state */
mux {
/* GPIO 9: NFC Read Interrupt */
pins = "gpio9";
function = "gpio";
};
config {
pins = "gpio9";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
nfc_int_suspend: nfc_int_suspend {
/* sleep state */
mux {
/* GPIO 9: NFC Read Interrupt */
pins = "gpio9";
function = "gpio";
};
config {
pins = "gpio9";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
nfc_enable_active: nfc_enable_active {
mux {
/* 48: Enable, 8: Firmware*/
pins = "gpio48";
function = "gpio";
};
config {
pins = "gpio48";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
nfc_enable_suspend: nfc_enable_suspend {
mux {
/* 48: Enable, 8: Firmware */
pins = "gpio48";
function = "gpio";
};
config {
pins = "gpio48";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
nfc_clk_req_active: nfc_clk_req_active {
/* active state */
mux {
/* GPIO 7: NFC CLK Req*/
pins = "gpio7";
function = "gpio";
};
config {
pins = "gpio7";
drive-strength = <2>; /* 2 MA */
bias-disable;
input-enable;
};
};
nfc_clk_req_suspend: nfc_clk_req_suspend {
/* sleep state */
mux {
/* GPIO 7: NFC CLK Req */
pins = "gpi7";
function = "gpio";
};
config {
pins = "gpio7";
drive-strength = <2>; /* 2 MA */
bias-disable;
input-enable;
};
};
};
};
&pmk8350_vadc {
pmk8350_qtm_n_therm {
reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
label = "pmk8350_qtm_n_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
pmk8350_qtm_e_therm {
reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
label = "pmk8350_qtm_e_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pmk8350_adc_tm {
io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>,
<&pmk8350_vadc PMK8350_ADC7_AMUX_THM2_100K_PU>,
<&pmk8350_vadc PMK8350_ADC7_AMUX_THM4_100K_PU>;
qtm_n__therm {
reg = <PMK8350_ADC7_AMUX_THM2_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
qtm_e_therm {
reg = <PMK8350_ADC7_AMUX_THM4_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&qupv3_se7_i2c {
status = "ok"
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 9 0x00>;
qcom,sn-ven = <&tlmm 48 0x00>;
qcom,sn-firm = <&tlmm 8 0x00>;
qcom,sn-clkreq = <&tlmm 7 0x00>;
qcom,sn-vdd-1p8-supply = <&L9A>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <9 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&pm8008_8 {
status = "disabled";
};
&pm8008_9 {
status = "disabled";
};
&soc {
gpio_keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
vol_up {
label = "volume_up";
gpios = <&pmr735a_gpios 1 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
gpio-key,wakeup;
debounce-interval = <15>;
linux,can-disable;
};
};
ldo_vib {
compatible = "moto,vibrator-ldo";
moto,vib-ldo-gpio = <&tlmm 101 0x0>;
status = "ok"
};
};
&mot_batterydata {
df-serialnum = "SB18C77591";
qcom,batt-id-range-pct = <15>;
#include "qg-batterydata-jk50-atl-5000mah.dtsi"
#include "qg-batterydata-jk50-scud-5000mah.dtsi"
};
&thermal_zones {
sdm-skin-therm-usr {
status = "disabled";
};
rear-cam-therm-usr {
status = "disabled";
};
camera-therm-usr {
status = "disabled";
};
quiet-therm-usr {
status = "disabled";
};
pa-therm0-usr {
status = "disabled";
};
pa-therm1-usr {
status = "disabled";
};
xo-therm-usr {
status = "disabled";
};
msm_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm_iio ADC5_GPIO1_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
cam_flash_therm {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO3_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
pa_therm2 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
pa_therm1 {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM1_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
quiet_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM2_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
xo_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM1_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
chg_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
usb_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM4_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
qtm_n_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM2_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
qtm_e_therm {
polling-delay-passive = <5000>;
polling-delay = <20000>;
thermal-governor = "user_space";
thermal-sensors = <&pmk8350_adc_tm PMK8350_ADC7_AMUX_THM4_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
&qupv3_se8_i2c {
status = "ok"
sx937x@2c {
compatible = "Semtech,sx937x";
reg = <0x2c>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&sar_int_default>;
pinctrl-1 = <&sar_int_sleep>;
interrupt-parent = <&tlmm>;
interrupts = <24 0x02>;
interrupt-names = "sx937x_irq";
Semtech,nirq-gpio = <&tlmm 24 0x02>;
//please fix me
cap_vdd-supply = <&L9A>;
/*use PH4/5/6 as the reference sensor
set it to 0xff if the ref-phases-x is not used*/
Semtech,ref-phases-a = <5>;
Semtech,ref-phases-b = <6>;
Semtech,ref-phases-c = <0xff>;
Semtech,button-flag = <0x1f>;
Semtech,reg-num = <61>;
Semtech,reg-init = <
0x4004 0x78
0x4008 0x8
0x8020 0x32
0x8028 0x857
0x8034 0x856
0x8040 0x856
0x804C 0x857
0x8058 0x856
0x8064 0x856
0x8070 0x856
0x807C 0x85E
0x8030 0xFFF9FD
0x803C 0xFEF9FF
0x8048 0xFFD9FF
0x8054 0xFFF97F
0x8060 0xBFF9FF
0x806C 0xFFF9EF
0x8078 0xF7F9FF
0x8084 0xFFFFFF
0x8098 0x4831
0x80B8 0x3323
0x80D8 0x2D23
0x80F8 0x5B3C
0x8118 0x2E2E
0x8138 0xC8
0x8158 0xC8
0x8178 0xC8
0x80A0 0x242400E0
0x80C0 0x262600E0
0x80E0 0x1E1E00E0
0x8100 0x202000E0
0x8120 0x1E1E00E0
0x8140 0x0
0x8160 0x0
0x8180 0x0
0x8188 0x8000015
0x818C 0x8000016
0x8190 0x0
0x8194 0x0
0x8090 0x54AD5000
0x80B0 0x2AD87000
0x80D0 0x54AE5000
0x80F0 0x2AD77000
0x8110 0x2AD77000
0x8130 0x2AD67000
0x8150 0x2AD67000
0x8170 0x2AD66000
0x8088 0x300000
0x80A8 0x300000
0x80C8 0x300000
0x80E8 0x300000
0x8108 0x300000
0x8128 0x300000
0x8148 0x300000
0x8168 0x300000
0x808C 0x60200018
0x80AC 0x60200018
0x80CC 0x60200018
0x80EC 0x60200018
0x810C 0x60200018
0x812C 0x60200018
0x814C 0x60200018
0x816C 0x60200018
0x8024 0x7F7F
0x4280 0xE
>;
status = "disabled";
};
};
&qusb_phy0 {
qcom,qusb-phy-init-seq =
/* <value reg_offset> */
<0x23 0x210 /* PWR_CTRL1 */
0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
0x7c 0x18c /* PLL_CLOCK_INVERTERS */
0x80 0x2c /* PLL_CMODE */
0x0a 0x184 /* PLL_LOCK_DELAY */
0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
0x16 0x198 /* PLL_BIAS_CONTROL_2 */
0x21 0x214 /* PWR_CTRL2 */
0x08 0x220 /* IMP_CTRL1 */
0x58 0x224 /* IMP_CTRL2 */
0x37 0x240 /* TUNE1 */
0x29 0x244 /* TUNE2 */
0xca 0x248 /* TUNE3 */
0x04 0x24c /* TUNE4 */
0x03 0x250 /* TUNE5 */
0x30 0x23c /* CHG_CTRL2 */
0x22 0x210>; /* PWR_CTRL1 */
qcom,qusb-phy-host-init-seq =
/* <value reg_offset> */
<0x23 0x210 /* PWR_CTRL1 */
0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
0x7c 0x18c /* PLL_CLOCK_INVERTERS */
0x80 0x2c /* PLL_CMODE */
0x0a 0x184 /* PLL_LOCK_DELAY */
0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
0x1f 0x198 /* PLL_BIAS_CONTROL_2 */
0x21 0x214 /* PWR_CTRL2 */
0x08 0x220 /* IMP_CTRL1 */
0x58 0x224 /* IMP_CTRL2 */
0x47 0x240 /* TUNE1 */
0x29 0x244 /* TUNE2 */
0xca 0x248 /* TUNE3 */
0x04 0x24c /* TUNE4 */
0x03 0x250 /* TUNE5 */
0x30 0x23c /* CHG_CTRL2 */
0x22 0x210>; /* PWR_CTRL1 */
};

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qcom/holi-pnangn-evt1-overlay.dts Normal file
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@ -0,0 +1,24 @@
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "holi-pnangn-common-overlay.dtsi"
/ {
model = "pnangn";
compatible = "qcom,holi-pnangn", "qcom,holi-moto", "qcom,holi";
qcom,msm-id = <454 0x10000>, <472 0x10000>;
qcom,board-id = <0x4E 0xA100>;
};

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@ -0,0 +1,255 @@
#include "dsi-panel-mot-dummy-qhd-video.dtsi"
#include "dsi-panel-mot-djn-nt36528-653-720x1600-video.dtsi"
#include "dsi-panel-mot-csot-ft8057-653-720x1600-video.dtsi"
&display_panel_avdd {
/delete-property/ gpio;
/delete-property/ pinctrl-0;
};
&mdss_dsi_phy0 {
qcom,platform-strength-ctrl = [55 03 30 30
55 03 30 30
55 03 30 30
55 03 30 30
55 00 30 30];
};
&tlmm {
lcd_panel_avdd_default: lcd_panel_avdd_default {
mux {
pins = "gpio84";
function = "gpio";
};
config {
pins = "gpio84";
drive-strength = <8>;
bias-disable = <0>;
output-high;
};
};
lcd_panel_avee_default: lcd_panel_avee_default {
mux {
pins = "gpio85";
function = "gpio";
};
config {
pins = "gpio85";
drive-strength = <8>;
bias-disable = <0>;
output-high;
};
};
};
&soc {
lcd_panel_avdd: lcd_gpio_regulator@1 {
compatible = "qti-regulator-fixed";
regulator-name = "lcd_panel_avdd";
regulator-min-microvolt = <5500000>;
regulator-max-microvolt = <5500000>;
regulator-enable-ramp-delay = <233>;
gpio = <&tlmm 84 0>;
enable-active-high;
regulator-boot-on;
proxy-supply = <&lcd_panel_avdd>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_avdd_default>;
};
lcd_panel_avee: lcd_gpio_regulator@2 {
compatible = "qti-regulator-fixed";
regulator-name = "lcd_panel_avee";
regulator-min-microvolt = <5500000>;
regulator-max-microvolt = <5500000>;
regulator-enable-ramp-delay = <233>;
gpio = <&tlmm 85 0>;
enable-active-high;
regulator-boot-on;
proxy-supply = <&lcd_panel_avee>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_avee_default>;
};
dsi_panel_pwr_supply_ext_bias: dsi_panel_pwr_supply_ext_bias {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <32000>;
qcom,supply-disable-load = <80>;
qcom,supply-pre-off-sleep = <2>;
};
qcom,panel-supply-entry@1 {
reg = <1>;
qcom,supply-name = "lab";
qcom,supply-min-voltage = <5500000>;
qcom,supply-max-voltage = <5500000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
qcom,supply-pre-on-sleep = <3>;
};
qcom,panel-supply-entry@2 {
reg = <2>;
qcom,supply-name = "ibb";
qcom,supply-min-voltage = <5500000>;
qcom,supply-max-voltage = <5500000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
qcom,supply-pre-off-sleep = <3>;
qcom,supply-post-on-sleep = <3>;
};
};
};
&sde_dsi {
/delete-property/ lab-supply;
/delete-property/ ibb-supply;
/delete-property/ vddio-supply;
/delete-property/ qcom,dsi-default-panel;
/delete-property/ avdd-supply;
lab-supply = <&lcd_panel_avdd>;
ibb-supply = <&lcd_panel_avee>;
vddio-supply = <&L13A>;
qcom,dsi-default-panel = <&dsi_nt36528_djn_video>;
};
&dsi_nt36528_djn_video {
qcom,platform-te-gpio = <&tlmm 23 0>;
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_ext_bias>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,bklt-dcs-2bytes-enabled;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <2047>;
qcom,mdss-dsi-bl-default-level = <128>;
qcom,mdss-brightness-max-level = <2047>;
/*qcom,esd-check-enabled;*/
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,mdss-dsi-no-panel-on-read-support;
qcom,mdss-dsi-panel-supplier = "tm";
qcom,suspend-ulps-enabled;
qcom,tp_state_check_enable;
qcom,platform-need-execute-shutdown;
qcom,mdss-dsi-pan-enable-dynamic-fps;
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,dsi-supported-dfps-list = <60 90 120>;
qcom,mdss-dsi-hbm-type = "lcd-dcs-gpio";
qcom,platform-hbm-en-gpio = <&tlmm 50 0>;
qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 07 FF];
qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 07 FF];
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-t-clk-post = <0x1A>;
qcom,mdss-dsi-t-clk-pre = <0x21>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-drive-strength = <0x8C>;
qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 27 25 0A
0B 0A 02 04 00];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_ft8057_csot_video {
qcom,platform-te-gpio = <&tlmm 23 0>;
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_ext_bias>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,bklt-dcs-2bytes-enabled;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <2047>;
qcom,mdss-dsi-bl-default-level = <128>;
qcom,mdss-brightness-max-level = <2047>;
qcom,mdss-dsi-bl-inverted-dbv;
/*qcom,esd-check-enabled;*/
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,mdss-dsi-no-panel-on-read-support;
qcom,mdss-dsi-panel-supplier = "tm";
qcom,suspend-ulps-enabled;
qcom,tp_state_check_enable;
qcom,platform-need-execute-shutdown;
qcom,mdss-dsi-pan-enable-dynamic-fps;
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,dsi-supported-dfps-list = <60 90 120>;
qcom,mdss-dsi-hbm-type = "lcd-dcs-gpio";
qcom,platform-hbm-en-gpio = <&tlmm 50 0>;
qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 FF 0E];
qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 FF 0E];
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-t-clk-post = <0x0E>;
qcom,mdss-dsi-t-clk-pre = <0x1E>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-drive-strength = <0x8C>;
qcom,mdss-dsi-panel-phy-timings = [00 24 09 09 1A 18 09
09 09 02 04 00];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&mot_dummy_vid_qhd {
qcom,platform-te-gpio = <&tlmm 23 0>;
qcom,platform-reset-gpio = <&pmr735a_gpios 2 0>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dummy";
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-t-clk-post = <0x09>;
qcom,mdss-dsi-t-clk-pre = <0x15>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 0B 02 02 1C 1C 03
02 01 02 04 00];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};

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&tlmm {
};
&soc {
};

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qcom/pnangn-fps-overlay.dtsi Normal file
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&tlmm {
fps_int_active: fps_int_active {
/* active state */
mux {
pins = "gpio17";
function = "gpio";
};
config {
pins = "gpio17";
drive-strength = <2>; /* 2 MA */
bias-disable;
input-enable;
};
};
fps_int_suspend: fps_int_suspend {
/* sleep state */
mux {
pins = "gpio17";
function = "gpio";
};
config {
pins = "gpio17";
drive-strength = <2>; /* 2 MA */
bias-disable;
input-enable;
};
};
fps_rst_high: fps_rst_high {
mux {
pins = "gpio18";
function = "gpio";
};
config {
pins = "gpio18";
drive-strength = <8>;
output-high;
bias-pull-up;
};
};
fps_rst_low: fps_rst_low {
mux {
pins = "gpio18";
function = "gpio";
};
config {
pins = "gpio18";
drive-strength = <8>;
output-low;
bias-pull-down;
};
};
fps_ldo3_en_active: fps_ldo3_en_active {
/* active state */
mux {
pins = "gpio87";
function = "gpio";
};
config {
pins = "gpio87";
drive-strength = <2>; /* 2 MA */
bias-disable;
output-high;
};
};
fps_ldo3_en_suspend: fps_ldo3_en_suspend {
/* sleep state */
mux {
pins = "gpio87";
function = "gpio";
};
config {
pins = "gpio87";
drive-strength = <2>; /* 2 MA */
bias-disable;
output-low;
};
};
};
&soc {
fpc: fpc_fpc1020 {
compatible = "fpc,fpc1020";
status = "ok"
irq = <&tlmm 17 0>;
rst = <&tlmm 18 0>;
fp-gpio-ven = <&tlmm 87 0>;
interrupt-parent = <&tlmm>;
interrupts = <17 0>;
pinctrl-names = "default", "suspend";
pinctrl-0 = <&fps_int_active>;
pinctrl-1 = < &fps_int_suspend>;
};
//chipone side fps
fingerprint: chipone7318 {
compatible = "qcom,fingerprint-gpio";
status = "ok"
reg = <0>;
interrupt-parent = <&tlmm>;
interrupts = <17 0x0>;
fp-gpio-int = <&tlmm 17 0x0>;
fp-gpio-reset = <&tlmm 18 0x0>;
fp-gpio-power = <&tlmm 87 0x0>;
pinctrl-names = "fps_rst_active","fps_rst_suspend","fps_int_active","fps_ido1p8_en_active","fps_ido1p8_en_suspend";
pinctrl-0 = <&fps_rst_high>;
pinctrl-1 = <&fps_rst_low>;
pinctrl-2 = <&fps_int_active>;
pinctrl-3 = <&fps_ldo3_en_active>;
pinctrl-4 = <&fps_ldo3_en_suspend>;
};
};

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/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/

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/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&qupv3_se0_i2c {
status = "disabled";
};
&qupv3_se0_spi_pins {
qupv3_se0_spi_active: qupv3_se0_spi_active {
mux {
pins = "gpio0", "gpio1", "gpio2";
function = "qup00";
};
config {
pins = "gpio0", "gpio1", "gpio2";
drive-strength = <6>;
bias-disable;
};
};
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
mux {
pins = "gpio0", "gpio1", "gpio2";
function = "gpio";
};
config {
pins = "gpio0", "gpio1", "gpio2";
drive-strength = <6>;
bias-disable;
};
};
qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
mux {
pins = "gpio3";
function = "qup00";
};
config {
pins = "gpio3";
drive-strength = <6>;
bias-disable;
};
};
qupv3_se0_spi_cs_sleep: qupv3_se0_spi_cs_sleep {
mux {
pins = "gpio3";
function = "gpio";
};
config {
pins = "gpio3";
drive-strength = <6>;
bias-pull-up;
};
};
};
&qupv3_se0_spi {
status = "ok"
pinctrl-0 = <&qupv3_se0_spi_active &qupv3_se0_spi_cs_active>;
pinctrl-1 = <&qupv3_se0_spi_sleep &qupv3_se0_spi_cs_sleep>;
focaltech@38{
compatible = "focaltech,fts";
reg = <0x0>;
spi-max-frequency = <9600000>;
interrupt-parent = <&tlmm>;
interrupts = <22 0x2008>;
focaltech,reset-gpio = <&tlmm 21 0x00>;
focaltech,irq-gpio = <&tlmm 22 0x2008>;
focaltech,max-touch-number = <10>;
focaltech,display-coords = <0 0 720 1600>;
focaltech,report_gesture_key;
focaltech,panel-supplier = "csot";
panel = <&dsi_ft8057_csot_video>;
};
novatek@0{
compatible = "novatek,NVT-ts-spi";
reg = <0x1>;
spi-max-frequency = <9600000>; /* 4800000,9600000,15000000,19200000 */
novatek,reset-gpio = <&tlmm 21 0x00>;
novatek,irq-gpio = <&tlmm 22 0x2001>;
novatek,def-max-resolution = <720 1600>;
novatek,swrst-n8-addr = <0x03F0FE>;
novatek,spi-rd-fast-addr = <0x03F310>;
novatek,report_gesture_key;
novatek,usb_charger;
novatek,edge_cmd = /bits/ 8 <0x72 0x01 0x00>;
novatek,panel-supplier = "djn";
panel = <&dsi_nt36528_djn_video>;
status = "ok"
};
};

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qcom/sgm7220-pnangn.dtsi Normal file
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/*
* Copyright (c) 2021 motorola Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR tcpcA PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&qupv3_se8_i2c {
status = "okay";
sgm7220: sgm7220@47 {
compatible = "sgm,usb_type_c_sgm7220";
reg = <0x47>;
status = "okay";
tcpc-dual,supported_modes = <0>; /* 0: dfp/ufp, */
/* 1: dfp, 2: ufp */
sgm7220-tcpc,name = "type_c_port0"; /* tcpc_device's name */
sgm7220-tcpc,role_def = <5>; /* 0: Unknown, 1: SNK, 2: SRC */
/* 3: DRP, 4: Try.SRC, 5: Try.SNK */
sgm7220-tcpc,rp_level = <0>; /* 0: Default, 1: 1.5, 2: 3.0 */
sgm7220-tcpc,vconn_supply = <0>; /* 0: Never, 1: Always, */
/* 2: EMarkOnly, 3: StartOnly */
sgm7220,intr_gpio = <&tlmm 60 0x0>;
sgm7220,intr_gpio_num = <60>;
pinctrl-names = "default";
pinctrl-0 = <&sgm7220_int_n>;
};
};
&tlmm {
sgm7220_int_n: sgm7220_int_n {
mux {
pins = "gpio60";
function = "gpio";
};
config {
pins = "gpio60";
drive-strength = <2>;
bias-pull-up;
};
};
};