From 6d04630ea1b5bcadf6dc04f18586ba830953abee Mon Sep 17 00:00:00 2001 From: Charan Teja Kalla Date: Tue, 12 Jan 2021 20:15:51 +0530 Subject: [PATCH] ARM: dts: msm: update interconnect and global interuupts on yupik This change does the following: 1) Remove kgsl smmu interconnect node. For TCU config register access we shouldn't required DDR path votes. KGSL smmu already votes for clock and regulator. 2) Remove the tcu_comb_irpt_ns for both apps and kgsl smmu as the interrupt is OR of context interrupts, TBU perf interrupts and global fault interrupts. This interrupt is not really required and registering for the same can showup as the global faults in EL1. Change-Id: I4de4a866d936f1f7f053479dc00c72c46e84d80d --- qcom/msm-arm-smmu-yupik.dtsi | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/qcom/msm-arm-smmu-yupik.dtsi b/qcom/msm-arm-smmu-yupik.dtsi index f9dea0234c00..833995eda61c 100644 --- a/qcom/msm-arm-smmu-yupik.dtsi +++ b/qcom/msm-arm-smmu-yupik.dtsi @@ -10,7 +10,7 @@ qcom,skip-init; qcom,use-3-lvl-tables; qcom,split-tables; - #global-interrupts = <2>; + #global-interrupts = <1>; #size-cells = <1>; #address-cells = <1>; ranges; @@ -33,10 +33,7 @@ "gpu_cc_hub_cx_int_clk", "gpu_cc_hub_aon_clk"; - interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>; - interrupts = , - , , , , @@ -77,13 +74,12 @@ #iommu-cells = <2>; qcom,skip-init; qcom,use-3-lvl-tables; - #global-interrupts = <2>; + #global-interrupts = <1>; #size-cells = <1>; #address-cells = <1>; ranges; dma-coherent; interrupts = , - , , , ,