diff --git a/bindings/pinctrl/qcom,pmic-gpio.txt b/bindings/pinctrl/qcom,pmic-gpio.txt
index 5642ef00c17c..d506c20b8a13 100644
--- a/bindings/pinctrl/qcom,pmic-gpio.txt
+++ b/bindings/pinctrl/qcom,pmic-gpio.txt
@@ -32,6 +32,7 @@ PMIC's from Qualcomm.
 		    "qcom,pm7250b-gpio"
 		    "qcom,pm6350-gpio"
 		    "qcom,pm6150l-gpio"
+		    "qcom,pmx65-gpio"
 
 		    And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
 		    if the device is on an spmi bus or an ssbi bus respectively
@@ -118,6 +119,7 @@ to specify in a pin configuration subnode:
 		    gpio1-gpio12 for pm7250b
 		    gpio1-gpio9 for pm6350
 		    gpio1-gpio12 for pm6150l
+		    gpio1-gpio16 for pmx65
 
 - function:
 	Usage: required
diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi
index 664189bd0034..7c3a86f8ed85 100644
--- a/qcom/sdxlemur.dtsi
+++ b/qcom/sdxlemur.dtsi
@@ -599,6 +599,26 @@
 	qcom-secure-buffer {
 		compatible = "qcom,secure-buffer";
 	};
+
+	spmi_bus: qcom,spmi@c440000 {
+		compatible = "qcom,spmi-pmic-arb";
+		reg = <0xc440000 0xd00>,
+		      <0xc600000 0x2000000>,
+		      <0xe600000 0x100000>,
+		      <0xe700000 0xa0000>,
+		      <0xc40a000 0x26000>;
+		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+		interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "periph_irq";
+		interrupt-controller;
+		#interrupt-cells = <4>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		cell-index = <0>;
+		qcom,channel = <0>;
+		qcom,ee = <0>;
+	};
+
 };
 
 #include "sdxlemur-pinctrl.dtsi"