From a05ce742df46400c77f44f566c1d95c79bf34541 Mon Sep 17 00:00:00 2001
From: "Tao,Zhang" <taozha@qti.qualcomm.com>
Date: Wed, 13 May 2020 22:45:39 +0800
Subject: [PATCH] ARM: dts: msm: Add transaction timeout config for lahaina

Add transaction timeout config for lahaina. Set it to zero and
doesn't write timeout value to register.

Change-Id: Id5496eb1373c1aaf4767a9ab16e2925036999664
---
 qcom/lahaina.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index 31c1403aecf7..8074c5adb96e 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -635,6 +635,8 @@
 		reg = <0x117f000 0x1000>,
 		      <0x1112000 0x6000>;
 
+		qcom,transaction_timeout = <0>;
+
 		reg-names = "dcc-base", "dcc-ram-base";
 		dcc-ram-offset = <0x12000>;