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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "ARM: dts: msm: update interconnect devices for Holi"
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commit
6db960bb43
1 changed files with 31 additions and 6 deletions
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@ -3,6 +3,8 @@
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#include <dt-bindings/clock/qcom,gpucc-holi.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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#include <dt-bindings/interconnect/qcom,epss-l3.h>
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#include <dt-bindings/interconnect/qcom,holi.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/soc/qcom,ipcc.h>
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#include <dt-bindings/gpio/gpio.h>
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@ -868,34 +870,57 @@
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#mbox-cells = <2>;
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};
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clk_virt: interconnect {
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compatible = "qcom,holi-clk_virt";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_QUP_CLK>,
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<&rpmcc RPM_SMD_QUP_A_CLK>;
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};
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system_noc: interconnect@1880000 {
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reg = <0x01880000 0x1900>;
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compatible = "qcom,holi-system_noc";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
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<&rpmcc RPM_SMD_SNOC_A_CLK>;
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};
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qup_virt: interconnect@1880000 {
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compatible = "qcom,holi-qup_virt";
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#interconnect-cells = <1>;
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};
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mmnrt_virt: interconnect@1880000 {
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mmnrt_virt: interconnect@1899000 {
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reg = <0x01899000 0x6000>;
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compatible = "qcom,holi-mmnrt_virt";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
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<&rpmcc RPM_SMD_MMNRT_A_CLK>;
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};
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mmrt_virt: interconnect@1880000 {
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mmrt_virt: interconnect@189f000 {
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reg = <0x0189f000 0x1000>;
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compatible = "qcom,holi-mmrt_virt";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
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<&rpmcc RPM_SMD_MMRT_A_CLK>;
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};
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config_noc: interconnect@1900000 {
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reg = <0x01900000 0x6200>;
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compatible = "qcom,holi-config_noc";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
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<&rpmcc RPM_SMD_CNOC_A_CLK>;
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};
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bimc: interconnect@4480000 {
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reg = <0x04480000 0x80000>;
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compatible = "qcom,holi-bimc";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
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<&rpmcc RPM_SMD_BIMC_A_CLK>;
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};
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epss_l3_cpu: l3_cpu@fd91000 {
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