From 6deff4eb8da69ec0a95fc59f24a753e635bcabcb Mon Sep 17 00:00:00 2001
From: Amir Vajid <avajid@quicinc.com>
Date: Thu, 13 Aug 2020 10:06:42 -0700
Subject: [PATCH] ARM: dts: msm: Add cpu7 qos latfloor device on lahaina

Create a qos latfloor device on Lahaina to cover compute
bound workloads running on cpu7 above 2.0 GHz.

Change-Id: Ided709511ff1840ff41ebd8f924f1f5af9350420
---
 qcom/lahaina-v2.dtsi |  6 ++++++
 qcom/lahaina.dtsi    | 17 +++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/qcom/lahaina-v2.dtsi b/qcom/lahaina-v2.dtsi
index a0d4f7931954..235adf02fbb3 100644
--- a/qcom/lahaina-v2.dtsi
+++ b/qcom/lahaina-v2.dtsi
@@ -276,3 +276,9 @@
 		< 1881600 1 >,
 		< 2841600 2 >;
 };
+
+&cpu7_qoslatmon {
+	qcom,core-dev-table =
+		< 2035200 1 >,
+		< 2841600 2 >;
+};
diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index dee400914937..4b9c37f58775 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -3863,6 +3863,13 @@
 		mboxes = <&qmp_aop 0>;
 	};
 
+	cpu7_cpu_ddr_qoslatfloor: qcom,cpu7-cpu-ddr-qoslatfloor {
+		compatible = "qcom,devfreq-qoslat";
+		governor = "mem_latency";
+		operating-points-v2 = <&qoslat_opp_table>;
+		mboxes = <&qmp_aop 0>;
+	};
+
 	cpu0_cpu_l3_tbl: qcom,cpu0-cpu-l3-tbl {
 		qcom,core-dev-table =
 			<  300000  300000000 >,
@@ -4110,6 +4117,16 @@
 				<  300000 1 >,
 				< 3000000 2 >;
 		};
+
+		cpu7_qoslatmon: qcom,cpu7-qoslatmon {
+			compatible = "qcom,arm-memlat-mon";
+			qcom,cpulist = <&CPU7>;
+			qcom,target-dev = <&cpu7_cpu_ddr_qoslatfloor>;
+			qcom,cachemiss-ev = <0x1000>;
+			qcom,core-dev-table =
+				< 1996800 1 >,
+				< 2400000 2 >;
+		};
 	};
 
 	wdog: qcom,wdt@17c10000{