mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
sh-pfc: Move driver from drivers/sh/ to drivers/pinctrl/
Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: Paul Mundt <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Simon Horman <[email protected]>
This commit is contained in:
Laurent Pinchart
Simon Horman
parent
56dc04af3b
commit
6e54d8d252
10 changed files with 15 additions and 9 deletions
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@ -1,6 +1,5 @@
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menu "SuperH / SH-Mobile Driver Options"
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source "drivers/sh/intc/Kconfig"
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source "drivers/sh/pfc/Kconfig"
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endmenu
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@ -5,7 +5,6 @@ obj-y := intc/
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obj-$(CONFIG_HAVE_CLK) += clk/
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obj-$(CONFIG_MAPLE) += maple/
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obj-$(CONFIG_SH_PFC) += pfc/
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obj-$(CONFIG_SUPERHYWAY) += superhyway/
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obj-y += pm_runtime.o
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@ -1,18 +0,0 @@
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comment "Pin function controller options"
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config SH_PFC
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# XXX move off the gpio dependency
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depends on GENERIC_GPIO
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select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
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select PINCTRL_SH_PFC
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select PINCTRL
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select PINMUX
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select PINCONF
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def_bool y
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config GPIO_SH_PFC
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bool "SuperH PFC GPIO support"
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depends on SH_PFC && GPIOLIB
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help
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This enables support for GPIOs within the SoC's pin function
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controller.
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@ -1,5 +0,0 @@
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sh-pfc-objs = core.o pinctrl.o
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ifeq ($(CONFIG_GPIO_SH_PFC),y)
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sh-pfc-objs += gpio.o
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endif
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obj-y += sh-pfc.o
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@ -1,586 +0,0 @@
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/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DRV_NAME "sh-pfc"
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_device.h>
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#include <linux/sh_pfc.h>
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#include <linux/slab.h>
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#include "core.h"
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static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
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{
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struct resource *res;
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int k;
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if (pdev->num_resources == 0) {
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pfc->num_windows = 0;
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return 0;
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}
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pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
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sizeof(*pfc->window), GFP_NOWAIT);
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if (!pfc->window)
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return -ENOMEM;
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pfc->num_windows = pdev->num_resources;
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for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
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WARN_ON(resource_type(res) != IORESOURCE_MEM);
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pfc->window[k].phys = res->start;
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pfc->window[k].size = resource_size(res);
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pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
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resource_size(res));
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if (!pfc->window[k].virt)
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return -ENOMEM;
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}
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return 0;
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}
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static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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{
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struct sh_pfc_window *window;
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int k;
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/* scan through physical windows and convert address */
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for (k = 0; k < pfc->num_windows; k++) {
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window = pfc->window + k;
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if (address < window->phys)
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continue;
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if (address >= (window->phys + window->size))
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continue;
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return window->virt + (address - window->phys);
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}
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/* no windows defined, register must be 1:1 mapped virt:phys */
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return (void __iomem *)address;
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}
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static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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{
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if (enum_id < r->begin)
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return 0;
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if (enum_id > r->end)
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return 0;
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return 1;
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}
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static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width)
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{
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switch (reg_width) {
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case 8:
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return ioread8(mapped_reg);
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case 16:
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return ioread16(mapped_reg);
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case 32:
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return ioread32(mapped_reg);
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}
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BUG();
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return 0;
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}
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static void sh_pfc_write_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width, unsigned long data)
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{
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switch (reg_width) {
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case 8:
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iowrite8(data, mapped_reg);
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return;
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case 16:
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iowrite16(data, mapped_reg);
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return;
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case 32:
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iowrite32(data, mapped_reg);
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return;
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}
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BUG();
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}
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int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
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{
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unsigned long pos;
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pos = dr->reg_width - (in_pos + 1);
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pr_debug("read_bit: addr = %lx, pos = %ld, "
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"r_width = %ld\n", dr->reg, pos, dr->reg_width);
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return (sh_pfc_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
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}
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void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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unsigned long value)
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{
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unsigned long pos;
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pos = dr->reg_width - (in_pos + 1);
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pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
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"r_width = %ld\n",
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dr->reg, !!value, pos, dr->reg_width);
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if (value)
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set_bit(pos, &dr->reg_shadow);
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else
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clear_bit(pos, &dr->reg_shadow);
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sh_pfc_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
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}
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static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long in_pos,
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void __iomem **mapped_regp,
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unsigned long *maskp,
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unsigned long *posp)
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{
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int k;
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*mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
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if (crp->field_width) {
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*maskp = (1 << crp->field_width) - 1;
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*posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
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} else {
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*maskp = (1 << crp->var_field_width[in_pos]) - 1;
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*posp = crp->reg_width;
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for (k = 0; k <= in_pos; k++)
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*posp -= crp->var_field_width[k];
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}
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}
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static int sh_pfc_read_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos;
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sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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pr_debug("read_reg: addr = %lx, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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crp->reg, field, crp->reg_width, crp->field_width);
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return (sh_pfc_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
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}
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static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field, unsigned long value)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos, data;
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sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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crp->reg, value, field, crp->reg_width, crp->field_width);
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mask = ~(mask << pos);
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value = value << pos;
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data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
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data &= mask;
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data |= value;
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if (pfc->pdata->unlock_reg)
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sh_pfc_write_raw_reg(
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sh_pfc_phys_to_virt(pfc, pfc->pdata->unlock_reg), 32,
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~data);
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sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
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}
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static int sh_pfc_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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{
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struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
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struct pinmux_data_reg *data_reg;
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int k, n;
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if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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return -1;
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k = 0;
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while (1) {
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data_reg = pfc->pdata->data_regs + k;
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if (!data_reg->reg_width)
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break;
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data_reg->mapped_reg = sh_pfc_phys_to_virt(pfc, data_reg->reg);
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for (n = 0; n < data_reg->reg_width; n++) {
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if (data_reg->enum_ids[n] == gpiop->enum_id) {
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gpiop->flags &= ~PINMUX_FLAG_DREG;
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gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
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gpiop->flags &= ~PINMUX_FLAG_DBIT;
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gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
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return 0;
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}
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}
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k++;
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}
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BUG();
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return -1;
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}
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static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
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{
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struct pinmux_data_reg *drp;
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int k;
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for (k = pfc->pdata->first_gpio; k <= pfc->pdata->last_gpio; k++)
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sh_pfc_setup_data_reg(pfc, k);
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k = 0;
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while (1) {
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drp = pfc->pdata->data_regs + k;
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if (!drp->reg_width)
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break;
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drp->reg_shadow = sh_pfc_read_raw_reg(drp->mapped_reg,
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drp->reg_width);
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k++;
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}
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}
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int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
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struct pinmux_data_reg **drp, int *bitp)
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{
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struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
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int k, n;
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if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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return -1;
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k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
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n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
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*drp = pfc->pdata->data_regs + k;
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*bitp = n;
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return 0;
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}
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static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
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struct pinmux_cfg_reg **crp, int *fieldp,
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int *valuep, unsigned long **cntp)
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{
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struct pinmux_cfg_reg *config_reg;
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unsigned long r_width, f_width, curr_width, ncomb;
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int k, m, n, pos, bit_pos;
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k = 0;
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while (1) {
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config_reg = pfc->pdata->cfg_regs + k;
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r_width = config_reg->reg_width;
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f_width = config_reg->field_width;
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if (!r_width)
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break;
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pos = 0;
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m = 0;
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for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
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if (f_width)
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curr_width = f_width;
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else
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curr_width = config_reg->var_field_width[m];
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ncomb = 1 << curr_width;
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for (n = 0; n < ncomb; n++) {
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if (config_reg->enum_ids[pos + n] == enum_id) {
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*crp = config_reg;
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*fieldp = m;
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*valuep = n;
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*cntp = &config_reg->cnt[m];
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return 0;
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}
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}
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pos += ncomb;
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m++;
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}
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k++;
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}
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return -1;
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}
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int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
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pinmux_enum_t *enum_idp)
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{
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pinmux_enum_t enum_id = pfc->pdata->gpios[gpio].enum_id;
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pinmux_enum_t *data = pfc->pdata->gpio_data;
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int k;
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if (!sh_pfc_enum_in_range(enum_id, &pfc->pdata->data)) {
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if (!sh_pfc_enum_in_range(enum_id, &pfc->pdata->mark)) {
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pr_err("non data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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}
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if (pos) {
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*enum_idp = data[pos + 1];
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return pos + 1;
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}
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for (k = 0; k < pfc->pdata->gpio_data_size; k++) {
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if (data[k] == enum_id) {
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*enum_idp = data[k + 1];
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return k + 1;
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}
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}
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pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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int cfg_mode)
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{
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struct pinmux_cfg_reg *cr = NULL;
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pinmux_enum_t enum_id;
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struct pinmux_range *range;
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int in_range, pos, field, value;
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unsigned long *cntp;
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switch (pinmux_type) {
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case PINMUX_TYPE_FUNCTION:
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range = NULL;
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break;
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case PINMUX_TYPE_OUTPUT:
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range = &pfc->pdata->output;
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break;
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case PINMUX_TYPE_INPUT:
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range = &pfc->pdata->input;
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break;
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case PINMUX_TYPE_INPUT_PULLUP:
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range = &pfc->pdata->input_pu;
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break;
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case PINMUX_TYPE_INPUT_PULLDOWN:
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range = &pfc->pdata->input_pd;
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break;
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default:
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goto out_err;
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}
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pos = 0;
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enum_id = 0;
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field = 0;
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value = 0;
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while (1) {
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pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
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if (pos <= 0)
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goto out_err;
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if (!enum_id)
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break;
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/* first check if this is a function enum */
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in_range = sh_pfc_enum_in_range(enum_id, &pfc->pdata->function);
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if (!in_range) {
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/* not a function enum */
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if (range) {
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/*
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* other range exists, so this pin is
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* a regular GPIO pin that now is being
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* bound to a specific direction.
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*
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* for this case we only allow function enums
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* and the enums that match the other range.
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*/
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in_range = sh_pfc_enum_in_range(enum_id, range);
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/*
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* special case pass through for fixed
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* input-only or output-only pins without
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* function enum register association.
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*/
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if (in_range && enum_id == range->force)
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continue;
|
||||
} else {
|
||||
/*
|
||||
* no other range exists, so this pin
|
||||
* must then be of the function type.
|
||||
*
|
||||
* allow function type pins to select
|
||||
* any combination of function/in/out
|
||||
* in their MARK lists.
|
||||
*/
|
||||
in_range = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (!in_range)
|
||||
continue;
|
||||
|
||||
if (sh_pfc_get_config_reg(pfc, enum_id, &cr,
|
||||
&field, &value, &cntp) != 0)
|
||||
goto out_err;
|
||||
|
||||
switch (cfg_mode) {
|
||||
case GPIO_CFG_DRYRUN:
|
||||
if (!*cntp ||
|
||||
(sh_pfc_read_config_reg(pfc, cr, field) != value))
|
||||
continue;
|
||||
break;
|
||||
|
||||
case GPIO_CFG_REQ:
|
||||
sh_pfc_write_config_reg(pfc, cr, field, value);
|
||||
*cntp = *cntp + 1;
|
||||
break;
|
||||
|
||||
case GPIO_CFG_FREE:
|
||||
*cntp = *cntp - 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
out_err:
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int sh_pfc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_pfc_platform_data *pdata = pdev->dev.platform_data;
|
||||
struct sh_pfc *pfc;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Ensure that the type encoding fits
|
||||
*/
|
||||
BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
|
||||
|
||||
if (pdata == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
pfc = devm_kzalloc(&pdev->dev, sizeof(pfc), GFP_KERNEL);
|
||||
if (pfc == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
pfc->pdata = pdata;
|
||||
pfc->dev = &pdev->dev;
|
||||
|
||||
ret = sh_pfc_ioremap(pfc, pdev);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
spin_lock_init(&pfc->lock);
|
||||
|
||||
pinctrl_provide_dummies();
|
||||
sh_pfc_setup_data_regs(pfc);
|
||||
|
||||
/*
|
||||
* Initialize pinctrl bindings first
|
||||
*/
|
||||
ret = sh_pfc_register_pinctrl(pfc);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
#ifdef CONFIG_GPIO_SH_PFC
|
||||
/*
|
||||
* Then the GPIO chip
|
||||
*/
|
||||
ret = sh_pfc_register_gpiochip(pfc);
|
||||
if (unlikely(ret != 0)) {
|
||||
/*
|
||||
* If the GPIO chip fails to come up we still leave the
|
||||
* PFC state as it is, given that there are already
|
||||
* extant users of it that have succeeded by this point.
|
||||
*/
|
||||
pr_notice("failed to init GPIO chip, ignoring...\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
platform_set_drvdata(pdev, pfc);
|
||||
|
||||
pr_info("%s support registered\n", pdata->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_pfc *pfc = platform_get_drvdata(pdev);
|
||||
|
||||
#ifdef CONFIG_GPIO_SH_PFC
|
||||
sh_pfc_unregister_gpiochip(pfc);
|
||||
#endif
|
||||
sh_pfc_unregister_pinctrl(pfc);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct platform_device_id sh_pfc_id_table[] = {
|
||||
{ "sh-pfc", 0 },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, sh_pfc_id_table);
|
||||
|
||||
static struct platform_driver sh_pfc_driver = {
|
||||
.probe = sh_pfc_probe,
|
||||
.remove = sh_pfc_remove,
|
||||
.id_table = sh_pfc_id_table,
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init sh_pfc_init(void)
|
||||
{
|
||||
return platform_driver_register(&sh_pfc_driver);
|
||||
}
|
||||
postcore_initcall(sh_pfc_init);
|
||||
|
||||
static void __exit sh_pfc_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&sh_pfc_driver);
|
||||
}
|
||||
module_exit(sh_pfc_exit);
|
||||
|
||||
MODULE_AUTHOR("Magnus Damm, Paul Mundt, Laurent Pinchart");
|
||||
MODULE_DESCRIPTION("Pin Control and GPIO driver for SuperH pin function controller");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
/*
|
||||
* SuperH Pin Function Controller support.
|
||||
*
|
||||
* Copyright (C) 2012 Renesas Solutions Corp.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#ifndef __SH_PFC_CORE_H__
|
||||
#define __SH_PFC_CORE_H__
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/sh_pfc.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
struct sh_pfc_window {
|
||||
phys_addr_t phys;
|
||||
void __iomem *virt;
|
||||
unsigned long size;
|
||||
};
|
||||
|
||||
struct sh_pfc_chip;
|
||||
struct sh_pfc_pinctrl;
|
||||
|
||||
struct sh_pfc {
|
||||
struct device *dev;
|
||||
struct sh_pfc_platform_data *pdata;
|
||||
spinlock_t lock;
|
||||
|
||||
unsigned int num_windows;
|
||||
struct sh_pfc_window *window;
|
||||
|
||||
struct sh_pfc_chip *gpio;
|
||||
struct sh_pfc_pinctrl *pinctrl;
|
||||
};
|
||||
|
||||
int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
|
||||
int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
|
||||
|
||||
int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
|
||||
int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
|
||||
|
||||
int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
|
||||
void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
|
||||
unsigned long value);
|
||||
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
|
||||
struct pinmux_data_reg **drp, int *bitp);
|
||||
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
|
||||
pinmux_enum_t *enum_idp);
|
||||
int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
|
||||
int cfg_mode);
|
||||
|
||||
#endif /* __SH_PFC_CORE_H__ */
|
||||
|
|
@ -1,179 +0,0 @@
|
|||
/*
|
||||
* SuperH Pin Function Controller GPIO driver.
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
* Copyright (C) 2009 - 2012 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/sh_pfc.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include "core.h"
|
||||
|
||||
struct sh_pfc_chip {
|
||||
struct sh_pfc *pfc;
|
||||
struct gpio_chip gpio_chip;
|
||||
};
|
||||
|
||||
static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
|
||||
{
|
||||
return container_of(gc, struct sh_pfc_chip, gpio_chip);
|
||||
}
|
||||
|
||||
static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
|
||||
{
|
||||
return gpio_to_pfc_chip(gc)->pfc;
|
||||
}
|
||||
|
||||
static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return pinctrl_request_gpio(offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
pinctrl_free_gpio(offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
|
||||
{
|
||||
struct pinmux_data_reg *dr = NULL;
|
||||
int bit = 0;
|
||||
|
||||
if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
|
||||
BUG();
|
||||
else
|
||||
sh_pfc_write_bit(dr, bit, value);
|
||||
}
|
||||
|
||||
static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
|
||||
{
|
||||
struct pinmux_data_reg *dr = NULL;
|
||||
int bit = 0;
|
||||
|
||||
if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
return sh_pfc_read_bit(dr, bit);
|
||||
}
|
||||
|
||||
static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(offset);
|
||||
}
|
||||
|
||||
static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
|
||||
int value)
|
||||
{
|
||||
sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(offset);
|
||||
}
|
||||
|
||||
static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return sh_gpio_get_value(gpio_to_pfc(gc), offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
|
||||
{
|
||||
sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
|
||||
}
|
||||
|
||||
static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
struct sh_pfc *pfc = gpio_to_pfc(gc);
|
||||
pinmux_enum_t enum_id;
|
||||
pinmux_enum_t *enum_ids;
|
||||
int i, k, pos;
|
||||
|
||||
pos = 0;
|
||||
enum_id = 0;
|
||||
while (1) {
|
||||
pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
|
||||
if (pos <= 0 || !enum_id)
|
||||
break;
|
||||
|
||||
for (i = 0; i < pfc->pdata->gpio_irq_size; i++) {
|
||||
enum_ids = pfc->pdata->gpio_irq[i].enum_ids;
|
||||
for (k = 0; enum_ids[k]; k++) {
|
||||
if (enum_ids[k] == enum_id)
|
||||
return pfc->pdata->gpio_irq[i].irq;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
|
||||
{
|
||||
struct sh_pfc *pfc = chip->pfc;
|
||||
struct gpio_chip *gc = &chip->gpio_chip;
|
||||
|
||||
gc->request = sh_gpio_request;
|
||||
gc->free = sh_gpio_free;
|
||||
gc->direction_input = sh_gpio_direction_input;
|
||||
gc->get = sh_gpio_get;
|
||||
gc->direction_output = sh_gpio_direction_output;
|
||||
gc->set = sh_gpio_set;
|
||||
gc->to_irq = sh_gpio_to_irq;
|
||||
|
||||
WARN_ON(pfc->pdata->first_gpio != 0); /* needs testing */
|
||||
|
||||
gc->label = pfc->pdata->name;
|
||||
gc->owner = THIS_MODULE;
|
||||
gc->base = pfc->pdata->first_gpio;
|
||||
gc->ngpio = (pfc->pdata->last_gpio - pfc->pdata->first_gpio) + 1;
|
||||
}
|
||||
|
||||
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_chip *chip;
|
||||
int ret;
|
||||
|
||||
chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
|
||||
if (unlikely(!chip))
|
||||
return -ENOMEM;
|
||||
|
||||
chip->pfc = pfc;
|
||||
|
||||
sh_pfc_gpio_setup(chip);
|
||||
|
||||
ret = gpiochip_add(&chip->gpio_chip);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
pfc->gpio = chip;
|
||||
|
||||
pr_info("%s handling gpio %d -> %d\n",
|
||||
pfc->pdata->name, pfc->pdata->first_gpio,
|
||||
pfc->pdata->last_gpio);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_chip *chip = pfc->gpio;
|
||||
int ret;
|
||||
|
||||
ret = gpiochip_remove(&chip->gpio_chip);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
pfc->gpio = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,464 +0,0 @@
|
|||
/*
|
||||
* SuperH Pin Function Controller pinmux support.
|
||||
*
|
||||
* Copyright (C) 2012 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#define DRV_NAME "sh-pfc"
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
#include <linux/sh_pfc.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include "core.h"
|
||||
|
||||
struct sh_pfc_pinctrl {
|
||||
struct pinctrl_dev *pctl;
|
||||
struct sh_pfc *pfc;
|
||||
|
||||
struct pinmux_gpio **functions;
|
||||
unsigned int nr_functions;
|
||||
|
||||
struct pinctrl_pin_desc *pads;
|
||||
unsigned int nr_pads;
|
||||
|
||||
spinlock_t lock;
|
||||
};
|
||||
|
||||
static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->nr_pads;
|
||||
}
|
||||
|
||||
static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
|
||||
unsigned selector)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->pads[selector].name;
|
||||
}
|
||||
|
||||
static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
|
||||
const unsigned **pins, unsigned *num_pins)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*pins = &pmx->pads[group].number;
|
||||
*num_pins = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
|
||||
unsigned offset)
|
||||
{
|
||||
seq_printf(s, "%s", DRV_NAME);
|
||||
}
|
||||
|
||||
static struct pinctrl_ops sh_pfc_pinctrl_ops = {
|
||||
.get_groups_count = sh_pfc_get_groups_count,
|
||||
.get_group_name = sh_pfc_get_group_name,
|
||||
.get_group_pins = sh_pfc_get_group_pins,
|
||||
.pin_dbg_show = sh_pfc_pin_dbg_show,
|
||||
};
|
||||
|
||||
static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->nr_functions;
|
||||
}
|
||||
|
||||
static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
|
||||
unsigned selector)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->functions[selector]->name;
|
||||
}
|
||||
|
||||
static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
|
||||
const char * const **groups,
|
||||
unsigned * const num_groups)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*groups = &pmx->functions[func]->name;
|
||||
*num_groups = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
|
||||
unsigned group)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
|
||||
unsigned group)
|
||||
{
|
||||
}
|
||||
|
||||
static int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
|
||||
{
|
||||
if (sh_pfc_config_gpio(pfc, offset,
|
||||
PINMUX_TYPE_FUNCTION,
|
||||
GPIO_CFG_DRYRUN) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (sh_pfc_config_gpio(pfc, offset,
|
||||
PINMUX_TYPE_FUNCTION,
|
||||
GPIO_CFG_REQ) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
|
||||
int new_type)
|
||||
{
|
||||
unsigned long flags;
|
||||
int pinmux_type;
|
||||
int ret = -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
/*
|
||||
* See if the present config needs to first be de-configured.
|
||||
*/
|
||||
switch (pinmux_type) {
|
||||
case PINMUX_TYPE_GPIO:
|
||||
break;
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
case PINMUX_TYPE_INPUT:
|
||||
case PINMUX_TYPE_INPUT_PULLUP:
|
||||
case PINMUX_TYPE_INPUT_PULLDOWN:
|
||||
sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
|
||||
break;
|
||||
default:
|
||||
goto err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Dry run
|
||||
*/
|
||||
if (sh_pfc_config_gpio(pfc, offset, new_type,
|
||||
GPIO_CFG_DRYRUN) != 0)
|
||||
goto err;
|
||||
|
||||
/*
|
||||
* Request
|
||||
*/
|
||||
if (sh_pfc_config_gpio(pfc, offset, new_type,
|
||||
GPIO_CFG_REQ) != 0)
|
||||
goto err;
|
||||
|
||||
pfc->pdata->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
|
||||
pfc->pdata->gpios[offset].flags |= new_type;
|
||||
|
||||
ret = 0;
|
||||
|
||||
err:
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
unsigned long flags;
|
||||
int ret, pinmux_type;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
switch (pinmux_type) {
|
||||
case PINMUX_TYPE_FUNCTION:
|
||||
pr_notice_once("Use of GPIO API for function requests is "
|
||||
"deprecated, convert to pinctrl\n");
|
||||
/* handle for now */
|
||||
ret = sh_pfc_config_function(pfc, offset);
|
||||
if (unlikely(ret < 0))
|
||||
goto err;
|
||||
|
||||
break;
|
||||
case PINMUX_TYPE_GPIO:
|
||||
case PINMUX_TYPE_INPUT:
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
break;
|
||||
default:
|
||||
pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
|
||||
ret = -ENOTSUPP;
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
||||
err:
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
unsigned long flags;
|
||||
int pinmux_type;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
|
||||
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
}
|
||||
|
||||
static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset, bool input)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
|
||||
|
||||
return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
|
||||
}
|
||||
|
||||
static struct pinmux_ops sh_pfc_pinmux_ops = {
|
||||
.get_functions_count = sh_pfc_get_functions_count,
|
||||
.get_function_name = sh_pfc_get_function_name,
|
||||
.get_function_groups = sh_pfc_get_function_groups,
|
||||
.enable = sh_pfc_noop_enable,
|
||||
.disable = sh_pfc_noop_disable,
|
||||
.gpio_request_enable = sh_pfc_gpio_request_enable,
|
||||
.gpio_disable_free = sh_pfc_gpio_disable_free,
|
||||
.gpio_set_direction = sh_pfc_gpio_set_direction,
|
||||
};
|
||||
|
||||
static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
|
||||
unsigned long *config)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
|
||||
*config = pfc->pdata->gpios[pin].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
|
||||
unsigned long config)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
/* Validate the new type */
|
||||
if (config >= PINMUX_FLAG_TYPE)
|
||||
return -EINVAL;
|
||||
|
||||
return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
|
||||
}
|
||||
|
||||
static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
|
||||
struct seq_file *s, unsigned pin)
|
||||
{
|
||||
const char *pinmux_type_str[] = {
|
||||
[PINMUX_TYPE_NONE] = "none",
|
||||
[PINMUX_TYPE_FUNCTION] = "function",
|
||||
[PINMUX_TYPE_GPIO] = "gpio",
|
||||
[PINMUX_TYPE_OUTPUT] = "output",
|
||||
[PINMUX_TYPE_INPUT] = "input",
|
||||
[PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
|
||||
[PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
|
||||
};
|
||||
unsigned long config;
|
||||
int rc;
|
||||
|
||||
rc = sh_pfc_pinconf_get(pctldev, pin, &config);
|
||||
if (unlikely(rc != 0))
|
||||
return;
|
||||
|
||||
seq_printf(s, " %s", pinmux_type_str[config]);
|
||||
}
|
||||
|
||||
static struct pinconf_ops sh_pfc_pinconf_ops = {
|
||||
.pin_config_get = sh_pfc_pinconf_get,
|
||||
.pin_config_set = sh_pfc_pinconf_set,
|
||||
.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
|
||||
};
|
||||
|
||||
static struct pinctrl_gpio_range sh_pfc_gpio_range = {
|
||||
.name = DRV_NAME,
|
||||
.id = 0,
|
||||
};
|
||||
|
||||
static struct pinctrl_desc sh_pfc_pinctrl_desc = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.pctlops = &sh_pfc_pinctrl_ops,
|
||||
.pmxops = &sh_pfc_pinmux_ops,
|
||||
.confops = &sh_pfc_pinconf_ops,
|
||||
};
|
||||
|
||||
static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx,
|
||||
struct pinmux_gpio *gpio, unsigned offset)
|
||||
{
|
||||
struct pinmux_data_reg *dummy;
|
||||
unsigned long flags;
|
||||
int bit;
|
||||
|
||||
gpio->flags &= ~PINMUX_FLAG_TYPE;
|
||||
|
||||
if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
|
||||
gpio->flags |= PINMUX_TYPE_GPIO;
|
||||
else {
|
||||
gpio->flags |= PINMUX_TYPE_FUNCTION;
|
||||
|
||||
spin_lock_irqsave(&pmx->lock, flags);
|
||||
pmx->nr_functions++;
|
||||
spin_unlock_irqrestore(&pmx->lock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
/* pinmux ranges -> pinctrl pin descs */
|
||||
static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
pmx->nr_pads = pfc->pdata->last_gpio - pfc->pdata->first_gpio + 1;
|
||||
|
||||
pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
|
||||
GFP_KERNEL);
|
||||
if (unlikely(!pmx->pads)) {
|
||||
pmx->nr_pads = 0;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
/*
|
||||
* We don't necessarily have a 1:1 mapping between pin and linux
|
||||
* GPIO number, as the latter maps to the associated enum_id.
|
||||
* Care needs to be taken to translate back to pin space when
|
||||
* dealing with any pin configurations.
|
||||
*/
|
||||
for (i = 0; i < pmx->nr_pads; i++) {
|
||||
struct pinctrl_pin_desc *pin = pmx->pads + i;
|
||||
struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
|
||||
|
||||
pin->number = pfc->pdata->first_gpio + i;
|
||||
pin->name = gpio->name;
|
||||
|
||||
/* XXX */
|
||||
if (unlikely(!gpio->enum_id))
|
||||
continue;
|
||||
|
||||
sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
sh_pfc_pinctrl_desc.pins = pmx->pads;
|
||||
sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i, fn;
|
||||
|
||||
pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
|
||||
sizeof(*pmx->functions), GFP_KERNEL);
|
||||
if (unlikely(!pmx->functions))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_irqsave(&pmx->lock, flags);
|
||||
|
||||
for (i = fn = 0; i < pmx->nr_pads; i++) {
|
||||
struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
|
||||
|
||||
if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
|
||||
pmx->functions[fn++] = gpio;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&pmx->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx;
|
||||
int ret;
|
||||
|
||||
pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
|
||||
if (unlikely(!pmx))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_init(&pmx->lock);
|
||||
|
||||
pmx->pfc = pfc;
|
||||
pfc->pinctrl = pmx;
|
||||
|
||||
ret = sh_pfc_map_gpios(pfc, pmx);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
ret = sh_pfc_map_functions(pfc, pmx);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx);
|
||||
if (IS_ERR(pmx->pctl))
|
||||
return PTR_ERR(pmx->pctl);
|
||||
|
||||
sh_pfc_gpio_range.npins = pfc->pdata->last_gpio
|
||||
- pfc->pdata->first_gpio + 1;
|
||||
sh_pfc_gpio_range.base = pfc->pdata->first_gpio;
|
||||
sh_pfc_gpio_range.pin_base = pfc->pdata->first_gpio;
|
||||
|
||||
pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
|
||||
|
||||
pinctrl_unregister(pmx->pctl);
|
||||
|
||||
pfc->pinctrl = NULL;
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in a new issue