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ARM: tegra: select correct parent clk for pll_p
For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of pll_ref in the tegra30_clk_init_table and this is resulting in a boot-time warning. This patch fixes this by correcting the clk init table. Signed-off-by: Sivaram Nair <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
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@ -102,7 +102,7 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
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static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
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/* name parent rate enabled */
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{ "clk_m", NULL, 0, true },
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{ "pll_p", "clk_m", 408000000, true },
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{ "pll_p", "pll_ref", 408000000, true },
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{ "pll_p_out1", "pll_p", 9600000, true },
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{ NULL, NULL, 0, 0},
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};
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