mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-25 22:23:14 -04:00
Merge ../bleed-2.6
This commit is contained in:
commit
6fbfddcb52
591 changed files with 23665 additions and 10479 deletions
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|
@ -31,7 +31,7 @@
|
|||
#else /* no PCI - no IOMMU. */
|
||||
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int gfp);
|
||||
dma_addr_t *dma_handle, gfp_t gfp);
|
||||
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
||||
enum dma_data_direction direction);
|
||||
|
||||
|
|
|
|||
|
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@ -17,6 +17,16 @@
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|||
#error You must include hardware.h not this file
|
||||
#endif /* __ASM_ARCH_HARDWARE_H */
|
||||
|
||||
/* Chip selects */
|
||||
#define AAEC_CS0 0x00000000
|
||||
#define AAEC_CS1 0x10000000
|
||||
#define AAEC_CS2 0x20000000
|
||||
#define AAEC_CS3 0x30000000
|
||||
|
||||
/* Flash */
|
||||
#define AAEC_FLASH_BASE AAEC_CS0
|
||||
#define AAEC_FLASH_SIZE SZ_64M
|
||||
|
||||
/* Interrupt controller */
|
||||
#define IRQ_BASE __REG(0x80000500)
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#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
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|
|
@ -148,4 +158,50 @@
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#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
|
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#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
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||||
|
||||
/* GPIO Registers */
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#define AAEC_GPIO_PHYS 0x80000e00
|
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|
||||
#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00)
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#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04)
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#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08)
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#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c)
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#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10)
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#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14)
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#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18)
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#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c)
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#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20)
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#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24)
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#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28)
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#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c)
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#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30)
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#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34)
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#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38)
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#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c)
|
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#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40)
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#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44)
|
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#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48)
|
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#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c)
|
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#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50)
|
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#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54)
|
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#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58)
|
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#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c)
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#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60)
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#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64)
|
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#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68)
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#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c)
|
||||
#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70)
|
||||
#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74)
|
||||
#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78)
|
||||
#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c)
|
||||
#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80)
|
||||
#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84)
|
||||
|
||||
#define AAEC_GPIO_PINMUX_PE0CON (1 << 0)
|
||||
#define AAEC_GPIO_PINMUX_PD0CON (1 << 1)
|
||||
#define AAEC_GPIO_PINMUX_CODECON (1 << 2)
|
||||
#define AAEC_GPIO_PINMUX_UART3CON (1 << 3)
|
||||
|
||||
/* LCD Controller */
|
||||
#define AAEC_CLCD_PHYS 0x80003000
|
||||
|
||||
#endif /* __ARM_ARCH_AAEC2000_H */
|
||||
|
|
|
|||
40
include/asm-arm/arch-aaec2000/aaed2000.h
Normal file
40
include/asm-arm/arch-aaec2000/aaed2000.h
Normal file
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@ -0,0 +1,40 @@
|
|||
/*
|
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* linux/include/asm-arm/arch-aaec2000/aaed2000.h
|
||||
*
|
||||
* AAED-2000 specific bits definition
|
||||
*
|
||||
* Copyright (c) 2005 Nicolas Bellido Y Ortega
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_AAED2000_H
|
||||
#define __ASM_ARCH_AAED2000_H
|
||||
|
||||
/* External GPIOs. */
|
||||
|
||||
#define EXT_GPIO_PBASE AAEC_CS3
|
||||
#define EXT_GPIO_VBASE 0xf8100000
|
||||
#define EXT_GPIO_LENGTH 0x00001000
|
||||
|
||||
#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE)
|
||||
#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE)
|
||||
|
||||
#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x)))
|
||||
#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x)))
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||||
|
||||
#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE)
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||||
|
||||
#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */
|
||||
#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */
|
||||
#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */
|
||||
#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */
|
||||
#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */
|
||||
#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */
|
||||
#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */
|
||||
#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */
|
||||
|
||||
|
||||
#endif /* __ARM_ARCH_AAED2000_H */
|
||||
|
|
@ -11,7 +11,8 @@
|
|||
#ifndef __ASM_ARCH_HARDWARE_H
|
||||
#define __ASM_ARCH_HARDWARE_H
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/arch/aaec2000.h>
|
||||
|
||||
/* The kernel is loaded at physical address 0xf8000000.
|
||||
* We map the IO space a bit after
|
||||
|
|
|
|||
|
|
@ -6,6 +6,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -10,6 +10,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -235,4 +235,121 @@
|
|||
#define CEIVA_PB0_BLK_BTN (1<<0)
|
||||
#endif // #if defined (CONFIG_ARCH_CEIVA)
|
||||
|
||||
#if defined (CONFIG_MACH_MP1000)
|
||||
/* NOR FLASH */
|
||||
#define MP1000_NIO_BASE 0xf9000000 /* virtual */
|
||||
#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
|
||||
#define MP1000_NIO_SIZE 0x00400000
|
||||
|
||||
/* DSP Interface */
|
||||
#define MP1000_DSP_BASE 0xfa000000 /* virtual */
|
||||
#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
|
||||
#define MP1000_DSP_SIZE 0x00100000
|
||||
|
||||
/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
|
||||
#define MP1000_LIO_BASE 0xfb000000 /* virtual */
|
||||
#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
|
||||
#define MP1000_LIO_SIZE 0x00100000
|
||||
|
||||
/* NAND FLASH */
|
||||
#define MP1000_FIO_BASE 0xfc000000 /* virtual */
|
||||
#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
|
||||
#define MP1000_FIO_SIZE 0x00800000
|
||||
|
||||
/* Ethernet */
|
||||
#define MP1000_EIO_BASE 0xfd000000 /* virtual */
|
||||
#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
|
||||
#define MP1000_EIO_SIZE 0x00100000
|
||||
|
||||
#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
|
||||
#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
|
||||
#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
|
||||
#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
|
||||
|
||||
/* IDE */
|
||||
#define MP1000_IDE_BASE 0xfe000000 /* virtual */
|
||||
#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
|
||||
#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
|
||||
|
||||
#define IRQ_HARDDISK IRQ_EINT2
|
||||
|
||||
/*
|
||||
* IDE registers definition
|
||||
*/
|
||||
|
||||
#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
|
||||
#define IDE_BASE_OFF (MP1000_IDE_BASE)
|
||||
|
||||
#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
|
||||
#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
|
||||
#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
|
||||
#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
|
||||
#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
|
||||
#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
|
||||
#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
|
||||
#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
|
||||
#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
|
||||
|
||||
#define IDE_IRQ IRQ_EINT2
|
||||
|
||||
|
||||
#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
|
||||
#define RTC_ALWAYS_BCD 0
|
||||
|
||||
/*
|
||||
// Definitions of the bit fields in the HwPortA register for the
|
||||
// MP1000 board.
|
||||
*/
|
||||
#define HwPortAKeyboardRow1 0x00000001
|
||||
#define HwPortAKeyboardRow2 0x00000002
|
||||
#define HwPortAKeyboardRow3 0x00000004
|
||||
#define HwPortAKeyboardRow4 0x00000008
|
||||
#define HwPortAKeyboardRow5 0x00000010
|
||||
#define HwPortAKeyboardRow6 0x00000020
|
||||
#define HwPortALCDEnable 0x00000040
|
||||
#define HwPortAOffhook 0x00000080
|
||||
|
||||
/*
|
||||
// Definitions of the bit fields in the HwPortB register for the
|
||||
// MP1000 board.
|
||||
*/
|
||||
#define HwPortBL3Mode 0x00000001
|
||||
#define HwPortBL3Clk 0x00000002
|
||||
#define HwPortBSClk 0x00000001
|
||||
#define HwPortBSData 0x00000002
|
||||
#define HwPortBL3Data 0x00000004
|
||||
#define HwPortBMute 0x00000008
|
||||
#define HwPortBQD0 0x00000010
|
||||
#define HwPortBQD1 0x00000020
|
||||
#define HwPortBQD2 0x00000040
|
||||
#define HwPortBQD3 0x00000080
|
||||
|
||||
/*
|
||||
// Definitions of the bit fields in the HwPortD register for the
|
||||
// MP1000 board.
|
||||
*/
|
||||
#define HwPortDLED1 0x00000001
|
||||
#define HwPortDLED2 0x00000002
|
||||
#define HwPortDLED3 0x00000004
|
||||
#define HwPortDLED4 0x00000008
|
||||
#define HwPortDLED5 0x00000010
|
||||
#define HwPortDEECS 0x00000020
|
||||
#define HwPortBRTS 0x00000040
|
||||
#define HwPortBRI 0x00000080
|
||||
|
||||
|
||||
/*
|
||||
// Definitions of the bit fields in the HwPortE register for the
|
||||
// MP1000 board.
|
||||
*/
|
||||
|
||||
#define HwPortECLE 0x00000001
|
||||
#define HwPortESepromDOut 0x00000001
|
||||
#define HwPortEALE 0x00000002
|
||||
#define HwPortESepromDIn 0x00000002
|
||||
#define HwPortENANDCS 0x00000004
|
||||
#define HwPortESepromCLK 0x00000004
|
||||
|
||||
#endif // #if defined (CONFIG_MACH_MP1000)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -20,6 +20,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
#define __io(a) ((void __iomem *)(a))
|
||||
|
|
|
|||
77
include/asm-arm/arch-clps711x/mp1000-seprom.h
Normal file
77
include/asm-arm/arch-clps711x/mp1000-seprom.h
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
#ifndef MP1000_SEPROM_H
|
||||
#define MP1000_SEPROM_H
|
||||
|
||||
/*
|
||||
* mp1000-seprom.h
|
||||
*
|
||||
*
|
||||
* This file contains the Serial EEPROM definitions for the MP1000 board
|
||||
*
|
||||
* Copyright (C) 2005 Comdial Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#define COMMAND_ERASE (0x1C0)
|
||||
#define COMMAND_ERASE_ALL (0x120)
|
||||
#define COMMAND_WRITE_DISABLE (0x100)
|
||||
#define COMMAND_WRITE_ENABLE (0x130)
|
||||
#define COMMAND_READ (0x180)
|
||||
#define COMMAND_WRITE (0x140)
|
||||
#define COMMAND_WRITE_ALL (0x110)
|
||||
|
||||
//
|
||||
// Serial EEPROM data format
|
||||
//
|
||||
|
||||
#define PACKED __attribute__ ((packed))
|
||||
|
||||
typedef struct _EEPROM {
|
||||
union {
|
||||
unsigned char eprom_byte_data[128];
|
||||
unsigned short eprom_short_data[64];
|
||||
struct {
|
||||
unsigned char version PACKED; // EEPROM Version "1" for now
|
||||
unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
|
||||
unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
|
||||
unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
|
||||
unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
|
||||
unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
|
||||
unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
|
||||
unsigned char country PACKED; // Country of deployment
|
||||
unsigned char mac_Address[6] PACKED; // MAC Address
|
||||
unsigned char oem_string[20] PACKED; // OEM ID string
|
||||
unsigned short feature_bits1 PACKED; // Feature Bits 1
|
||||
unsigned short feature_bits2 PACKED; // Feature Bits 2
|
||||
unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
|
||||
unsigned short checksum PACKED; // byte accumulated short checksum
|
||||
} eprom_struct;
|
||||
} variant;
|
||||
} eeprom_struct;
|
||||
|
||||
/* These settings must be mutually exclusive */
|
||||
#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
|
||||
#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
|
||||
#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
|
||||
|
||||
#define FEATURE_BITS1_CPUIS90MEG 0x0010
|
||||
|
||||
extern void seprom_init(void);
|
||||
extern eeprom_struct* get_seprom_ptr(void);
|
||||
extern unsigned char* get_eeprom_mac_address(void);
|
||||
|
||||
#endif /* MP1000_SEPROM_H */
|
||||
|
||||
|
|
@ -14,6 +14,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -20,6 +20,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffff
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
|
|
|
|||
|
|
@ -20,6 +20,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
#define __io(a) ((void __iomem *)(a))
|
||||
|
|
|
|||
|
|
@ -33,15 +33,6 @@
|
|||
#define IO_SIZE 0x0B000000 // How much?
|
||||
#define IO_START INTEGRATOR_HDR_BASE // PA of IO
|
||||
|
||||
/*
|
||||
* Similar to above, but for PCI addresses (memory, IO, Config and the
|
||||
* V3 chip itself). WARNING: this has to mirror definitions in platform.h
|
||||
*/
|
||||
#define PCI_MEMORY_VADDR 0xe8000000
|
||||
#define PCI_CONFIG_VADDR 0xec000000
|
||||
#define PCI_V3_VADDR 0xed000000
|
||||
#define PCI_IO_VADDR 0xee000000
|
||||
|
||||
#define PCIO_BASE PCI_IO_VADDR
|
||||
#define PCIMEM_BASE PCI_MEMORY_VADDR
|
||||
|
||||
|
|
|
|||
|
|
@ -22,6 +22,14 @@
|
|||
|
||||
#define IO_SPACE_LIMIT 0xffff
|
||||
|
||||
/*
|
||||
* WARNING: this has to mirror definitions in platform.h
|
||||
*/
|
||||
#define PCI_MEMORY_VADDR 0xe8000000
|
||||
#define PCI_CONFIG_VADDR 0xec000000
|
||||
#define PCI_V3_VADDR 0xed000000
|
||||
#define PCI_IO_VADDR 0xee000000
|
||||
|
||||
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
|
||||
#define __mem_pci(a) (a)
|
||||
#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
|
||||
|
|
|
|||
|
|
@ -11,6 +11,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
#define __io(p) ((void __iomem *)(p))
|
||||
|
|
|
|||
|
|
@ -15,6 +15,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
#define __mem_pci(a) (a)
|
||||
|
||||
|
|
|
|||
|
|
@ -392,4 +392,47 @@
|
|||
#define WDT_RESET_ENABLE 0x01000000
|
||||
|
||||
|
||||
/*
|
||||
* MSF registers. The IXP2400 and IXP2800 have somewhat different MSF
|
||||
* units, but the registers that differ between the two don't overlap,
|
||||
* so we can have one register list for both.
|
||||
*/
|
||||
#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x)))
|
||||
#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000)
|
||||
#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004)
|
||||
#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008)
|
||||
#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c)
|
||||
#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010)
|
||||
#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014)
|
||||
#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018)
|
||||
#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024)
|
||||
#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028)
|
||||
#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c)
|
||||
#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040)
|
||||
#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044)
|
||||
#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048)
|
||||
#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048)
|
||||
#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050)
|
||||
#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054)
|
||||
#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058)
|
||||
#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060)
|
||||
#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064)
|
||||
#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068)
|
||||
#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070)
|
||||
#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070)
|
||||
#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080)
|
||||
#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084)
|
||||
#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088)
|
||||
#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c)
|
||||
#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090)
|
||||
#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094)
|
||||
#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098)
|
||||
#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c)
|
||||
#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0)
|
||||
#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4)
|
||||
#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8)
|
||||
#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000)
|
||||
#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400)
|
||||
|
||||
|
||||
#endif /* _IXP2000_H_ */
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
|
|
|
|||
|
|
@ -11,6 +11,8 @@
|
|||
#ifndef __ASM_ARCH_IO_H
|
||||
#define __ASM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/* No ISA or PCI bus on this machine. */
|
||||
|
|
|
|||
|
|
@ -34,6 +34,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -44,12 +44,12 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
|
||||
# define __REG(x) (*((volatile u32 *)io_p2v(x)))
|
||||
|
||||
/* With indexed regs we don't want to feed the index through io_p2v()
|
||||
especially if it is a variable, otherwise horrible code will result. */
|
||||
# define __REG2(x,y) \
|
||||
(*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
|
||||
(*(volatile u32 *)((u32)&__REG(x) + (y)))
|
||||
|
||||
# define __PREG(x) (io_v2p((u32)&(x)))
|
||||
|
||||
|
|
|
|||
|
|
@ -6,6 +6,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
17
include/asm-arm/arch-pxa/irda.h
Normal file
17
include/asm-arm/arch-pxa/irda.h
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
#ifndef ASMARM_ARCH_IRDA_H
|
||||
#define ASMARM_ARCH_IRDA_H
|
||||
|
||||
/* board specific transceiver capabilities */
|
||||
|
||||
#define IR_OFF 1
|
||||
#define IR_SIRMODE 2
|
||||
#define IR_FIRMODE 4
|
||||
|
||||
struct pxaficp_platform_data {
|
||||
int transceiver_cap;
|
||||
void (*transceiver_mode)(struct device *dev, int mode);
|
||||
};
|
||||
|
||||
extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
|
||||
|
||||
#endif
|
||||
|
|
@ -326,6 +326,25 @@
|
|||
#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
|
||||
#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
|
||||
|
||||
/* Hardware UART (HWUART) */
|
||||
#define HWUART HWRBR
|
||||
#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */
|
||||
#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */
|
||||
#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */
|
||||
#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */
|
||||
#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */
|
||||
#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
|
||||
#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */
|
||||
#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
|
||||
#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */
|
||||
#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */
|
||||
#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */
|
||||
#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */
|
||||
#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */
|
||||
#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */
|
||||
#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
|
||||
#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
|
||||
|
||||
#define IER_DMAE (1 << 7) /* DMA Requests Enable */
|
||||
#define IER_UUE (1 << 6) /* UART Unit Enable */
|
||||
#define IER_NRZE (1 << 5) /* NRZ coding Enable */
|
||||
|
|
@ -1013,14 +1032,12 @@
|
|||
#define ICCR0_LBM (1 << 1) /* Loopback mode */
|
||||
#define ICCR0_ITR (1 << 0) /* IrDA transmission */
|
||||
|
||||
#ifdef CONFIG_PXA27x
|
||||
#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
|
||||
#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
|
||||
#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
|
||||
#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
|
||||
#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
|
||||
#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PXA27x
|
||||
#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
|
||||
|
|
@ -1250,9 +1267,13 @@
|
|||
#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
|
||||
#define GPIO41_FFRTS 41 /* FFUART request to send */
|
||||
#define GPIO42_BTRXD 42 /* BTUART receive data */
|
||||
#define GPIO42_HWRXD 42 /* HWUART receive data */
|
||||
#define GPIO43_BTTXD 43 /* BTUART transmit data */
|
||||
#define GPIO43_HWTXD 43 /* HWUART transmit data */
|
||||
#define GPIO44_BTCTS 44 /* BTUART clear to send */
|
||||
#define GPIO44_HWCTS 44 /* HWUART clear to send */
|
||||
#define GPIO45_BTRTS 45 /* BTUART request to send */
|
||||
#define GPIO45_HWRTS 45 /* HWUART request to send */
|
||||
#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
|
||||
#define GPIO46_ICPRXD 46 /* ICP receive data */
|
||||
#define GPIO46_STRXD 46 /* STD_UART receive data */
|
||||
|
|
@ -1378,17 +1399,26 @@
|
|||
#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
|
||||
#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
|
||||
#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
|
||||
#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
|
||||
#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
|
||||
#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
|
||||
#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
|
||||
#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
|
||||
#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
|
||||
#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
|
||||
#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
|
||||
#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
|
||||
#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
|
||||
#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
|
||||
#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
|
||||
#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
|
||||
|
|
@ -1763,6 +1793,7 @@
|
|||
#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */
|
||||
#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */
|
||||
#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */
|
||||
#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */
|
||||
#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */
|
||||
#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */
|
||||
#define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */
|
||||
|
|
@ -2282,4 +2313,11 @@
|
|||
|
||||
#endif
|
||||
|
||||
/* PWRMODE register M field values */
|
||||
|
||||
#define PWRMODE_IDLE 0x1
|
||||
#define PWRMODE_STANDBY 0x2
|
||||
#define PWRMODE_SLEEP 0x3
|
||||
#define PWRMODE_DEEPSLEEP 0x7
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#define FFUART ((volatile unsigned long *)0x40100000)
|
||||
#define BTUART ((volatile unsigned long *)0x40200000)
|
||||
#define STUART ((volatile unsigned long *)0x40700000)
|
||||
#define HWUART ((volatile unsigned long *)0x41600000)
|
||||
|
||||
#define UART FFUART
|
||||
|
||||
|
|
|
|||
|
|
@ -13,6 +13,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
* 07-Sep-2004 RTP Created file
|
||||
* 03-Nov-2004 BJD Updated and minor cleanups
|
||||
* 03-Aug-2005 RTP Renamed to fb.h
|
||||
* 26-Oct-2005 BJD Changed name of platdata init
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARM_FB_H
|
||||
|
|
@ -64,6 +65,6 @@ struct s3c2410fb_mach_info {
|
|||
unsigned long lpcsel;
|
||||
};
|
||||
|
||||
void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info);
|
||||
extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
|
||||
|
||||
#endif /* __ASM_ARM_FB_H */
|
||||
|
|
|
|||
|
|
@ -15,6 +15,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
* 18-11-2004 BJD Added S3C2440 AC97 controls
|
||||
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
|
||||
* 28-Mar-2005 LCVR Fixed definition of GPB10
|
||||
* 26-Oct-2005 BJD Added generic configuration types
|
||||
*/
|
||||
|
||||
|
||||
|
|
@ -43,6 +44,11 @@
|
|||
/* general configuration options */
|
||||
|
||||
#define S3C2410_GPIO_LEAVE (0xFFFFFFFF)
|
||||
#define S3C2410_GPIO_INPUT (0xFFFFFFF0)
|
||||
#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1)
|
||||
#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */
|
||||
#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */
|
||||
#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */
|
||||
|
||||
/* configure GPIO ports A..G */
|
||||
|
||||
|
|
|
|||
|
|
@ -21,13 +21,6 @@
|
|||
#define UNCACHEABLE_ADDR 0xfa050000
|
||||
|
||||
|
||||
/*
|
||||
* We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for
|
||||
* in*()/out*() macros to be usable for all cases.
|
||||
*/
|
||||
#define PCIO_BASE 0
|
||||
|
||||
|
||||
/*
|
||||
* SA1100 internal I/O mappings
|
||||
*
|
||||
|
|
|
|||
|
|
@ -10,13 +10,19 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
* We don't actually have real ISA nor PCI buses, but there is so many
|
||||
* drivers out there that might just work if we fake them...
|
||||
*/
|
||||
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
|
||||
static inline void __iomem *__io(unsigned long addr)
|
||||
{
|
||||
return (void __iomem *)addr;
|
||||
}
|
||||
#define __io(a) __io(a)
|
||||
#define __mem_pci(a) (a)
|
||||
#define __mem_isa(a) (a)
|
||||
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
* Copyright (c) 1999 Nicolas Pitre <nico@cam.org>
|
||||
*/
|
||||
#include <linux/config.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -11,6 +11,8 @@
|
|||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
|
|||
* device-viewed address.
|
||||
*/
|
||||
extern void *
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, int gfp);
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
|
||||
|
||||
/**
|
||||
* dma_free_coherent - free memory allocated by dma_alloc_coherent
|
||||
|
|
@ -117,7 +117,7 @@ int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
|
|||
* device-viewed address.
|
||||
*/
|
||||
extern void *
|
||||
dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int gfp);
|
||||
dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
|
||||
|
||||
#define dma_free_writecombine(dev,size,cpu_addr,handle) \
|
||||
dma_free_coherent(dev,size,cpu_addr,handle)
|
||||
|
|
|
|||
|
|
@ -26,7 +26,6 @@
|
|||
#include <linux/types.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
/*
|
||||
* ISA I/O bus memory addresses are 1:1 with the physical address.
|
||||
|
|
|
|||
|
|
@ -48,10 +48,10 @@ struct machine_desc {
|
|||
* Set of macros to define architecture features. This is built into
|
||||
* a table by the linker.
|
||||
*/
|
||||
#define MACHINE_START(_type,_name) \
|
||||
const struct machine_desc __mach_desc_##_type \
|
||||
#define MACHINE_START(_type,_name) \
|
||||
static const struct machine_desc __mach_desc_##_type \
|
||||
__attribute__((__section__(".arch.info.init"))) = { \
|
||||
.nr = MACH_TYPE_##_type, \
|
||||
.nr = MACH_TYPE_##_type, \
|
||||
.name = _name,
|
||||
|
||||
#define MACHINE_END \
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@
|
|||
*/
|
||||
struct map_desc {
|
||||
unsigned long virtual;
|
||||
unsigned long physical;
|
||||
unsigned long pfn;
|
||||
unsigned long length;
|
||||
unsigned int type;
|
||||
};
|
||||
|
|
@ -27,6 +27,9 @@ struct meminfo;
|
|||
#define MT_ROM 6
|
||||
#define MT_IXP2000_DEVICE 7
|
||||
|
||||
#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT)
|
||||
#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT)
|
||||
|
||||
extern void create_memmap_holes(struct meminfo *);
|
||||
extern void memtable_init(struct meminfo *);
|
||||
extern void iotable_init(struct map_desc *, int);
|
||||
|
|
|
|||
|
|
@ -15,14 +15,14 @@
|
|||
|
||||
#ifdef CONFIG_PCI
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag);
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
|
||||
void dma_free_coherent(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
#else
|
||||
static inline void *
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
int flag)
|
||||
gfp_t flag)
|
||||
{
|
||||
BUG();
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
extern unsigned long __nongprelbss dma_coherent_mem_start;
|
||||
extern unsigned long __nongprelbss dma_coherent_mem_end;
|
||||
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, int gfp);
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
|
||||
void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ extern void pcibios_set_master(struct pci_dev *dev);
|
|||
extern void pcibios_penalize_isa_irq(int irq);
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle);
|
||||
extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
|
||||
extern void consistent_free(void *vaddr);
|
||||
extern void consistent_sync(void *vaddr, size_t size, int direction);
|
||||
extern void consistent_sync_page(struct page *page, unsigned long offset,
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
|
||||
static inline void *
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
int flag)
|
||||
gfp_t flag)
|
||||
{
|
||||
BUG();
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val,
|
|||
|
||||
/* DMA-mapping interface: */
|
||||
typedef void ia64_mv_dma_init (void);
|
||||
typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, int);
|
||||
typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t);
|
||||
typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t);
|
||||
typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int);
|
||||
typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int);
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
|
||||
static inline void *
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
int flag)
|
||||
gfp_t flag)
|
||||
{
|
||||
return (void *)NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,13 +5,13 @@
|
|||
#include <asm/cache.h>
|
||||
|
||||
void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag);
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
|
||||
void dma_free_noncoherent(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag);
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
|
||||
void dma_free_coherent(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
|
|
|
|||
|
|
@ -128,26 +128,26 @@ struct hpc3_ethregs {
|
|||
volatile u32 rx_gfptr; /* current GIO fifo ptr */
|
||||
volatile u32 rx_dfptr; /* current device fifo ptr */
|
||||
u32 _unused1; /* padding */
|
||||
volatile u32 rx_reset; /* reset register */
|
||||
#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */
|
||||
#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */
|
||||
#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
|
||||
volatile u32 reset; /* reset register */
|
||||
#define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */
|
||||
#define HPC3_ERST_CLRIRQ 0x2 /* Clear channel interrupt */
|
||||
#define HPC3_ERST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
|
||||
|
||||
volatile u32 rx_dconfig; /* DMA configuration register */
|
||||
#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
|
||||
#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
|
||||
#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
|
||||
#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
|
||||
#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
|
||||
#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
|
||||
#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
|
||||
#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */
|
||||
volatile u32 dconfig; /* DMA configuration register */
|
||||
#define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
|
||||
#define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
|
||||
#define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
|
||||
#define HPC3_EDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
|
||||
#define HPC3_EDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
|
||||
#define HPC3_EDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
|
||||
#define HPC3_EDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
|
||||
#define HPC3_EDCFG_PTO 0x30000 /* Programmed timeout value for above two */
|
||||
|
||||
volatile u32 rx_pconfig; /* PIO configuration register */
|
||||
#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
|
||||
#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
|
||||
#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
|
||||
#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
|
||||
volatile u32 pconfig; /* PIO configuration register */
|
||||
#define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
|
||||
#define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
|
||||
#define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
|
||||
#define HPC3_EPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
|
||||
|
||||
u32 _unused2[0x1000/4 - 8]; /* padding */
|
||||
|
||||
|
|
|
|||
|
|
@ -9,8 +9,8 @@
|
|||
/* See Documentation/DMA-mapping.txt */
|
||||
struct hppa_dma_ops {
|
||||
int (*dma_supported)(struct device *dev, u64 mask);
|
||||
void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, int flag);
|
||||
void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, int flag);
|
||||
void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
|
||||
void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
|
||||
void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
|
||||
dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
|
||||
void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
|
||||
|
|
@ -49,14 +49,14 @@ extern struct hppa_dma_ops *hppa_dma_ops;
|
|||
|
||||
static inline void *
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
int flag)
|
||||
gfp_t flag)
|
||||
{
|
||||
return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
|
||||
}
|
||||
|
||||
static inline void *
|
||||
dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
int flag)
|
||||
gfp_t flag)
|
||||
{
|
||||
return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
* allocate the space "normally" and use the cache management functions
|
||||
* to ensure it is consistent.
|
||||
*/
|
||||
extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, int gfp);
|
||||
extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
|
||||
extern void __dma_free_coherent(size_t size, void *vaddr);
|
||||
extern void __dma_sync(void *vaddr, size_t size, int direction);
|
||||
extern void __dma_sync_page(struct page *page, unsigned long offset,
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
extern struct bus_type pci_bus_type;
|
||||
|
||||
/* arch/sh/mm/consistent.c */
|
||||
extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
|
||||
extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle);
|
||||
extern void consistent_free(void *vaddr, size_t size);
|
||||
extern void consistent_sync(void *vaddr, size_t size, int direction);
|
||||
|
||||
|
|
@ -26,7 +26,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
|
|||
}
|
||||
|
||||
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag)
|
||||
dma_addr_t *dma_handle, gfp_t flag)
|
||||
{
|
||||
if (sh_mv.mv_consistent_alloc) {
|
||||
void *ret;
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ struct sh_machine_vector
|
|||
|
||||
void (*mv_heartbeat)(void);
|
||||
|
||||
void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, int);
|
||||
void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t);
|
||||
int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t);
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
|
|||
}
|
||||
|
||||
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag)
|
||||
dma_addr_t *dma_handle, gfp_t flag)
|
||||
{
|
||||
return consistent_alloc(NULL, size, dma_handle);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
#else
|
||||
|
||||
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag)
|
||||
dma_addr_t *dma_handle, gfp_t flag)
|
||||
{
|
||||
BUG();
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
struct device;
|
||||
|
||||
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag)
|
||||
dma_addr_t *dma_handle, gfp_t flag)
|
||||
{
|
||||
BUG();
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ dma_set_mask(struct device *dev, u64 dma_mask)
|
|||
|
||||
static inline void *
|
||||
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
int flag)
|
||||
gfp_t flag)
|
||||
{
|
||||
BUG();
|
||||
return((void *) 0);
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ extern unsigned long uml_physmem;
|
|||
#define pfn_valid(pfn) ((pfn) < max_mapnr)
|
||||
#define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v)))
|
||||
|
||||
extern struct page *arch_validate(struct page *page, int mask, int order);
|
||||
extern struct page *arch_validate(struct page *page, gfp_t mask, int order);
|
||||
#define HAVE_ARCH_VALIDATE
|
||||
|
||||
extern void arch_free_page(struct page *page, int order);
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ extern dma_addr_t bad_dma_address;
|
|||
(swiotlb ? swiotlb_dma_mapping_error(x) : ((x) == bad_dma_address))
|
||||
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
unsigned gfp);
|
||||
gfp_t gfp);
|
||||
void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
|
||||
dma_addr_t dma_handle);
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
|
|||
int nents, int direction);
|
||||
extern int swiotlb_dma_mapping_error(dma_addr_t dma_addr);
|
||||
extern void *swiotlb_alloc_coherent (struct device *hwdev, size_t size,
|
||||
dma_addr_t *dma_handle, int flags);
|
||||
dma_addr_t *dma_handle, gfp_t flags);
|
||||
extern void swiotlb_free_coherent (struct device *hwdev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ extern void consistent_sync(void*, size_t, int);
|
|||
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
|
||||
|
||||
void *dma_alloc_coherent(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, int flag);
|
||||
dma_addr_t *dma_handle, gfp_t flag);
|
||||
|
||||
void dma_free_coherent(struct device *dev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
|
|
|
|||
|
|
@ -42,13 +42,18 @@ enum {
|
|||
ATA_SECT_SIZE = 512,
|
||||
|
||||
ATA_ID_WORDS = 256,
|
||||
ATA_ID_PROD_OFS = 27,
|
||||
ATA_ID_FW_REV_OFS = 23,
|
||||
ATA_ID_SERNO_OFS = 10,
|
||||
ATA_ID_MAJOR_VER = 80,
|
||||
ATA_ID_PIO_MODES = 64,
|
||||
ATA_ID_FW_REV_OFS = 23,
|
||||
ATA_ID_PROD_OFS = 27,
|
||||
ATA_ID_OLD_PIO_MODES = 51,
|
||||
ATA_ID_FIELD_VALID = 53,
|
||||
ATA_ID_MWDMA_MODES = 63,
|
||||
ATA_ID_PIO_MODES = 64,
|
||||
ATA_ID_EIDE_DMA_MIN = 65,
|
||||
ATA_ID_EIDE_PIO = 67,
|
||||
ATA_ID_EIDE_PIO_IORDY = 68,
|
||||
ATA_ID_UDMA_MODES = 88,
|
||||
ATA_ID_MAJOR_VER = 80,
|
||||
ATA_ID_PIO4 = (1 << 1),
|
||||
|
||||
ATA_PCI_CTL_OFS = 2,
|
||||
|
|
@ -128,10 +133,15 @@ enum {
|
|||
ATA_CMD_PIO_READ_EXT = 0x24,
|
||||
ATA_CMD_PIO_WRITE = 0x30,
|
||||
ATA_CMD_PIO_WRITE_EXT = 0x34,
|
||||
ATA_CMD_READ_MULTI = 0xC4,
|
||||
ATA_CMD_READ_MULTI_EXT = 0x29,
|
||||
ATA_CMD_WRITE_MULTI = 0xC5,
|
||||
ATA_CMD_WRITE_MULTI_EXT = 0x39,
|
||||
ATA_CMD_SET_FEATURES = 0xEF,
|
||||
ATA_CMD_PACKET = 0xA0,
|
||||
ATA_CMD_VERIFY = 0x40,
|
||||
ATA_CMD_VERIFY_EXT = 0x42,
|
||||
ATA_CMD_INIT_DEV_PARAMS = 0x91,
|
||||
|
||||
/* SETFEATURES stuff */
|
||||
SETFEATURES_XFER = 0x03,
|
||||
|
|
@ -146,14 +156,14 @@ enum {
|
|||
XFER_MW_DMA_2 = 0x22,
|
||||
XFER_MW_DMA_1 = 0x21,
|
||||
XFER_MW_DMA_0 = 0x20,
|
||||
XFER_SW_DMA_2 = 0x12,
|
||||
XFER_SW_DMA_1 = 0x11,
|
||||
XFER_SW_DMA_0 = 0x10,
|
||||
XFER_PIO_4 = 0x0C,
|
||||
XFER_PIO_3 = 0x0B,
|
||||
XFER_PIO_2 = 0x0A,
|
||||
XFER_PIO_1 = 0x09,
|
||||
XFER_PIO_0 = 0x08,
|
||||
XFER_SW_DMA_2 = 0x12,
|
||||
XFER_SW_DMA_1 = 0x11,
|
||||
XFER_SW_DMA_0 = 0x10,
|
||||
XFER_PIO_SLOW = 0x00,
|
||||
|
||||
/* ATAPI stuff */
|
||||
|
|
@ -181,6 +191,7 @@ enum {
|
|||
ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
|
||||
ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
|
||||
ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
|
||||
ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
|
||||
};
|
||||
|
||||
enum ata_tf_protocols {
|
||||
|
|
@ -250,7 +261,19 @@ struct ata_taskfile {
|
|||
((u64) (id)[(n) + 1] << 16) | \
|
||||
((u64) (id)[(n) + 0]) )
|
||||
|
||||
static inline int atapi_cdb_len(u16 *dev_id)
|
||||
static inline int ata_id_current_chs_valid(const u16 *id)
|
||||
{
|
||||
/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
|
||||
has not been issued to the device then the values of
|
||||
id[54] to id[56] are vendor specific. */
|
||||
return (id[53] & 0x01) && /* Current translation valid */
|
||||
id[54] && /* cylinders in current translation */
|
||||
id[55] && /* heads in current translation */
|
||||
id[55] <= 16 &&
|
||||
id[56]; /* sectors in current translation */
|
||||
}
|
||||
|
||||
static inline int atapi_cdb_len(const u16 *dev_id)
|
||||
{
|
||||
u16 tmp = dev_id[0] & 0x3;
|
||||
switch (tmp) {
|
||||
|
|
@ -260,7 +283,7 @@ static inline int atapi_cdb_len(u16 *dev_id)
|
|||
}
|
||||
}
|
||||
|
||||
static inline int is_atapi_taskfile(struct ata_taskfile *tf)
|
||||
static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
|
||||
{
|
||||
return (tf->protocol == ATA_PROT_ATAPI) ||
|
||||
(tf->protocol == ATA_PROT_ATAPI_NODATA) ||
|
||||
|
|
|
|||
|
|
@ -260,11 +260,11 @@ extern int audit_filter_user(struct netlink_skb_parms *cb, int type);
|
|||
#ifdef CONFIG_AUDIT
|
||||
/* These are defined in audit.c */
|
||||
/* Public API */
|
||||
extern void audit_log(struct audit_context *ctx, int gfp_mask,
|
||||
extern void audit_log(struct audit_context *ctx, gfp_t gfp_mask,
|
||||
int type, const char *fmt, ...)
|
||||
__attribute__((format(printf,4,5)));
|
||||
|
||||
extern struct audit_buffer *audit_log_start(struct audit_context *ctx, int gfp_mask, int type);
|
||||
extern struct audit_buffer *audit_log_start(struct audit_context *ctx, gfp_t gfp_mask, int type);
|
||||
extern void audit_log_format(struct audit_buffer *ab,
|
||||
const char *fmt, ...)
|
||||
__attribute__((format(printf,2,3)));
|
||||
|
|
|
|||
|
|
@ -301,7 +301,7 @@ extern struct bio *bio_map_user_iov(struct request_queue *,
|
|||
struct sg_iovec *, int, int);
|
||||
extern void bio_unmap_user(struct bio *);
|
||||
extern struct bio *bio_map_kern(struct request_queue *, void *, unsigned int,
|
||||
unsigned int);
|
||||
gfp_t);
|
||||
extern void bio_set_pages_dirty(struct bio *bio);
|
||||
extern void bio_check_pages_dirty(struct bio *bio);
|
||||
extern struct bio *bio_copy_user(struct request_queue *, unsigned long, unsigned int, int);
|
||||
|
|
|
|||
|
|
@ -96,8 +96,8 @@ struct io_context {
|
|||
|
||||
void put_io_context(struct io_context *ioc);
|
||||
void exit_io_context(void);
|
||||
struct io_context *current_io_context(int gfp_flags);
|
||||
struct io_context *get_io_context(int gfp_flags);
|
||||
struct io_context *current_io_context(gfp_t gfp_flags);
|
||||
struct io_context *get_io_context(gfp_t gfp_flags);
|
||||
void copy_io_context(struct io_context **pdst, struct io_context **psrc);
|
||||
void swap_io_context(struct io_context **ioc1, struct io_context **ioc2);
|
||||
|
||||
|
|
@ -107,9 +107,9 @@ typedef void (rq_end_io_fn)(struct request *);
|
|||
struct request_list {
|
||||
int count[2];
|
||||
int starved[2];
|
||||
int elvpriv;
|
||||
mempool_t *rq_pool;
|
||||
wait_queue_head_t wait[2];
|
||||
wait_queue_head_t drain;
|
||||
};
|
||||
|
||||
#define BLK_MAX_CDB 16
|
||||
|
|
@ -203,6 +203,7 @@ struct request {
|
|||
enum rq_flag_bits {
|
||||
__REQ_RW, /* not set, read. set, write */
|
||||
__REQ_FAILFAST, /* no low level driver retries */
|
||||
__REQ_SORTED, /* elevator knows about this request */
|
||||
__REQ_SOFTBARRIER, /* may not be passed by ioscheduler */
|
||||
__REQ_HARDBARRIER, /* may not be passed by drive either */
|
||||
__REQ_CMD, /* is a regular fs rw request */
|
||||
|
|
@ -210,6 +211,7 @@ enum rq_flag_bits {
|
|||
__REQ_STARTED, /* drive already may have started this one */
|
||||
__REQ_DONTPREP, /* don't call prep for this one */
|
||||
__REQ_QUEUED, /* uses queueing */
|
||||
__REQ_ELVPRIV, /* elevator private data attached */
|
||||
/*
|
||||
* for ATA/ATAPI devices
|
||||
*/
|
||||
|
|
@ -235,6 +237,7 @@ enum rq_flag_bits {
|
|||
|
||||
#define REQ_RW (1 << __REQ_RW)
|
||||
#define REQ_FAILFAST (1 << __REQ_FAILFAST)
|
||||
#define REQ_SORTED (1 << __REQ_SORTED)
|
||||
#define REQ_SOFTBARRIER (1 << __REQ_SOFTBARRIER)
|
||||
#define REQ_HARDBARRIER (1 << __REQ_HARDBARRIER)
|
||||
#define REQ_CMD (1 << __REQ_CMD)
|
||||
|
|
@ -242,6 +245,7 @@ enum rq_flag_bits {
|
|||
#define REQ_STARTED (1 << __REQ_STARTED)
|
||||
#define REQ_DONTPREP (1 << __REQ_DONTPREP)
|
||||
#define REQ_QUEUED (1 << __REQ_QUEUED)
|
||||
#define REQ_ELVPRIV (1 << __REQ_ELVPRIV)
|
||||
#define REQ_PC (1 << __REQ_PC)
|
||||
#define REQ_BLOCK_PC (1 << __REQ_BLOCK_PC)
|
||||
#define REQ_SENSE (1 << __REQ_SENSE)
|
||||
|
|
@ -332,6 +336,12 @@ struct request_queue
|
|||
prepare_flush_fn *prepare_flush_fn;
|
||||
end_flush_fn *end_flush_fn;
|
||||
|
||||
/*
|
||||
* Dispatch queue sorting
|
||||
*/
|
||||
sector_t end_sector;
|
||||
struct request *boundary_rq;
|
||||
|
||||
/*
|
||||
* Auto-unplugging state
|
||||
*/
|
||||
|
|
@ -354,7 +364,7 @@ struct request_queue
|
|||
* queue needs bounce pages for pages above this limit
|
||||
*/
|
||||
unsigned long bounce_pfn;
|
||||
unsigned int bounce_gfp;
|
||||
gfp_t bounce_gfp;
|
||||
|
||||
/*
|
||||
* various queue flags, see QUEUE_* below
|
||||
|
|
@ -405,8 +415,6 @@ struct request_queue
|
|||
unsigned int sg_reserved_size;
|
||||
int node;
|
||||
|
||||
struct list_head drain_list;
|
||||
|
||||
/*
|
||||
* reserved for flush operations
|
||||
*/
|
||||
|
|
@ -434,7 +442,7 @@ enum {
|
|||
#define QUEUE_FLAG_DEAD 5 /* queue being torn down */
|
||||
#define QUEUE_FLAG_REENTER 6 /* Re-entrancy avoidance */
|
||||
#define QUEUE_FLAG_PLUGGED 7 /* queue is plugged */
|
||||
#define QUEUE_FLAG_DRAIN 8 /* draining queue for sched switch */
|
||||
#define QUEUE_FLAG_ELVSWITCH 8 /* don't use elevator, just do FIFO */
|
||||
#define QUEUE_FLAG_FLUSH 9 /* doing barrier flush sequence */
|
||||
|
||||
#define blk_queue_plugged(q) test_bit(QUEUE_FLAG_PLUGGED, &(q)->queue_flags)
|
||||
|
|
@ -454,6 +462,7 @@ enum {
|
|||
#define blk_pm_request(rq) \
|
||||
((rq)->flags & (REQ_PM_SUSPEND | REQ_PM_RESUME))
|
||||
|
||||
#define blk_sorted_rq(rq) ((rq)->flags & REQ_SORTED)
|
||||
#define blk_barrier_rq(rq) ((rq)->flags & REQ_HARDBARRIER)
|
||||
#define blk_barrier_preflush(rq) ((rq)->flags & REQ_BAR_PREFLUSH)
|
||||
#define blk_barrier_postflush(rq) ((rq)->flags & REQ_BAR_POSTFLUSH)
|
||||
|
|
@ -550,7 +559,7 @@ extern void generic_make_request(struct bio *bio);
|
|||
extern void blk_put_request(struct request *);
|
||||
extern void blk_end_sync_rq(struct request *rq);
|
||||
extern void blk_attempt_remerge(request_queue_t *, struct request *);
|
||||
extern struct request *blk_get_request(request_queue_t *, int, int);
|
||||
extern struct request *blk_get_request(request_queue_t *, int, gfp_t);
|
||||
extern void blk_insert_request(request_queue_t *, struct request *, int, void *);
|
||||
extern void blk_requeue_request(request_queue_t *, struct request *);
|
||||
extern void blk_plug_device(request_queue_t *);
|
||||
|
|
@ -565,7 +574,7 @@ extern void blk_run_queue(request_queue_t *);
|
|||
extern void blk_queue_activity_fn(request_queue_t *, activity_fn *, void *);
|
||||
extern int blk_rq_map_user(request_queue_t *, struct request *, void __user *, unsigned int);
|
||||
extern int blk_rq_unmap_user(struct bio *, unsigned int);
|
||||
extern int blk_rq_map_kern(request_queue_t *, struct request *, void *, unsigned int, unsigned int);
|
||||
extern int blk_rq_map_kern(request_queue_t *, struct request *, void *, unsigned int, gfp_t);
|
||||
extern int blk_rq_map_user_iov(request_queue_t *, struct request *, struct sg_iovec *, int);
|
||||
extern int blk_execute_rq(request_queue_t *, struct gendisk *,
|
||||
struct request *, int);
|
||||
|
|
@ -611,12 +620,21 @@ extern void end_request(struct request *req, int uptodate);
|
|||
|
||||
static inline void blkdev_dequeue_request(struct request *req)
|
||||
{
|
||||
BUG_ON(list_empty(&req->queuelist));
|
||||
elv_dequeue_request(req->q, req);
|
||||
}
|
||||
|
||||
list_del_init(&req->queuelist);
|
||||
/*
|
||||
* This should be in elevator.h, but that requires pulling in rq and q
|
||||
*/
|
||||
static inline void elv_dispatch_add_tail(struct request_queue *q,
|
||||
struct request *rq)
|
||||
{
|
||||
if (q->last_merge == rq)
|
||||
q->last_merge = NULL;
|
||||
|
||||
if (req->rl)
|
||||
elv_remove_request(req->q, req);
|
||||
q->end_sector = rq_end_sector(rq);
|
||||
q->boundary_rq = rq;
|
||||
list_add_tail(&rq->queuelist, &q->queue_head);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -650,12 +668,10 @@ extern void blk_dump_rq_flags(struct request *, char *);
|
|||
extern void generic_unplug_device(request_queue_t *);
|
||||
extern void __generic_unplug_device(request_queue_t *);
|
||||
extern long nr_blockdev_pages(void);
|
||||
extern void blk_wait_queue_drained(request_queue_t *, int);
|
||||
extern void blk_finish_queue_drain(request_queue_t *);
|
||||
|
||||
int blk_get_queue(request_queue_t *);
|
||||
request_queue_t *blk_alloc_queue(int gfp_mask);
|
||||
request_queue_t *blk_alloc_queue_node(int,int);
|
||||
request_queue_t *blk_alloc_queue(gfp_t);
|
||||
request_queue_t *blk_alloc_queue_node(gfp_t, int);
|
||||
#define blk_put_queue(q) blk_cleanup_queue((q))
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -188,7 +188,7 @@ extern int buffer_heads_over_limit;
|
|||
* Generic address_space_operations implementations for buffer_head-backed
|
||||
* address_spaces.
|
||||
*/
|
||||
int try_to_release_page(struct page * page, int gfp_mask);
|
||||
int try_to_release_page(struct page * page, gfp_t gfp_mask);
|
||||
int block_invalidatepage(struct page *page, unsigned long offset);
|
||||
int block_write_full_page(struct page *page, get_block_t *get_block,
|
||||
struct writeback_control *wbc);
|
||||
|
|
|
|||
|
|
@ -37,8 +37,6 @@
|
|||
#include <linux/cycx_x25.h>
|
||||
#endif
|
||||
|
||||
#define is_digit(ch) (((ch)>=(unsigned)'0'&&(ch)<=(unsigned)'9')?1:0)
|
||||
|
||||
/* Adapter Data Space.
|
||||
* This structure is needed because we handle multiple cards, otherwise
|
||||
* static data would do it.
|
||||
|
|
|
|||
|
|
@ -60,6 +60,5 @@ extern int cycx_peek(struct cycx_hw *hw, u32 addr, void *buf, u32 len);
|
|||
extern int cycx_poke(struct cycx_hw *hw, u32 addr, void *buf, u32 len);
|
||||
extern int cycx_exec(void __iomem *addr);
|
||||
|
||||
extern void cycx_inten(struct cycx_hw *hw);
|
||||
extern void cycx_intr(struct cycx_hw *hw);
|
||||
#endif /* _CYCX_DRV_H */
|
||||
|
|
|
|||
|
|
@ -8,18 +8,17 @@ typedef void (elevator_merge_req_fn) (request_queue_t *, struct request *, struc
|
|||
|
||||
typedef void (elevator_merged_fn) (request_queue_t *, struct request *);
|
||||
|
||||
typedef struct request *(elevator_next_req_fn) (request_queue_t *);
|
||||
typedef int (elevator_dispatch_fn) (request_queue_t *, int);
|
||||
|
||||
typedef void (elevator_add_req_fn) (request_queue_t *, struct request *, int);
|
||||
typedef void (elevator_add_req_fn) (request_queue_t *, struct request *);
|
||||
typedef int (elevator_queue_empty_fn) (request_queue_t *);
|
||||
typedef void (elevator_remove_req_fn) (request_queue_t *, struct request *);
|
||||
typedef void (elevator_requeue_req_fn) (request_queue_t *, struct request *);
|
||||
typedef struct request *(elevator_request_list_fn) (request_queue_t *, struct request *);
|
||||
typedef void (elevator_completed_req_fn) (request_queue_t *, struct request *);
|
||||
typedef int (elevator_may_queue_fn) (request_queue_t *, int, struct bio *);
|
||||
|
||||
typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, struct bio *, int);
|
||||
typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, struct bio *, gfp_t);
|
||||
typedef void (elevator_put_req_fn) (request_queue_t *, struct request *);
|
||||
typedef void (elevator_activate_req_fn) (request_queue_t *, struct request *);
|
||||
typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *);
|
||||
|
||||
typedef int (elevator_init_fn) (request_queue_t *, elevator_t *);
|
||||
|
|
@ -31,10 +30,9 @@ struct elevator_ops
|
|||
elevator_merged_fn *elevator_merged_fn;
|
||||
elevator_merge_req_fn *elevator_merge_req_fn;
|
||||
|
||||
elevator_next_req_fn *elevator_next_req_fn;
|
||||
elevator_dispatch_fn *elevator_dispatch_fn;
|
||||
elevator_add_req_fn *elevator_add_req_fn;
|
||||
elevator_remove_req_fn *elevator_remove_req_fn;
|
||||
elevator_requeue_req_fn *elevator_requeue_req_fn;
|
||||
elevator_activate_req_fn *elevator_activate_req_fn;
|
||||
elevator_deactivate_req_fn *elevator_deactivate_req_fn;
|
||||
|
||||
elevator_queue_empty_fn *elevator_queue_empty_fn;
|
||||
|
|
@ -81,15 +79,15 @@ struct elevator_queue
|
|||
/*
|
||||
* block elevator interface
|
||||
*/
|
||||
extern void elv_dispatch_sort(request_queue_t *, struct request *);
|
||||
extern void elv_add_request(request_queue_t *, struct request *, int, int);
|
||||
extern void __elv_add_request(request_queue_t *, struct request *, int, int);
|
||||
extern int elv_merge(request_queue_t *, struct request **, struct bio *);
|
||||
extern void elv_merge_requests(request_queue_t *, struct request *,
|
||||
struct request *);
|
||||
extern void elv_merged_request(request_queue_t *, struct request *);
|
||||
extern void elv_remove_request(request_queue_t *, struct request *);
|
||||
extern void elv_dequeue_request(request_queue_t *, struct request *);
|
||||
extern void elv_requeue_request(request_queue_t *, struct request *);
|
||||
extern void elv_deactivate_request(request_queue_t *, struct request *);
|
||||
extern int elv_queue_empty(request_queue_t *);
|
||||
extern struct request *elv_next_request(struct request_queue *q);
|
||||
extern struct request *elv_former_request(request_queue_t *, struct request *);
|
||||
|
|
@ -98,7 +96,7 @@ extern int elv_register_queue(request_queue_t *q);
|
|||
extern void elv_unregister_queue(request_queue_t *q);
|
||||
extern int elv_may_queue(request_queue_t *, int, struct bio *);
|
||||
extern void elv_completed_request(request_queue_t *, struct request *);
|
||||
extern int elv_set_request(request_queue_t *, struct request *, struct bio *, int);
|
||||
extern int elv_set_request(request_queue_t *, struct request *, struct bio *, gfp_t);
|
||||
extern void elv_put_request(request_queue_t *, struct request *);
|
||||
|
||||
/*
|
||||
|
|
@ -142,4 +140,6 @@ enum {
|
|||
ELV_MQUEUE_MUST,
|
||||
};
|
||||
|
||||
#define rq_end_sector(rq) ((rq)->sector + (rq)->nr_sectors)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -320,7 +320,7 @@ struct address_space_operations {
|
|||
/* Unfortunately this kludge is needed for FIBMAP. Don't use it */
|
||||
sector_t (*bmap)(struct address_space *, sector_t);
|
||||
int (*invalidatepage) (struct page *, unsigned long);
|
||||
int (*releasepage) (struct page *, int);
|
||||
int (*releasepage) (struct page *, gfp_t);
|
||||
ssize_t (*direct_IO)(int, struct kiocb *, const struct iovec *iov,
|
||||
loff_t offset, unsigned long nr_segs);
|
||||
struct page* (*get_xip_page)(struct address_space *, sector_t,
|
||||
|
|
|
|||
|
|
@ -119,7 +119,7 @@ struct gendisk {
|
|||
int policy;
|
||||
|
||||
atomic_t sync_io; /* RAID */
|
||||
unsigned long stamp, stamp_idle;
|
||||
unsigned long stamp;
|
||||
int in_flight;
|
||||
#ifdef CONFIG_SMP
|
||||
struct disk_stats *dkstats;
|
||||
|
|
|
|||
|
|
@ -12,8 +12,8 @@ struct vm_area_struct;
|
|||
* GFP bitmasks..
|
||||
*/
|
||||
/* Zone modifiers in GFP_ZONEMASK (see linux/mmzone.h - low two bits) */
|
||||
#define __GFP_DMA 0x01u
|
||||
#define __GFP_HIGHMEM 0x02u
|
||||
#define __GFP_DMA ((__force gfp_t)0x01u)
|
||||
#define __GFP_HIGHMEM ((__force gfp_t)0x02u)
|
||||
|
||||
/*
|
||||
* Action modifiers - doesn't change the zoning
|
||||
|
|
@ -26,24 +26,24 @@ struct vm_area_struct;
|
|||
*
|
||||
* __GFP_NORETRY: The VM implementation must not retry indefinitely.
|
||||
*/
|
||||
#define __GFP_WAIT 0x10u /* Can wait and reschedule? */
|
||||
#define __GFP_HIGH 0x20u /* Should access emergency pools? */
|
||||
#define __GFP_IO 0x40u /* Can start physical IO? */
|
||||
#define __GFP_FS 0x80u /* Can call down to low-level FS? */
|
||||
#define __GFP_COLD 0x100u /* Cache-cold page required */
|
||||
#define __GFP_NOWARN 0x200u /* Suppress page allocation failure warning */
|
||||
#define __GFP_REPEAT 0x400u /* Retry the allocation. Might fail */
|
||||
#define __GFP_NOFAIL 0x800u /* Retry for ever. Cannot fail */
|
||||
#define __GFP_NORETRY 0x1000u /* Do not retry. Might fail */
|
||||
#define __GFP_NO_GROW 0x2000u /* Slab internal usage */
|
||||
#define __GFP_COMP 0x4000u /* Add compound page metadata */
|
||||
#define __GFP_ZERO 0x8000u /* Return zeroed page on success */
|
||||
#define __GFP_NOMEMALLOC 0x10000u /* Don't use emergency reserves */
|
||||
#define __GFP_NORECLAIM 0x20000u /* No realy zone reclaim during allocation */
|
||||
#define __GFP_HARDWALL 0x40000u /* Enforce hardwall cpuset memory allocs */
|
||||
#define __GFP_WAIT ((__force gfp_t)0x10u) /* Can wait and reschedule? */
|
||||
#define __GFP_HIGH ((__force gfp_t)0x20u) /* Should access emergency pools? */
|
||||
#define __GFP_IO ((__force gfp_t)0x40u) /* Can start physical IO? */
|
||||
#define __GFP_FS ((__force gfp_t)0x80u) /* Can call down to low-level FS? */
|
||||
#define __GFP_COLD ((__force gfp_t)0x100u) /* Cache-cold page required */
|
||||
#define __GFP_NOWARN ((__force gfp_t)0x200u) /* Suppress page allocation failure warning */
|
||||
#define __GFP_REPEAT ((__force gfp_t)0x400u) /* Retry the allocation. Might fail */
|
||||
#define __GFP_NOFAIL ((__force gfp_t)0x800u) /* Retry for ever. Cannot fail */
|
||||
#define __GFP_NORETRY ((__force gfp_t)0x1000u)/* Do not retry. Might fail */
|
||||
#define __GFP_NO_GROW ((__force gfp_t)0x2000u)/* Slab internal usage */
|
||||
#define __GFP_COMP ((__force gfp_t)0x4000u)/* Add compound page metadata */
|
||||
#define __GFP_ZERO ((__force gfp_t)0x8000u)/* Return zeroed page on success */
|
||||
#define __GFP_NOMEMALLOC ((__force gfp_t)0x10000u) /* Don't use emergency reserves */
|
||||
#define __GFP_NORECLAIM ((__force gfp_t)0x20000u) /* No realy zone reclaim during allocation */
|
||||
#define __GFP_HARDWALL ((__force gfp_t)0x40000u) /* Enforce hardwall cpuset memory allocs */
|
||||
|
||||
#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */
|
||||
#define __GFP_BITS_MASK ((1 << __GFP_BITS_SHIFT) - 1)
|
||||
#define __GFP_BITS_MASK ((__force gfp_t)((1 << __GFP_BITS_SHIFT) - 1))
|
||||
|
||||
/* if you forget to add the bitmask here kernel will crash, period */
|
||||
#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \
|
||||
|
|
@ -64,6 +64,7 @@ struct vm_area_struct;
|
|||
|
||||
#define GFP_DMA __GFP_DMA
|
||||
|
||||
#define gfp_zone(mask) ((__force int)((mask) & (__force gfp_t)GFP_ZONEMASK))
|
||||
|
||||
/*
|
||||
* There is only one page-allocator function, and two main namespaces to
|
||||
|
|
@ -94,7 +95,7 @@ static inline struct page *alloc_pages_node(int nid, gfp_t gfp_mask,
|
|||
return NULL;
|
||||
|
||||
return __alloc_pages(gfp_mask, order,
|
||||
NODE_DATA(nid)->node_zonelists + (gfp_mask & GFP_ZONEMASK));
|
||||
NODE_DATA(nid)->node_zonelists + gfp_zone(gfp_mask));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
|
|
|
|||
|
|
@ -490,7 +490,7 @@ static inline int i2o_dma_map_sg(struct i2o_controller *c,
|
|||
* Returns 0 on success or -ENOMEM on failure.
|
||||
*/
|
||||
static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr,
|
||||
size_t len, unsigned int gfp_mask)
|
||||
size_t len, gfp_t gfp_mask)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(dev);
|
||||
int dma_64 = 0;
|
||||
|
|
@ -549,7 +549,7 @@ static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
|
|||
* Returns the 0 on success or negative error code on failure.
|
||||
*/
|
||||
static inline int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr,
|
||||
size_t len, unsigned int gfp_mask)
|
||||
size_t len, gfp_t gfp_mask)
|
||||
{
|
||||
i2o_dma_free(dev, addr);
|
||||
|
||||
|
|
|
|||
|
|
@ -7,8 +7,8 @@
|
|||
/* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */
|
||||
|
||||
#define TR_RETRY_INTERVAL (30*HZ) /* 500 on PC = 5 s */
|
||||
#define TR_RST_TIME (HZ/20) /* 5 on PC = 50 ms */
|
||||
#define TR_BUSY_INTERVAL (HZ/5) /* 5 on PC = 200 ms */
|
||||
#define TR_RST_TIME (msecs_to_jiffies(50)) /* 5 on PC = 50 ms */
|
||||
#define TR_BUSY_INTERVAL (msecs_to_jiffies(200)) /* 5 on PC = 200 ms */
|
||||
#define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */
|
||||
|
||||
#define TR_ISA 1
|
||||
|
|
|
|||
|
|
@ -71,7 +71,7 @@ struct idr {
|
|||
*/
|
||||
|
||||
void *idr_find(struct idr *idp, int id);
|
||||
int idr_pre_get(struct idr *idp, unsigned gfp_mask);
|
||||
int idr_pre_get(struct idr *idp, gfp_t gfp_mask);
|
||||
int idr_get_new(struct idr *idp, void *ptr, int *id);
|
||||
int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id);
|
||||
void idr_remove(struct idr *idp, int id);
|
||||
|
|
|
|||
|
|
@ -84,6 +84,7 @@
|
|||
#define ARPHRD_IEEE802_TR 800 /* Magic type ident for TR */
|
||||
#define ARPHRD_IEEE80211 801 /* IEEE 802.11 */
|
||||
#define ARPHRD_IEEE80211_PRISM 802 /* IEEE 802.11 + Prism2 header */
|
||||
#define ARPHRD_IEEE80211_RADIOTAP 803 /* IEEE 802.11 + radiotap header */
|
||||
|
||||
#define ARPHRD_VOID 0xFFFF /* Void type, nothing is known */
|
||||
#define ARPHRD_NONE 0xFFFE /* zero header length */
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@ extern int journal_enable_debug;
|
|||
#define jbd_debug(f, a...) /**/
|
||||
#endif
|
||||
|
||||
extern void * __jbd_kmalloc (const char *where, size_t size, int flags, int retry);
|
||||
extern void * __jbd_kmalloc (const char *where, size_t size, gfp_t flags, int retry);
|
||||
#define jbd_kmalloc(size, flags) \
|
||||
__jbd_kmalloc(__FUNCTION__, (size), (flags), journal_oom_retry)
|
||||
#define jbd_rep_kmalloc(size, flags) \
|
||||
|
|
@ -890,7 +890,7 @@ extern int journal_forget (handle_t *, struct buffer_head *);
|
|||
extern void journal_sync_buffer (struct buffer_head *);
|
||||
extern int journal_invalidatepage(journal_t *,
|
||||
struct page *, unsigned long);
|
||||
extern int journal_try_to_free_buffers(journal_t *, struct page *, int);
|
||||
extern int journal_try_to_free_buffers(journal_t *, struct page *, gfp_t);
|
||||
extern int journal_stop(handle_t *);
|
||||
extern int journal_flush (journal_t *);
|
||||
extern void journal_lock_updates (journal_t *);
|
||||
|
|
|
|||
|
|
@ -65,7 +65,7 @@ extern void kobject_unregister(struct kobject *);
|
|||
extern struct kobject * kobject_get(struct kobject *);
|
||||
extern void kobject_put(struct kobject *);
|
||||
|
||||
extern char * kobject_get_path(struct kobject *, int);
|
||||
extern char * kobject_get_path(struct kobject *, gfp_t);
|
||||
|
||||
struct kobj_type {
|
||||
void (*release)(struct kobject *);
|
||||
|
|
|
|||
|
|
@ -91,12 +91,13 @@ enum {
|
|||
ATA_SHT_EMULATED = 1,
|
||||
ATA_SHT_CMD_PER_LUN = 1,
|
||||
ATA_SHT_THIS_ID = -1,
|
||||
ATA_SHT_USE_CLUSTERING = 0,
|
||||
ATA_SHT_USE_CLUSTERING = 1,
|
||||
|
||||
/* struct ata_device stuff */
|
||||
ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
|
||||
ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
|
||||
ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */
|
||||
ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */
|
||||
|
||||
ATA_DEV_UNKNOWN = 0, /* unknown device */
|
||||
ATA_DEV_ATA = 1, /* ATA device */
|
||||
|
|
@ -154,17 +155,21 @@ enum {
|
|||
ATA_SHIFT_UDMA = 0,
|
||||
ATA_SHIFT_MWDMA = 8,
|
||||
ATA_SHIFT_PIO = 11,
|
||||
|
||||
/* Masks for port functions */
|
||||
ATA_PORT_PRIMARY = (1 << 0),
|
||||
ATA_PORT_SECONDARY = (1 << 1),
|
||||
};
|
||||
|
||||
enum pio_task_states {
|
||||
PIO_ST_UNKNOWN,
|
||||
PIO_ST_IDLE,
|
||||
PIO_ST_POLL,
|
||||
PIO_ST_TMOUT,
|
||||
PIO_ST,
|
||||
PIO_ST_LAST,
|
||||
PIO_ST_LAST_POLL,
|
||||
PIO_ST_ERR,
|
||||
enum hsm_task_states {
|
||||
HSM_ST_UNKNOWN,
|
||||
HSM_ST_IDLE,
|
||||
HSM_ST_POLL,
|
||||
HSM_ST_TMOUT,
|
||||
HSM_ST,
|
||||
HSM_ST_LAST,
|
||||
HSM_ST_LAST_POLL,
|
||||
HSM_ST_ERR,
|
||||
};
|
||||
|
||||
/* forward declarations */
|
||||
|
|
@ -197,7 +202,7 @@ struct ata_ioports {
|
|||
struct ata_probe_ent {
|
||||
struct list_head node;
|
||||
struct device *dev;
|
||||
struct ata_port_operations *port_ops;
|
||||
const struct ata_port_operations *port_ops;
|
||||
Scsi_Host_Template *sht;
|
||||
struct ata_ioports port[ATA_MAX_PORTS];
|
||||
unsigned int n_ports;
|
||||
|
|
@ -220,7 +225,7 @@ struct ata_host_set {
|
|||
void __iomem *mmio_base;
|
||||
unsigned int n_ports;
|
||||
void *private_data;
|
||||
struct ata_port_operations *ops;
|
||||
const struct ata_port_operations *ops;
|
||||
struct ata_port * ports[0];
|
||||
};
|
||||
|
||||
|
|
@ -278,15 +283,18 @@ struct ata_device {
|
|||
u8 xfer_mode;
|
||||
unsigned int xfer_shift; /* ATA_SHIFT_xxx */
|
||||
|
||||
/* cache info about current transfer mode */
|
||||
u8 xfer_protocol; /* taskfile xfer protocol */
|
||||
u8 read_cmd; /* opcode to use on read */
|
||||
u8 write_cmd; /* opcode to use on write */
|
||||
unsigned int multi_count; /* sectors count for
|
||||
READ/WRITE MULTIPLE */
|
||||
|
||||
/* for CHS addressing */
|
||||
u16 cylinders; /* Number of cylinders */
|
||||
u16 heads; /* Number of heads */
|
||||
u16 sectors; /* Number of sectors per track */
|
||||
};
|
||||
|
||||
struct ata_port {
|
||||
struct Scsi_Host *host; /* our co-allocated scsi host */
|
||||
struct ata_port_operations *ops;
|
||||
const struct ata_port_operations *ops;
|
||||
unsigned long flags; /* ATA_FLAG_xxx */
|
||||
unsigned int id; /* unique id req'd by scsi midlyr */
|
||||
unsigned int port_no; /* unique port #; from zero */
|
||||
|
|
@ -319,7 +327,7 @@ struct ata_port {
|
|||
struct work_struct packet_task;
|
||||
|
||||
struct work_struct pio_task;
|
||||
unsigned int pio_task_state;
|
||||
unsigned int hsm_task_state;
|
||||
unsigned long pio_task_timeout;
|
||||
|
||||
void *private_data;
|
||||
|
|
@ -333,10 +341,10 @@ struct ata_port_operations {
|
|||
void (*set_piomode) (struct ata_port *, struct ata_device *);
|
||||
void (*set_dmamode) (struct ata_port *, struct ata_device *);
|
||||
|
||||
void (*tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
|
||||
void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
|
||||
void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
|
||||
|
||||
void (*exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
|
||||
void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
|
||||
u8 (*check_status)(struct ata_port *ap);
|
||||
u8 (*check_altstatus)(struct ata_port *ap);
|
||||
u8 (*check_err)(struct ata_port *ap);
|
||||
|
|
@ -377,9 +385,22 @@ struct ata_port_info {
|
|||
unsigned long pio_mask;
|
||||
unsigned long mwdma_mask;
|
||||
unsigned long udma_mask;
|
||||
struct ata_port_operations *port_ops;
|
||||
const struct ata_port_operations *port_ops;
|
||||
};
|
||||
|
||||
struct ata_timing {
|
||||
unsigned short mode; /* ATA mode */
|
||||
unsigned short setup; /* t1 */
|
||||
unsigned short act8b; /* t2 for 8-bit I/O */
|
||||
unsigned short rec8b; /* t2i for 8-bit I/O */
|
||||
unsigned short cyc8b; /* t0 for 8-bit I/O */
|
||||
unsigned short active; /* t2 or tD */
|
||||
unsigned short recover; /* t2i or tK */
|
||||
unsigned short cycle; /* t0 */
|
||||
unsigned short udma; /* t2CYCTYP/2 */
|
||||
};
|
||||
|
||||
#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
|
||||
|
||||
extern void ata_port_probe(struct ata_port *);
|
||||
extern void __sata_phy_reset(struct ata_port *ap);
|
||||
|
|
@ -392,7 +413,7 @@ extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_i
|
|||
unsigned int n_ports);
|
||||
extern void ata_pci_remove_one (struct pci_dev *pdev);
|
||||
#endif /* CONFIG_PCI */
|
||||
extern int ata_device_add(struct ata_probe_ent *ent);
|
||||
extern int ata_device_add(const struct ata_probe_ent *ent);
|
||||
extern void ata_host_set_remove(struct ata_host_set *host_set);
|
||||
extern int ata_scsi_detect(Scsi_Host_Template *sht);
|
||||
extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
|
||||
|
|
@ -400,19 +421,21 @@ extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmn
|
|||
extern int ata_scsi_error(struct Scsi_Host *host);
|
||||
extern int ata_scsi_release(struct Scsi_Host *host);
|
||||
extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
|
||||
extern int ata_ratelimit(void);
|
||||
|
||||
/*
|
||||
* Default driver ops implementations
|
||||
*/
|
||||
extern void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf);
|
||||
extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
|
||||
extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
|
||||
extern void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp);
|
||||
extern void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf);
|
||||
extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
|
||||
extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
|
||||
extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
|
||||
extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
|
||||
extern u8 ata_check_status(struct ata_port *ap);
|
||||
extern u8 ata_altstatus(struct ata_port *ap);
|
||||
extern u8 ata_chk_err(struct ata_port *ap);
|
||||
extern void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf);
|
||||
extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
|
||||
extern int ata_port_start (struct ata_port *ap);
|
||||
extern void ata_port_stop (struct ata_port *ap);
|
||||
extern void ata_host_stop (struct ata_host_set *host_set);
|
||||
|
|
@ -423,8 +446,8 @@ extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
|
|||
unsigned int buflen);
|
||||
extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
|
||||
unsigned int n_elem);
|
||||
extern unsigned int ata_dev_classify(struct ata_taskfile *tf);
|
||||
extern void ata_dev_id_string(u16 *id, unsigned char *s,
|
||||
extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
|
||||
extern void ata_dev_id_string(const u16 *id, unsigned char *s,
|
||||
unsigned int ofs, unsigned int len);
|
||||
extern void ata_dev_config(struct ata_port *ap, unsigned int i);
|
||||
extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
|
||||
|
|
@ -441,6 +464,32 @@ extern int ata_std_bios_param(struct scsi_device *sdev,
|
|||
sector_t capacity, int geom[]);
|
||||
extern int ata_scsi_slave_config(struct scsi_device *sdev);
|
||||
|
||||
/*
|
||||
* Timing helpers
|
||||
*/
|
||||
extern int ata_timing_compute(struct ata_device *, unsigned short,
|
||||
struct ata_timing *, int, int);
|
||||
extern void ata_timing_merge(const struct ata_timing *,
|
||||
const struct ata_timing *, struct ata_timing *,
|
||||
unsigned int);
|
||||
|
||||
enum {
|
||||
ATA_TIMING_SETUP = (1 << 0),
|
||||
ATA_TIMING_ACT8B = (1 << 1),
|
||||
ATA_TIMING_REC8B = (1 << 2),
|
||||
ATA_TIMING_CYC8B = (1 << 3),
|
||||
ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
|
||||
ATA_TIMING_CYC8B,
|
||||
ATA_TIMING_ACTIVE = (1 << 4),
|
||||
ATA_TIMING_RECOVER = (1 << 5),
|
||||
ATA_TIMING_CYCLE = (1 << 6),
|
||||
ATA_TIMING_UDMA = (1 << 7),
|
||||
ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
|
||||
ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
|
||||
ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
|
||||
ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
struct pci_bits {
|
||||
|
|
@ -452,8 +501,8 @@ struct pci_bits {
|
|||
|
||||
extern void ata_pci_host_stop (struct ata_host_set *host_set);
|
||||
extern struct ata_probe_ent *
|
||||
ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port);
|
||||
extern int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits);
|
||||
ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
|
||||
extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
|
||||
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
|
|
@ -463,7 +512,7 @@ static inline unsigned int ata_tag_valid(unsigned int tag)
|
|||
return (tag < ATA_MAX_QUEUE) ? 1 : 0;
|
||||
}
|
||||
|
||||
static inline unsigned int ata_dev_present(struct ata_device *dev)
|
||||
static inline unsigned int ata_dev_present(const struct ata_device *dev)
|
||||
{
|
||||
return ((dev->class == ATA_DEV_ATA) ||
|
||||
(dev->class == ATA_DEV_ATAPI));
|
||||
|
|
@ -662,7 +711,7 @@ static inline unsigned int sata_dev_present(struct ata_port *ap)
|
|||
return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
|
||||
}
|
||||
|
||||
static inline int ata_try_flush_cache(struct ata_device *dev)
|
||||
static inline int ata_try_flush_cache(const struct ata_device *dev)
|
||||
{
|
||||
return ata_id_wcache_enabled(dev->id) ||
|
||||
ata_id_has_flush(dev->id) ||
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ struct loop_device {
|
|||
unsigned lo_blocksize;
|
||||
void *key_data;
|
||||
|
||||
int old_gfp_mask;
|
||||
gfp_t old_gfp_mask;
|
||||
|
||||
spinlock_t lo_lock;
|
||||
struct bio *lo_bio;
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@ struct mb_cache_entry {
|
|||
};
|
||||
|
||||
struct mb_cache_op {
|
||||
int (*free)(struct mb_cache_entry *, int);
|
||||
int (*free)(struct mb_cache_entry *, gfp_t);
|
||||
};
|
||||
|
||||
/* Functions on caches */
|
||||
|
|
|
|||
|
|
@ -158,6 +158,7 @@ extern int mii_link_ok (struct mii_if_info *mii);
|
|||
extern int mii_nway_restart (struct mii_if_info *mii);
|
||||
extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
|
||||
extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
|
||||
extern int mii_check_gmii_support(struct mii_if_info *mii);
|
||||
extern void mii_check_link (struct mii_if_info *mii);
|
||||
extern unsigned int mii_check_media (struct mii_if_info *mii,
|
||||
unsigned int ok_to_print,
|
||||
|
|
|
|||
|
|
@ -747,7 +747,7 @@ extern unsigned long do_mremap(unsigned long addr,
|
|||
* The callback will be passed nr_to_scan == 0 when the VM is querying the
|
||||
* cache size, so a fastpath for that case is appropriate.
|
||||
*/
|
||||
typedef int (*shrinker_t)(int nr_to_scan, unsigned int gfp_mask);
|
||||
typedef int (*shrinker_t)(int nr_to_scan, gfp_t gfp_mask);
|
||||
|
||||
/*
|
||||
* Add an aging callback. The int is the number of 'seeks' it takes
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@ struct mmc_command {
|
|||
#define MMC_ERR_INVALID 5
|
||||
|
||||
struct mmc_data *data; /* data segment associated with cmd */
|
||||
struct mmc_request *mrq; /* assoicated request */
|
||||
struct mmc_request *mrq; /* associated request */
|
||||
};
|
||||
|
||||
struct mmc_data {
|
||||
|
|
@ -68,7 +68,7 @@ struct mmc_data {
|
|||
unsigned int bytes_xfered;
|
||||
|
||||
struct mmc_command *stop; /* stop command */
|
||||
struct mmc_request *mrq; /* assoicated request */
|
||||
struct mmc_request *mrq; /* associated request */
|
||||
|
||||
unsigned int sg_len; /* size of scatter list */
|
||||
struct scatterlist *sg; /* I/O scatter list */
|
||||
|
|
|
|||
|
|
@ -302,7 +302,7 @@ void get_zone_counts(unsigned long *active, unsigned long *inactive,
|
|||
void build_all_zonelists(void);
|
||||
void wakeup_kswapd(struct zone *zone, int order);
|
||||
int zone_watermark_ok(struct zone *z, int order, unsigned long mark,
|
||||
int alloc_type, int can_try_harder, int gfp_high);
|
||||
int alloc_type, int can_try_harder, gfp_t gfp_high);
|
||||
|
||||
#ifdef CONFIG_HAVE_MEMORY_PRESENT
|
||||
void memory_present(int nid, unsigned long start, unsigned long end);
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ struct vfsmount;
|
|||
struct open_intent {
|
||||
int flags;
|
||||
int create_mode;
|
||||
struct file *file;
|
||||
};
|
||||
|
||||
enum { MAX_NESTED_LINKS = 5 };
|
||||
|
|
@ -65,6 +66,13 @@ extern int FASTCALL(link_path_walk(const char *, struct nameidata *));
|
|||
extern void path_release(struct nameidata *);
|
||||
extern void path_release_on_umount(struct nameidata *);
|
||||
|
||||
extern int __user_path_lookup_open(const char __user *, unsigned lookup_flags, struct nameidata *nd, int open_flags);
|
||||
extern int path_lookup_open(const char *, unsigned lookup_flags, struct nameidata *, int open_flags);
|
||||
extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry,
|
||||
int (*open)(struct inode *, struct file *));
|
||||
extern struct file *nameidata_to_filp(struct nameidata *nd, int flags);
|
||||
extern void release_open_intent(struct nameidata *);
|
||||
|
||||
extern struct dentry * lookup_one_len(const char *, struct dentry *, int);
|
||||
extern struct dentry * lookup_hash(struct qstr *, struct dentry *);
|
||||
|
||||
|
|
|
|||
|
|
@ -873,11 +873,9 @@ static inline void netif_rx_complete(struct net_device *dev)
|
|||
|
||||
static inline void netif_poll_disable(struct net_device *dev)
|
||||
{
|
||||
while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state)) {
|
||||
while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state))
|
||||
/* No hurry. */
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
schedule_timeout(1);
|
||||
}
|
||||
schedule_timeout_interruptible(1);
|
||||
}
|
||||
|
||||
static inline void netif_poll_enable(struct net_device *dev)
|
||||
|
|
|
|||
|
|
@ -41,6 +41,10 @@
|
|||
#define NFS_MAX_FILE_IO_BUFFER_SIZE 32768
|
||||
#define NFS_DEF_FILE_IO_BUFFER_SIZE 4096
|
||||
|
||||
/* Default timeout values */
|
||||
#define NFS_MAX_UDP_TIMEOUT (60*HZ)
|
||||
#define NFS_MAX_TCP_TIMEOUT (600*HZ)
|
||||
|
||||
/*
|
||||
* superblock magic number for NFS
|
||||
*/
|
||||
|
|
@ -137,6 +141,7 @@ struct nfs_inode {
|
|||
unsigned long attrtimeo_timestamp;
|
||||
__u64 change_attr; /* v4 only */
|
||||
|
||||
unsigned long last_updated;
|
||||
/* "Generation counter" for the attribute cache. This is
|
||||
* bumped whenever we update the metadata on the
|
||||
* server.
|
||||
|
|
@ -236,13 +241,17 @@ static inline int nfs_caches_unstable(struct inode *inode)
|
|||
return atomic_read(&NFS_I(inode)->data_updates) != 0;
|
||||
}
|
||||
|
||||
static inline void nfs_mark_for_revalidate(struct inode *inode)
|
||||
{
|
||||
spin_lock(&inode->i_lock);
|
||||
NFS_I(inode)->cache_validity |= NFS_INO_INVALID_ATTR | NFS_INO_INVALID_ACCESS;
|
||||
spin_unlock(&inode->i_lock);
|
||||
}
|
||||
|
||||
static inline void NFS_CACHEINV(struct inode *inode)
|
||||
{
|
||||
if (!nfs_caches_unstable(inode)) {
|
||||
spin_lock(&inode->i_lock);
|
||||
NFS_I(inode)->cache_validity |= NFS_INO_INVALID_ATTR | NFS_INO_INVALID_ACCESS;
|
||||
spin_unlock(&inode->i_lock);
|
||||
}
|
||||
if (!nfs_caches_unstable(inode))
|
||||
nfs_mark_for_revalidate(inode);
|
||||
}
|
||||
|
||||
static inline int nfs_server_capable(struct inode *inode, int cap)
|
||||
|
|
@ -276,7 +285,7 @@ static inline long nfs_save_change_attribute(struct inode *inode)
|
|||
static inline int nfs_verify_change_attribute(struct inode *inode, unsigned long chattr)
|
||||
{
|
||||
return !nfs_caches_unstable(inode)
|
||||
&& chattr == NFS_I(inode)->cache_change_attribute;
|
||||
&& time_after_eq(chattr, NFS_I(inode)->cache_change_attribute);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -286,6 +295,7 @@ extern void nfs_zap_caches(struct inode *);
|
|||
extern struct inode *nfs_fhget(struct super_block *, struct nfs_fh *,
|
||||
struct nfs_fattr *);
|
||||
extern int nfs_refresh_inode(struct inode *, struct nfs_fattr *);
|
||||
extern int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr);
|
||||
extern int nfs_getattr(struct vfsmount *, struct dentry *, struct kstat *);
|
||||
extern int nfs_permission(struct inode *, int, struct nameidata *);
|
||||
extern int nfs_access_get_cached(struct inode *, struct rpc_cred *, struct nfs_access_entry *);
|
||||
|
|
@ -312,6 +322,12 @@ extern void nfs_file_clear_open_context(struct file *filp);
|
|||
/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */
|
||||
extern u32 root_nfs_parse_addr(char *name); /*__init*/
|
||||
|
||||
static inline void nfs_fattr_init(struct nfs_fattr *fattr)
|
||||
{
|
||||
fattr->valid = 0;
|
||||
fattr->time_start = jiffies;
|
||||
}
|
||||
|
||||
/*
|
||||
* linux/fs/nfs/file.c
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ struct nfs_fattr {
|
|||
__u32 bitmap[2]; /* NFSv4 returned attribute bitmap */
|
||||
__u64 change_attr; /* NFSv4 change attribute */
|
||||
__u64 pre_change_attr;/* pre-op NFSv4 change attribute */
|
||||
unsigned long timestamp;
|
||||
unsigned long time_start;
|
||||
};
|
||||
|
||||
#define NFS_ATTR_WCC 0x0001 /* pre-op WCC data */
|
||||
|
|
@ -96,12 +96,13 @@ struct nfs4_change_info {
|
|||
u64 after;
|
||||
};
|
||||
|
||||
struct nfs_seqid;
|
||||
/*
|
||||
* Arguments to the open call.
|
||||
*/
|
||||
struct nfs_openargs {
|
||||
const struct nfs_fh * fh;
|
||||
__u32 seqid;
|
||||
struct nfs_seqid * seqid;
|
||||
int open_flags;
|
||||
__u64 clientid;
|
||||
__u32 id;
|
||||
|
|
@ -123,6 +124,7 @@ struct nfs_openres {
|
|||
struct nfs4_change_info cinfo;
|
||||
__u32 rflags;
|
||||
struct nfs_fattr * f_attr;
|
||||
struct nfs_fattr * dir_attr;
|
||||
const struct nfs_server *server;
|
||||
int delegation_type;
|
||||
nfs4_stateid delegation;
|
||||
|
|
@ -136,7 +138,7 @@ struct nfs_openres {
|
|||
struct nfs_open_confirmargs {
|
||||
const struct nfs_fh * fh;
|
||||
nfs4_stateid stateid;
|
||||
__u32 seqid;
|
||||
struct nfs_seqid * seqid;
|
||||
};
|
||||
|
||||
struct nfs_open_confirmres {
|
||||
|
|
@ -148,13 +150,16 @@ struct nfs_open_confirmres {
|
|||
*/
|
||||
struct nfs_closeargs {
|
||||
struct nfs_fh * fh;
|
||||
nfs4_stateid stateid;
|
||||
__u32 seqid;
|
||||
nfs4_stateid * stateid;
|
||||
struct nfs_seqid * seqid;
|
||||
int open_flags;
|
||||
const u32 * bitmask;
|
||||
};
|
||||
|
||||
struct nfs_closeres {
|
||||
nfs4_stateid stateid;
|
||||
struct nfs_fattr * fattr;
|
||||
const struct nfs_server *server;
|
||||
};
|
||||
/*
|
||||
* * Arguments to the lock,lockt, and locku call.
|
||||
|
|
@ -164,30 +169,19 @@ struct nfs_lowner {
|
|||
u32 id;
|
||||
};
|
||||
|
||||
struct nfs_open_to_lock {
|
||||
__u32 open_seqid;
|
||||
nfs4_stateid open_stateid;
|
||||
__u32 lock_seqid;
|
||||
struct nfs_lowner lock_owner;
|
||||
};
|
||||
|
||||
struct nfs_exist_lock {
|
||||
nfs4_stateid stateid;
|
||||
__u32 seqid;
|
||||
};
|
||||
|
||||
struct nfs_lock_opargs {
|
||||
struct nfs_seqid * lock_seqid;
|
||||
nfs4_stateid * lock_stateid;
|
||||
struct nfs_seqid * open_seqid;
|
||||
nfs4_stateid * open_stateid;
|
||||
struct nfs_lowner lock_owner;
|
||||
__u32 reclaim;
|
||||
__u32 new_lock_owner;
|
||||
union {
|
||||
struct nfs_open_to_lock *open_lock;
|
||||
struct nfs_exist_lock *exist_lock;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct nfs_locku_opargs {
|
||||
__u32 seqid;
|
||||
nfs4_stateid stateid;
|
||||
struct nfs_seqid * seqid;
|
||||
nfs4_stateid * stateid;
|
||||
};
|
||||
|
||||
struct nfs_lockargs {
|
||||
|
|
@ -262,6 +256,7 @@ struct nfs_writeargs {
|
|||
enum nfs3_stable_how stable;
|
||||
unsigned int pgbase;
|
||||
struct page ** pages;
|
||||
const u32 * bitmask;
|
||||
};
|
||||
|
||||
struct nfs_writeverf {
|
||||
|
|
@ -273,6 +268,7 @@ struct nfs_writeres {
|
|||
struct nfs_fattr * fattr;
|
||||
struct nfs_writeverf * verf;
|
||||
__u32 count;
|
||||
const struct nfs_server *server;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -550,6 +546,7 @@ struct nfs4_create_res {
|
|||
struct nfs_fh * fh;
|
||||
struct nfs_fattr * fattr;
|
||||
struct nfs4_change_info dir_cinfo;
|
||||
struct nfs_fattr * dir_fattr;
|
||||
};
|
||||
|
||||
struct nfs4_fsinfo_arg {
|
||||
|
|
@ -571,8 +568,17 @@ struct nfs4_link_arg {
|
|||
const struct nfs_fh * fh;
|
||||
const struct nfs_fh * dir_fh;
|
||||
const struct qstr * name;
|
||||
const u32 * bitmask;
|
||||
};
|
||||
|
||||
struct nfs4_link_res {
|
||||
const struct nfs_server * server;
|
||||
struct nfs_fattr * fattr;
|
||||
struct nfs4_change_info cinfo;
|
||||
struct nfs_fattr * dir_attr;
|
||||
};
|
||||
|
||||
|
||||
struct nfs4_lookup_arg {
|
||||
const struct nfs_fh * dir_fh;
|
||||
const struct qstr * name;
|
||||
|
|
@ -619,6 +625,13 @@ struct nfs4_readlink {
|
|||
struct nfs4_remove_arg {
|
||||
const struct nfs_fh * fh;
|
||||
const struct qstr * name;
|
||||
const u32 * bitmask;
|
||||
};
|
||||
|
||||
struct nfs4_remove_res {
|
||||
const struct nfs_server * server;
|
||||
struct nfs4_change_info cinfo;
|
||||
struct nfs_fattr * dir_attr;
|
||||
};
|
||||
|
||||
struct nfs4_rename_arg {
|
||||
|
|
@ -626,11 +639,15 @@ struct nfs4_rename_arg {
|
|||
const struct nfs_fh * new_dir;
|
||||
const struct qstr * old_name;
|
||||
const struct qstr * new_name;
|
||||
const u32 * bitmask;
|
||||
};
|
||||
|
||||
struct nfs4_rename_res {
|
||||
const struct nfs_server * server;
|
||||
struct nfs4_change_info old_cinfo;
|
||||
struct nfs_fattr * old_fattr;
|
||||
struct nfs4_change_info new_cinfo;
|
||||
struct nfs_fattr * new_fattr;
|
||||
};
|
||||
|
||||
struct nfs4_setclientid {
|
||||
|
|
@ -722,7 +739,7 @@ struct nfs_rpc_ops {
|
|||
int (*write) (struct nfs_write_data *);
|
||||
int (*commit) (struct nfs_write_data *);
|
||||
int (*create) (struct inode *, struct dentry *,
|
||||
struct iattr *, int);
|
||||
struct iattr *, int, struct nameidata *);
|
||||
int (*remove) (struct inode *, struct qstr *);
|
||||
int (*unlink_setup) (struct rpc_message *,
|
||||
struct dentry *, struct qstr *);
|
||||
|
|
|
|||
|
|
@ -21,16 +21,17 @@
|
|||
|
||||
static inline gfp_t mapping_gfp_mask(struct address_space * mapping)
|
||||
{
|
||||
return mapping->flags & __GFP_BITS_MASK;
|
||||
return (__force gfp_t)mapping->flags & __GFP_BITS_MASK;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is non-atomic. Only to be used before the mapping is activated.
|
||||
* Probably needs a barrier...
|
||||
*/
|
||||
static inline void mapping_set_gfp_mask(struct address_space *m, int mask)
|
||||
static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask)
|
||||
{
|
||||
m->flags = (m->flags & ~__GFP_BITS_MASK) | mask;
|
||||
m->flags = (m->flags & ~(__force unsigned long)__GFP_BITS_MASK) |
|
||||
(__force unsigned long)mask;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -69,7 +70,7 @@ extern struct page * find_lock_page(struct address_space *mapping,
|
|||
extern struct page * find_trylock_page(struct address_space *mapping,
|
||||
unsigned long index);
|
||||
extern struct page * find_or_create_page(struct address_space *mapping,
|
||||
unsigned long index, unsigned int gfp_mask);
|
||||
unsigned long index, gfp_t gfp_mask);
|
||||
unsigned find_get_pages(struct address_space *mapping, pgoff_t start,
|
||||
unsigned int nr_pages, struct page **pages);
|
||||
unsigned find_get_pages_tag(struct address_space *mapping, pgoff_t *index,
|
||||
|
|
@ -92,9 +93,9 @@ extern int read_cache_pages(struct address_space *mapping,
|
|||
struct list_head *pages, filler_t *filler, void *data);
|
||||
|
||||
int add_to_page_cache(struct page *page, struct address_space *mapping,
|
||||
unsigned long index, int gfp_mask);
|
||||
unsigned long index, gfp_t gfp_mask);
|
||||
int add_to_page_cache_lru(struct page *page, struct address_space *mapping,
|
||||
unsigned long index, int gfp_mask);
|
||||
unsigned long index, gfp_t gfp_mask);
|
||||
extern void remove_from_page_cache(struct page *page);
|
||||
extern void __remove_from_page_cache(struct page *page);
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
struct radix_tree_root {
|
||||
unsigned int height;
|
||||
unsigned int gfp_mask;
|
||||
gfp_t gfp_mask;
|
||||
struct radix_tree_node *rnode;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1972,7 +1972,7 @@ extern struct address_space_operations reiserfs_address_space_operations;
|
|||
|
||||
/* fix_nodes.c */
|
||||
#ifdef CONFIG_REISERFS_CHECK
|
||||
void *reiserfs_kmalloc(size_t size, int flags, struct super_block *s);
|
||||
void *reiserfs_kmalloc(size_t size, gfp_t flags, struct super_block *s);
|
||||
void reiserfs_kfree(const void *vp, size_t size, struct super_block *s);
|
||||
#else
|
||||
static inline void *reiserfs_kmalloc(size_t size, int flags,
|
||||
|
|
|
|||
|
|
@ -52,12 +52,8 @@ typedef struct sdlahw
|
|||
|
||||
extern int sdla_setup (sdlahw_t* hw, void* sfm, unsigned len);
|
||||
extern int sdla_down (sdlahw_t* hw);
|
||||
extern int sdla_inten (sdlahw_t* hw);
|
||||
extern int sdla_intde (sdlahw_t* hw);
|
||||
extern int sdla_intack (sdlahw_t* hw);
|
||||
extern void S514_intack (sdlahw_t* hw, u32 int_status);
|
||||
extern void read_S514_int_stat (sdlahw_t* hw, u32* int_status);
|
||||
extern int sdla_intr (sdlahw_t* hw);
|
||||
extern int sdla_mapmem (sdlahw_t* hw, unsigned long addr);
|
||||
extern int sdla_peek (sdlahw_t* hw, unsigned long addr, void* buf,
|
||||
unsigned len);
|
||||
|
|
|
|||
|
|
@ -1210,7 +1210,7 @@ struct security_operations {
|
|||
int (*socket_shutdown) (struct socket * sock, int how);
|
||||
int (*socket_sock_rcv_skb) (struct sock * sk, struct sk_buff * skb);
|
||||
int (*socket_getpeersec) (struct socket *sock, char __user *optval, int __user *optlen, unsigned len);
|
||||
int (*sk_alloc_security) (struct sock *sk, int family, int priority);
|
||||
int (*sk_alloc_security) (struct sock *sk, int family, gfp_t priority);
|
||||
void (*sk_free_security) (struct sock *sk);
|
||||
#endif /* CONFIG_SECURITY_NETWORK */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -171,7 +171,6 @@ enum {
|
|||
* struct sk_buff - socket buffer
|
||||
* @next: Next buffer in list
|
||||
* @prev: Previous buffer in list
|
||||
* @list: List we are on
|
||||
* @sk: Socket we are owned by
|
||||
* @tstamp: Time we arrived
|
||||
* @dev: Device we arrived on/are leaving by
|
||||
|
|
@ -190,6 +189,7 @@ enum {
|
|||
* @cloned: Head may be cloned (check refcnt to be sure)
|
||||
* @nohdr: Payload reference only, must not modify header
|
||||
* @pkt_type: Packet class
|
||||
* @fclone: skbuff clone status
|
||||
* @ip_summed: Driver fed us an IP checksum
|
||||
* @priority: Packet queueing priority
|
||||
* @users: User count - see {datagram,tcp}.c
|
||||
|
|
@ -202,6 +202,7 @@ enum {
|
|||
* @destructor: Destruct function
|
||||
* @nfmark: Can be used for communication between hooks
|
||||
* @nfct: Associated connection, if any
|
||||
* @ipvs_property: skbuff is owned by ipvs
|
||||
* @nfctinfo: Relationship of this skb to the connection
|
||||
* @nf_bridge: Saved data about a bridged frame - see br_netfilter.c
|
||||
* @tc_index: Traffic control index
|
||||
|
|
|
|||
|
|
@ -121,7 +121,7 @@ extern unsigned int ksize(const void *);
|
|||
extern void *kmem_cache_alloc_node(kmem_cache_t *, gfp_t flags, int node);
|
||||
extern void *kmalloc_node(size_t size, gfp_t flags, int node);
|
||||
#else
|
||||
static inline void *kmem_cache_alloc_node(kmem_cache_t *cachep, int flags, int node)
|
||||
static inline void *kmem_cache_alloc_node(kmem_cache_t *cachep, gfp_t flags, int node)
|
||||
{
|
||||
return kmem_cache_alloc(cachep, flags);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -66,7 +66,12 @@ struct rpc_cred_cache {
|
|||
|
||||
struct rpc_auth {
|
||||
unsigned int au_cslack; /* call cred size estimate */
|
||||
unsigned int au_rslack; /* reply verf size guess */
|
||||
/* guess at number of u32's auth adds before
|
||||
* reply data; normally the verifier size: */
|
||||
unsigned int au_rslack;
|
||||
/* for gss, used to calculate au_rslack: */
|
||||
unsigned int au_verfsize;
|
||||
|
||||
unsigned int au_flags; /* various flags */
|
||||
struct rpc_authops * au_ops; /* operations */
|
||||
rpc_authflavor_t au_flavor; /* pseudoflavor (note may
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@
|
|||
#define RPCDBG_AUTH 0x0010
|
||||
#define RPCDBG_PMAP 0x0020
|
||||
#define RPCDBG_SCHED 0x0040
|
||||
#define RPCDBG_TRANS 0x0080
|
||||
#define RPCDBG_SVCSOCK 0x0100
|
||||
#define RPCDBG_SVCDSP 0x0200
|
||||
#define RPCDBG_MISC 0x0400
|
||||
|
|
@ -94,6 +95,8 @@ enum {
|
|||
CTL_NLMDEBUG,
|
||||
CTL_SLOTTABLE_UDP,
|
||||
CTL_SLOTTABLE_TCP,
|
||||
CTL_MIN_RESVPORT,
|
||||
CTL_MAX_RESVPORT,
|
||||
};
|
||||
|
||||
#endif /* _LINUX_SUNRPC_DEBUG_H_ */
|
||||
|
|
|
|||
|
|
@ -40,14 +40,21 @@ int gss_import_sec_context(
|
|||
struct gss_ctx **ctx_id);
|
||||
u32 gss_get_mic(
|
||||
struct gss_ctx *ctx_id,
|
||||
u32 qop,
|
||||
struct xdr_buf *message,
|
||||
struct xdr_netobj *mic_token);
|
||||
u32 gss_verify_mic(
|
||||
struct gss_ctx *ctx_id,
|
||||
struct xdr_buf *message,
|
||||
struct xdr_netobj *mic_token,
|
||||
u32 *qstate);
|
||||
struct xdr_netobj *mic_token);
|
||||
u32 gss_wrap(
|
||||
struct gss_ctx *ctx_id,
|
||||
int offset,
|
||||
struct xdr_buf *outbuf,
|
||||
struct page **inpages);
|
||||
u32 gss_unwrap(
|
||||
struct gss_ctx *ctx_id,
|
||||
int offset,
|
||||
struct xdr_buf *inbuf);
|
||||
u32 gss_delete_sec_context(
|
||||
struct gss_ctx **ctx_id);
|
||||
|
||||
|
|
@ -56,7 +63,6 @@ char *gss_service_to_auth_domain_name(struct gss_api_mech *, u32 service);
|
|||
|
||||
struct pf_desc {
|
||||
u32 pseudoflavor;
|
||||
u32 qop;
|
||||
u32 service;
|
||||
char *name;
|
||||
char *auth_domain_name;
|
||||
|
|
@ -85,14 +91,21 @@ struct gss_api_ops {
|
|||
struct gss_ctx *ctx_id);
|
||||
u32 (*gss_get_mic)(
|
||||
struct gss_ctx *ctx_id,
|
||||
u32 qop,
|
||||
struct xdr_buf *message,
|
||||
struct xdr_netobj *mic_token);
|
||||
u32 (*gss_verify_mic)(
|
||||
struct gss_ctx *ctx_id,
|
||||
struct xdr_buf *message,
|
||||
struct xdr_netobj *mic_token,
|
||||
u32 *qstate);
|
||||
struct xdr_netobj *mic_token);
|
||||
u32 (*gss_wrap)(
|
||||
struct gss_ctx *ctx_id,
|
||||
int offset,
|
||||
struct xdr_buf *outbuf,
|
||||
struct page **inpages);
|
||||
u32 (*gss_unwrap)(
|
||||
struct gss_ctx *ctx_id,
|
||||
int offset,
|
||||
struct xdr_buf *buf);
|
||||
void (*gss_delete_sec_context)(
|
||||
void *internal_ctx_id);
|
||||
};
|
||||
|
|
|
|||
|
|
@ -65,16 +65,6 @@ typedef unsigned int OM_uint32;
|
|||
#define GSS_C_MECH_CODE 2
|
||||
|
||||
|
||||
/*
|
||||
* Define the default Quality of Protection for per-message services. Note
|
||||
* that an implementation that offers multiple levels of QOP may either reserve
|
||||
* a value (for example zero, as assumed here) to mean "default protection", or
|
||||
* alternatively may simply equate GSS_C_QOP_DEFAULT to a specific explicit
|
||||
* QOP value. However a value of 0 should always be interpreted by a GSSAPI
|
||||
* implementation as a request for the default protection level.
|
||||
*/
|
||||
#define GSS_C_QOP_DEFAULT 0
|
||||
|
||||
/*
|
||||
* Expiration time of 2^32-1 seconds means infinite lifetime for a
|
||||
* credential or security context
|
||||
|
|
|
|||
|
|
@ -116,18 +116,22 @@ enum seal_alg {
|
|||
|
||||
s32
|
||||
make_checksum(s32 cksumtype, char *header, int hdrlen, struct xdr_buf *body,
|
||||
struct xdr_netobj *cksum);
|
||||
int body_offset, struct xdr_netobj *cksum);
|
||||
|
||||
u32 gss_get_mic_kerberos(struct gss_ctx *, struct xdr_buf *,
|
||||
struct xdr_netobj *);
|
||||
|
||||
u32 gss_verify_mic_kerberos(struct gss_ctx *, struct xdr_buf *,
|
||||
struct xdr_netobj *);
|
||||
|
||||
u32
|
||||
krb5_make_token(struct krb5_ctx *context_handle, int qop_req,
|
||||
struct xdr_buf *input_message_buffer,
|
||||
struct xdr_netobj *output_message_buffer, int toktype);
|
||||
gss_wrap_kerberos(struct gss_ctx *ctx_id, int offset,
|
||||
struct xdr_buf *outbuf, struct page **pages);
|
||||
|
||||
u32
|
||||
krb5_read_token(struct krb5_ctx *context_handle,
|
||||
struct xdr_netobj *input_token_buffer,
|
||||
struct xdr_buf *message_buffer,
|
||||
int *qop_state, int toktype);
|
||||
gss_unwrap_kerberos(struct gss_ctx *ctx_id, int offset,
|
||||
struct xdr_buf *buf);
|
||||
|
||||
|
||||
u32
|
||||
krb5_encrypt(struct crypto_tfm * key,
|
||||
|
|
@ -137,6 +141,13 @@ u32
|
|||
krb5_decrypt(struct crypto_tfm * key,
|
||||
void *iv, void *in, void *out, int length);
|
||||
|
||||
int
|
||||
gss_encrypt_xdr_buf(struct crypto_tfm *tfm, struct xdr_buf *outbuf, int offset,
|
||||
struct page **pages);
|
||||
|
||||
int
|
||||
gss_decrypt_xdr_buf(struct crypto_tfm *tfm, struct xdr_buf *inbuf, int offset);
|
||||
|
||||
s32
|
||||
krb5_make_seq_num(struct crypto_tfm * key,
|
||||
int direction,
|
||||
|
|
|
|||
|
|
@ -41,9 +41,9 @@ struct spkm3_ctx {
|
|||
#define SPKM_WRAP_TOK 5
|
||||
#define SPKM_DEL_TOK 6
|
||||
|
||||
u32 spkm3_make_token(struct spkm3_ctx *ctx, int qop_req, struct xdr_buf * text, struct xdr_netobj * token, int toktype);
|
||||
u32 spkm3_make_token(struct spkm3_ctx *ctx, struct xdr_buf * text, struct xdr_netobj * token, int toktype);
|
||||
|
||||
u32 spkm3_read_token(struct spkm3_ctx *ctx, struct xdr_netobj *read_token, struct xdr_buf *message_buffer, int *qop_state, int toktype);
|
||||
u32 spkm3_read_token(struct spkm3_ctx *ctx, struct xdr_netobj *read_token, struct xdr_buf *message_buffer, int toktype);
|
||||
|
||||
#define CKSUMTYPE_RSA_MD5 0x0007
|
||||
|
||||
|
|
|
|||
|
|
@ -76,5 +76,30 @@ enum rpc_auth_stat {
|
|||
|
||||
#define RPC_MAXNETNAMELEN 256
|
||||
|
||||
/*
|
||||
* From RFC 1831:
|
||||
*
|
||||
* "A record is composed of one or more record fragments. A record
|
||||
* fragment is a four-byte header followed by 0 to (2**31) - 1 bytes of
|
||||
* fragment data. The bytes encode an unsigned binary number; as with
|
||||
* XDR integers, the byte order is from highest to lowest. The number
|
||||
* encodes two values -- a boolean which indicates whether the fragment
|
||||
* is the last fragment of the record (bit value 1 implies the fragment
|
||||
* is the last fragment) and a 31-bit unsigned binary value which is the
|
||||
* length in bytes of the fragment's data. The boolean value is the
|
||||
* highest-order bit of the header; the length is the 31 low-order bits.
|
||||
* (Note that this record specification is NOT in XDR standard form!)"
|
||||
*
|
||||
* The Linux RPC client always sends its requests in a single record
|
||||
* fragment, limiting the maximum payload size for stream transports to
|
||||
* 2GB.
|
||||
*/
|
||||
|
||||
typedef u32 rpc_fraghdr;
|
||||
|
||||
#define RPC_LAST_STREAM_FRAGMENT (1U << 31)
|
||||
#define RPC_FRAGMENT_SIZE_MASK (~RPC_LAST_STREAM_FRAGMENT)
|
||||
#define RPC_MAX_FRAGMENT_SIZE ((1U << 31) - 1)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _LINUX_SUNRPC_MSGPROT_H_ */
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue