A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-15 01:01:56 -04:00
Code Issues Projects Releases Packages Wiki Activity

ARM: dts: msm: Add dtsi entry for ssg hlos drivers

Browse source 
The following changes are added:
1. Add qseecom node for msmsteppe
2. Enable QRNG driver for msmsteppe.
3. Add shmbridge node for msmsteppe.
4. Add smcinvoke node for msmsteppe.
5. Add tz_log node for msmsteppe.

Change-Id: I668eb58ec9084365c1baf3ca0060c6cf309c87a0
This commit is contained in:
Santosh Dronamraju 2020-10-29 16:18:16 +05:30 • committed by Gerrit - the friendly Code Review server
commit 6fe2d189d1
1 changed files with 51 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

53
qcom/sm6150.dtsi
View file

@ -459,8 +459,10 @@
qseecom_mem: qseecom_region@0x9e400000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x9e400000 0x0 0x1400000>;
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x1400000>;
};
cdsp_sec_mem: cdsp_sec_regions@0x9f800000 {
@ -1671,6 +1673,53 @@
qcom,firmware-name = "venus";
memory-region = <&pil_video_mem>;
};
qtee_shmbridge {
compatible = "qcom,tee-shared-memory-bridge";
};
qcom_qseecom: qseecom@86d00000 {
compatible = "qcom,qseecom";
reg = <0x86d00000 0xe00000>;
reg-names = "secapp-region";
memory-region = <&qseecom_mem>;
qcom,hlos-num-ce-hw-instances = <1>;
qcom,hlos-ce-hw-instance = <0>;
qcom,qsee-ce-hw-instance = <0>;
qcom,disk-encrypt-pipe-pair = <2>;
qcom,support-fde;
qcom,no-clock-support;
qcom,fde-key-size;
qcom,appsbl-qseecom-support;
qcom,commonlib64-loaded-by-uefi;
qcom,qsee-reentrancy-support = <2>;
};
qcom_smcinvoke: smcinvoke@86d00000 {
compatible = "qcom,smcinvoke";
reg = <0x86d00000 0xe00000>;
reg-names = "secapp-region";
};
qcom_rng: qrng@793000 {
compatible = "qcom,msm-rng";
reg = <0x793000 0x1000>;
qcom,msm-rng-iface-clk;
qcom,no-qrng-config;
interconnect-names = "data_path";
interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_PRNG>;
clock-names = "km_clk_src";
clocks = <&gcc GCC_PRNG_AHB_CLK>;
};
qcom_tzlog: tz-log@146aa720 {
compatible = "qcom,tz-log";
reg = <0x146aa720 0x3000>;
qcom,hyplog-enabled;
hyplog-address-offset = <0x410>;
hyplog-size-offset = <0x414>;
};
};
#include "sm6150-qupv3.dtsi"