From 0181a16f13a02f9beaf3cca35b63c33a5a365d82 Mon Sep 17 00:00:00 2001 From: Karthik Anantha Ram Date: Thu, 11 Jun 2020 16:39:32 -0700 Subject: [PATCH] msm: camera: isp: Disable clk gating in IFE top Disable auto clk gating for all core clocks, ahb & NOC. CRs-Fixed: 2705869 Change-Id: I74ad58e1c8308edcd19ac6414a25a0f7fafce3cd Signed-off-by: Karthik Anantha Ram --- .../isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c b/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c index 6a66955ed280..adbd880eabc8 100644 --- a/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c +++ b/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c @@ -366,23 +366,20 @@ int cam_vfe_top_ver3_init_hw(void *device_priv, top_priv->hw_clk_rate = 0; - /** - * Auto clock gating is enabled by default, but no harm - * in setting the value we expect. - */ - CAM_DBG(CAM_ISP, "Enabling clock gating at IFE top"); + /* Disable clock gating at IFE top */ + CAM_DBG(CAM_ISP, "Disable clock gating at IFE top"); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->core_cgc_ovd_0, 0x0); + common_data.common_reg->core_cgc_ovd_0, 0xFFFFFFFF); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->core_cgc_ovd_1, 0x0); + common_data.common_reg->core_cgc_ovd_1, 0xFF); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->ahb_cgc_ovd, 0x0); + common_data.common_reg->ahb_cgc_ovd, 0x1); cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX, - common_data.common_reg->noc_cgc_ovd, 0x0); + common_data.common_reg->noc_cgc_ovd, 0x1); top_priv->top_common.hw_version = cam_io_r_mb(common_data.soc_info->reg_map[0].mem_base +