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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "cnss2: Fix SBL logging for invalid log location address"
This commit is contained in:
commit
70661b7439
2 changed files with 23 additions and 14 deletions
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@ -1705,6 +1705,7 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)
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{
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int i;
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u32 mem_addr, val, pbl_stage, sbl_log_start, sbl_log_size;
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u32 pbl_wlan_boot_cfg, pbl_bootstrap_status;
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struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
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if (plat_priv->device_id != QCA6490_DEVICE_ID)
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@ -1718,8 +1719,14 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)
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&sbl_log_start);
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cnss_pci_reg_read(pci_priv, QCA6490_PCIE_BHI_ERRDBG3_REG,
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&sbl_log_size);
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cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x PCIE_BHI_ERRDBG: 0x%08x 0x%08x",
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cnss_pci_reg_read(pci_priv, QCA6490_PBL_WLAN_BOOT_CFG,
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&pbl_wlan_boot_cfg);
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cnss_pci_reg_read(pci_priv, QCA6490_PBL_BOOTSTRAP_STATUS,
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&pbl_bootstrap_status);
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cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x PCIE_BHI_ERRDBG: Start: 0x%08x Size:0x%08x",
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pbl_stage, sbl_log_start, sbl_log_size);
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cnss_pr_dbg("PBL_WLAN_BOOT_CFG: 0x%08x PBL_BOOTSTRAP_STATUS: 0x%08x",
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pbl_wlan_boot_cfg, pbl_bootstrap_status);
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cnss_pr_dbg("Dumping PBL log data");
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/* cnss_pci_reg_read provides 32bit register values */
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@ -1730,28 +1737,30 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)
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cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);
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}
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if (plat_priv->device_version.major_version == FW_V2_NUMBER) {
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if (sbl_log_start > QCA6490_V2_SBL_DATA_START &&
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(sbl_log_start + sbl_log_size) < QCA6490_V2_SBL_DATA_END)
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goto dump_sbl_log;
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} else {
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if (sbl_log_start > QCA6490_V1_SBL_DATA_START &&
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(sbl_log_start + sbl_log_size) < QCA6490_V1_SBL_DATA_END)
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goto dump_sbl_log;
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}
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cnss_pr_err("Invalid SBL log data");
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return;
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dump_sbl_log:
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cnss_pr_dbg("Dumping SBL log data");
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sbl_log_size = (sbl_log_size > QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?
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QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);
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if (plat_priv->device_version.major_version == FW_V2_NUMBER) {
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if (sbl_log_start < QCA6490_V2_SBL_DATA_START ||
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sbl_log_start > QCA6490_V2_SBL_DATA_END ||
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(sbl_log_start + sbl_log_size) > QCA6490_V2_SBL_DATA_END)
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goto out;
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} else {
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if (sbl_log_start < QCA6490_V1_SBL_DATA_START ||
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sbl_log_start > QCA6490_V1_SBL_DATA_END ||
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(sbl_log_start + sbl_log_size) > QCA6490_V1_SBL_DATA_END)
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goto out;
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}
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cnss_pr_dbg("Dumping SBL log data");
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for (i = 0; i < sbl_log_size; i += sizeof(val)) {
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mem_addr = sbl_log_start + i;
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if (cnss_pci_reg_read(pci_priv, mem_addr, &val))
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break;
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cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);
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}
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return;
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out:
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cnss_pr_err("Invalid SBL log data");
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}
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static int cnss_qca6174_powerup(struct cnss_pci_data *pci_priv)
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@ -3918,7 +3927,6 @@ int cnss_pci_force_fw_assert_hdlr(struct cnss_pci_data *pci_priv)
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cnss_auto_resume(&pci_priv->pci_dev->dev);
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cnss_pci_dump_misc_reg(pci_priv);
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cnss_pci_dump_shadow_reg(pci_priv);
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cnss_pci_dump_bl_sram_mem(pci_priv);
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ret = cnss_pci_set_mhi_state(pci_priv, CNSS_MHI_TRIGGER_RDDM);
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if (ret) {
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@ -277,5 +277,6 @@
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#define QCA6490_TCSR_PBL_LOGGING_REG 0x01B000F8
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#define QCA6490_PCIE_BHI_ERRDBG2_REG 0x01E0E238
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#define QCA6490_PCIE_BHI_ERRDBG3_REG 0x01E0E23C
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#define QCA6490_PBL_WLAN_BOOT_CFG 0x01E22B34
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#define QCA6490_PBL_BOOTSTRAP_STATUS 0x01910008
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#endif
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