Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
  ARM: memblock: setup lowmem mappings using memblock
  ARM: memblock: move meminfo into find_limits directly
  ARM: memblock: convert free_highpages() to use memblock
  ARM: move freeing of highmem pages out of mem_init()
  ARM: memblock: convert memory detail printing to use memblock
  ARM: memblock: use memblock to free memory into arm_bootmem_init()
  ARM: memblock: use memblock when initializing memory allocators
  ARM: ensure membank array is always sorted
  ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
  ARM: 6464/2: fix spinlock recursion in adjust_pte()
  ARM: fix memblock breakage
  ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
  ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
  ARM: 6449/1: Fix for compiler warning of uninitialized variable.
  ARM: 6445/1: fixup TCM memory types
  ARM: imx: Add wake functionality to GPIO
  ARM: mx5: Add gpio-keys to mx51 babbage board
  ARM: imx: Add gpio-keys to plat-mxc
  mx31_3ds: Fix spi registration
  mx31_3ds: Fix the logic for detecting the debug board
  ...
This commit is contained in:
Linus Torvalds 2010-10-30 08:26:25 -07:00
commit 706d4b12f8
234 changed files with 8861 additions and 2080 deletions

View file

@ -176,6 +176,21 @@ static void ap320_wvga_power_off(void *board_data)
__raw_writew(0, FPGA_LCDREG);
}
const static struct fb_videomode ap325rxa_lcdc_modes[] = {
{
.name = "LB070WV1",
.xres = 800,
.yres = 480,
.left_margin = 32,
.right_margin = 160,
.hsync_len = 8,
.upper_margin = 63,
.lower_margin = 80,
.vsync_len = 1,
.sync = 0, /* hsync and vsync are active low */
},
};
static struct sh_mobile_lcdc_info lcdc_info = {
.clock_source = LCDC_CLK_EXTERNAL,
.ch[0] = {
@ -183,18 +198,8 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.bpp = 16,
.interface_type = RGB18,
.clock_divider = 1,
.lcd_cfg = {
.name = "LB070WV1",
.xres = 800,
.yres = 480,
.left_margin = 32,
.right_margin = 160,
.hsync_len = 8,
.upper_margin = 63,
.lower_margin = 80,
.vsync_len = 1,
.sync = 0, /* hsync and vsync are active low */
},
.lcd_cfg = ap325rxa_lcdc_modes,
.num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
.lcd_size_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,

View file

@ -231,14 +231,41 @@ static struct platform_device usb1_common_device = {
};
/* LCDC */
const static struct fb_videomode ecovec_lcd_modes[] = {
{
.name = "Panel",
.xres = 800,
.yres = 480,
.left_margin = 220,
.right_margin = 110,
.hsync_len = 70,
.upper_margin = 20,
.lower_margin = 5,
.vsync_len = 5,
.sync = 0, /* hsync and vsync are active low */
},
};
const static struct fb_videomode ecovec_dvi_modes[] = {
{
.name = "DVI",
.xres = 1280,
.yres = 720,
.left_margin = 220,
.right_margin = 110,
.hsync_len = 40,
.upper_margin = 20,
.lower_margin = 5,
.vsync_len = 5,
.sync = 0, /* hsync and vsync are active low */
},
};
static struct sh_mobile_lcdc_info lcdc_info = {
.ch[0] = {
.interface_type = RGB18,
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.lcd_cfg = {
.sync = 0, /* hsync and vsync are active low */
},
.lcd_size_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,
@ -1075,33 +1102,18 @@ static int __init arch_setup(void)
if (gpio_get_value(GPIO_PTE6)) {
/* DVI */
lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
lcdc_info.ch[0].clock_divider = 1,
lcdc_info.ch[0].lcd_cfg.name = "DVI";
lcdc_info.ch[0].lcd_cfg.xres = 1280;
lcdc_info.ch[0].lcd_cfg.yres = 720;
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
lcdc_info.ch[0].clock_divider = 1;
lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
gpio_set_value(GPIO_PTA2, 1);
gpio_set_value(GPIO_PTU1, 1);
} else {
/* Panel */
lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
lcdc_info.ch[0].clock_divider = 2,
lcdc_info.ch[0].lcd_cfg.name = "Panel";
lcdc_info.ch[0].lcd_cfg.xres = 800;
lcdc_info.ch[0].lcd_cfg.yres = 480;
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
lcdc_info.ch[0].clock_divider = 2;
lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
gpio_set_value(GPIO_PTR1, 1);

View file

@ -126,6 +126,21 @@ static struct platform_device kfr2r09_sh_keysc_device = {
},
};
const static struct fb_videomode kfr2r09_lcdc_modes[] = {
{
.name = "TX07D34VM0AAA",
.xres = 240,
.yres = 400,
.left_margin = 0,
.right_margin = 16,
.hsync_len = 8,
.upper_margin = 0,
.lower_margin = 1,
.vsync_len = 1,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
},
};
static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
.clock_source = LCDC_CLK_BUS,
.ch[0] = {
@ -134,18 +149,8 @@ static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
.interface_type = SYS18,
.clock_divider = 6,
.flags = LCDC_FLAGS_DWPOL,
.lcd_cfg = {
.name = "TX07D34VM0AAA",
.xres = 240,
.yres = 400,
.left_margin = 0,
.right_margin = 16,
.hsync_len = 8,
.upper_margin = 0,
.lower_margin = 1,
.vsync_len = 1,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
},
.lcd_cfg = kfr2r09_lcdc_modes,
.num_cfg = ARRAY_SIZE(kfr2r09_lcdc_modes),
.lcd_size_cfg = {
.width = 35,
.height = 58,

View file

@ -213,51 +213,55 @@ static struct platform_device migor_nand_flash_device = {
}
};
const static struct fb_videomode migor_lcd_modes[] = {
{
#if defined(CONFIG_SH_MIGOR_RTA_WVGA)
.name = "LB070WV1",
.xres = 800,
.yres = 480,
.left_margin = 64,
.right_margin = 16,
.hsync_len = 120,
.sync = 0,
#elif defined(CONFIG_SH_MIGOR_QVGA)
.name = "PH240320T",
.xres = 320,
.yres = 240,
.left_margin = 0,
.right_margin = 16,
.hsync_len = 8,
.sync = FB_SYNC_HOR_HIGH_ACT,
#endif
.upper_margin = 1,
.lower_margin = 17,
.vsync_len = 2,
},
};
static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
#if defined(CONFIG_SH_MIGOR_RTA_WVGA)
.clock_source = LCDC_CLK_BUS,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.interface_type = RGB16,
.clock_divider = 2,
.lcd_cfg = {
.name = "LB070WV1",
.xres = 800,
.yres = 480,
.left_margin = 64,
.right_margin = 16,
.hsync_len = 120,
.upper_margin = 1,
.lower_margin = 17,
.vsync_len = 2,
.sync = 0,
},
.lcd_cfg = migor_lcd_modes,
.num_cfg = ARRAY_SIZE(migor_lcd_modes),
.lcd_size_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,
},
}
#endif
#ifdef CONFIG_SH_MIGOR_QVGA
#elif defined(CONFIG_SH_MIGOR_QVGA)
.clock_source = LCDC_CLK_PERIPHERAL,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.interface_type = SYS16A,
.clock_divider = 10,
.lcd_cfg = {
.name = "PH240320T",
.xres = 320,
.yres = 240,
.left_margin = 0,
.right_margin = 16,
.hsync_len = 8,
.upper_margin = 1,
.lower_margin = 17,
.vsync_len = 2,
.sync = FB_SYNC_HOR_HIGH_ACT,
},
.lcd_cfg = migor_lcd_modes,
.num_cfg = ARRAY_SIZE(migor_lcd_modes),
.lcd_size_cfg = { /* 2.4 inch */
.width = 49,
.height = 37,

View file

@ -144,16 +144,42 @@ static struct platform_device nor_flash_device = {
};
/* LCDC */
const static struct fb_videomode lcdc_720p_modes[] = {
{
.name = "LB070WV1",
.sync = 0, /* hsync and vsync are active low */
.xres = 1280,
.yres = 720,
.left_margin = 220,
.right_margin = 110,
.hsync_len = 40,
.upper_margin = 20,
.lower_margin = 5,
.vsync_len = 5,
},
};
const static struct fb_videomode lcdc_vga_modes[] = {
{
.name = "LB070WV1",
.sync = 0, /* hsync and vsync are active low */
.xres = 640,
.yres = 480,
.left_margin = 105,
.right_margin = 50,
.hsync_len = 96,
.upper_margin = 33,
.lower_margin = 10,
.vsync_len = 2,
},
};
static struct sh_mobile_lcdc_info lcdc_info = {
.clock_source = LCDC_CLK_EXTERNAL,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.bpp = 16,
.clock_divider = 1,
.lcd_cfg = {
.name = "LB070WV1",
.sync = 0, /* hsync and vsync are active low */
},
.lcd_size_cfg = { /* 7.0 inch */
.width = 152,
.height = 91,
@ -908,24 +934,12 @@ static int __init devices_setup(void)
if (sw & SW41_B) {
/* 720p */
lcdc_info.ch[0].lcd_cfg.xres = 1280;
lcdc_info.ch[0].lcd_cfg.yres = 720;
lcdc_info.ch[0].lcd_cfg.left_margin = 220;
lcdc_info.ch[0].lcd_cfg.right_margin = 110;
lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
} else {
/* VGA */
lcdc_info.ch[0].lcd_cfg.xres = 640;
lcdc_info.ch[0].lcd_cfg.yres = 480;
lcdc_info.ch[0].lcd_cfg.left_margin = 105;
lcdc_info.ch[0].lcd_cfg.right_margin = 50;
lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
}
if (sw & SW41_A) {