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[PARISC] Allow nested interrupts
Our prior mode of operation didn't allow nested interrupts because it makes the interrupt code much simpler. However, nested interrupts are better for latency. This code uses the EIEM register to simulate level interrupts and thus achieve nesting. Signed-off-by: James Bottomley <[email protected]> Signed-off-by: Kyle McMartin <[email protected]>
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4 changed files with 93 additions and 64 deletions
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@ -692,6 +692,7 @@ static void iosapic_end_irq(unsigned int irq)
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DBG(KERN_DEBUG "end_irq(%d): eoi(%p, 0x%x)\n", irq,
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vi->eoi_addr, vi->eoi_data);
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iosapic_eoi(vi->eoi_addr, vi->eoi_data);
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cpu_end_irq(irq);
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}
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static unsigned int iosapic_startup_irq(unsigned int irq)
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@ -728,7 +729,7 @@ static struct hw_interrupt_type iosapic_interrupt_type = {
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.shutdown = iosapic_disable_irq,
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.enable = iosapic_enable_irq,
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.disable = iosapic_disable_irq,
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.ack = no_ack_irq,
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.ack = cpu_ack_irq,
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.end = iosapic_end_irq,
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#ifdef CONFIG_SMP
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.set_affinity = iosapic_set_affinity_irq,
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