A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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This commit is contained in:
Linus Torvalds 2005-11-13 18:17:54 -08:00
commit 70ac551651
17 changed files with 870 additions and 129 deletions
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81
drivers/ide/pci/sl82c105.c
View file

@ -399,34 +399,6 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
return dev->irq;
}
static void __devinit init_dma_sl82c105(ide_hwif_t *hwif, unsigned long dma_base)
{
unsigned int rev;
u8 dma_state;
DBG(("init_dma_sl82c105(hwif: ide%d, dma_base: 0x%08x)\n", hwif->index, dma_base));
hwif->autodma = 0;
if (!dma_base)
return;
dma_state = hwif->INB(dma_base + 2);
rev = sl82c105_bridge_revision(hwif->pci_dev);
if (rev <= 5) {
printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
hwif->name, rev);
dma_state &= ~0x60;
} else {
dma_state |= 0x60;
if (!noautodma)
hwif->autodma = 1;
}
hwif->OUTB(dma_state, dma_base + 2);
ide_setup_dma(hwif, dma_base, 8);
}
/*
* Initialise the chip
*/
@ -434,6 +406,8 @@ static void __devinit init_dma_sl82c105(ide_hwif_t *hwif, unsigned long dma_base
static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
{
struct pci_dev *dev = hwif->pci_dev;
unsigned int rev;
u8 dma_state;
u32 val;
DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
@ -455,33 +429,54 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
pci_read_config_dword(dev, 0x40, &val);
*((u32 *)&hwif->hwif_data) = val;
hwif->atapi_dma = 0;
hwif->mwdma_mask = 0;
hwif->swdma_mask = 0;
hwif->autodma = 0;
if (!hwif->dma_base)
return;
hwif->atapi_dma = 1;
hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07;
dma_state = hwif->INB(hwif->dma_base + 2) & ~0x60;
rev = sl82c105_bridge_revision(hwif->pci_dev);
if (rev <= 5) {
/*
* Never ever EVER under any circumstances enable
* DMA when the bridge is this old.
*/
printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
hwif->name, rev);
} else {
#ifdef CONFIG_BLK_DEV_IDEDMA
hwif->ide_dma_check = &sl82c105_check_drive;
hwif->ide_dma_on = &sl82c105_ide_dma_on;
hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly;
hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
hwif->dma_start = &sl82c105_ide_dma_start;
hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
dma_state |= 0x60;
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
hwif->drives[1].autodma = hwif->autodma;
hwif->atapi_dma = 1;
hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07;
hwif->ide_dma_check = &sl82c105_check_drive;
hwif->ide_dma_on = &sl82c105_ide_dma_on;
hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly;
hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
hwif->dma_start = &sl82c105_ide_dma_start;
hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
hwif->drives[1].autodma = hwif->autodma;
if (hwif->mate)
hwif->serialized = hwif->mate->serialized = 1;
#endif /* CONFIG_BLK_DEV_IDEDMA */
}
hwif->OUTB(dma_state, hwif->dma_base + 2);
}
static ide_pci_device_t sl82c105_chipset __devinitdata = {
.name = "W82C105",
.init_chipset = init_chipset_sl82c105,
.init_hwif = init_hwif_sl82c105,
.init_dma = init_dma_sl82c105,
.channels = 2,
.autodma = NOAUTODMA,
.enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},

16
drivers/net/smc91x.h
View file

@ -100,14 +100,14 @@
#define SMC_IO_SHIFT 0
#define SMC_NOWAIT 1
#define SMC_inb(a, r) inb((a) + (r))
#define SMC_insb(a, r, p, l) insb((a) + (r), p, (l))
#define SMC_inw(a, r) inw((a) + (r))
#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
#define SMC_outb(v, a, r) outb(v, (a) + (r))
#define SMC_outsb(a, r, p, l) outsb((a) + (r), p, (l))
#define SMC_outw(v, a, r) outw(v, (a) + (r))
#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
#define SMC_inb(a, r) readb((a) + (r))
#define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l))
#define SMC_inw(a, r) readw((a) + (r))
#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
#define SMC_outb(v, a, r) writeb(v, (a) + (r))
#define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l))
#define SMC_outw(v, a, r) writew(v, (a) + (r))
#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
#define set_irq_type(irq, type) do {} while (0)