From 624a78e9e352a31a4b26e809b3864bbb4cca58dd Mon Sep 17 00:00:00 2001 From: Santosh Mardi Date: Mon, 12 Oct 2020 17:49:15 +0530 Subject: [PATCH] ARM: dts: msm: update ddr mapping table for shima target Update ddr mapping table for cpu7 latfloor and cpu0-llcc-ddr-lat voting device. Change-Id: I9f2249bb7ae44665627379bb887a2490d2882d01 --- qcom/shima.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi index fd0b467f4806..650f05e7da66 100644 --- a/qcom/shima.dtsi +++ b/qcom/shima.dtsi @@ -2550,7 +2550,6 @@ ddr4-map { qcom,ddr-type = ; qcom,core-dev-table = - < 691200 MHZ_TO_MBPS( 300, 4) >, < 940800 MHZ_TO_MBPS( 451, 4) >, < 1171200 MHZ_TO_MBPS( 547, 4) >, < 1516800 MHZ_TO_MBPS( 768, 4) >, @@ -2560,7 +2559,6 @@ ddr5-map { qcom,ddr-type = ; qcom,core-dev-table = - < 691200 MHZ_TO_MBPS( 300, 4) >, < 940800 MHZ_TO_MBPS( 451, 4) >, < 1171200 MHZ_TO_MBPS( 547, 4) >, < 1516800 MHZ_TO_MBPS( 768, 4) >, @@ -2667,14 +2665,14 @@ ddr4-map { qcom,ddr-type = ; qcom,core-dev-table = - < 2361600 MHZ_TO_MBPS( 300, 4) >, + < 2361600 MHZ_TO_MBPS( 451, 4) >, < 2707200 MHZ_TO_MBPS(2133, 4) >; }; ddr5-map { qcom,ddr-type = ; qcom,core-dev-table = - < 2361600 MHZ_TO_MBPS( 300, 4) >, + < 2361600 MHZ_TO_MBPS( 451, 4) >, < 2707200 MHZ_TO_MBPS(3196, 4) >; }; };