mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: arch/parisc/kernel/perf_asm.S: build fix parisc: remove -traditional from assembler flags parisc: use conditional macro for 64-bit wide ops parisc: Remove ioctl.h content picked up from <asm-generic/ioctl.h>. arch/parisc/kernel/unaligned.c: use time_* macros parisc: remove redundant display of free swap space in show_mem() drivers/parisc: replace remaining __FUNCTION__ occurrences parisc: replace remaining __FUNCTION__ occurrences parisc: new termios definitions parisc: fix trivial section name warnings
This commit is contained in:
Linus Torvalds
commit
713c0515a5
31 changed files with 167 additions and 210 deletions
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@ -13,9 +13,10 @@
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#include <asm/unistd.h>
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#include <asm/errno.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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.level LEVEL
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.text
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__HEAD
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.import hpux_call_table
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.import hpux_syscall_exit,code
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@ -28,9 +28,10 @@
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#include <asm/assembly.h>
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#include <asm/signal.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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.level LEVEL
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.text
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__HEAD
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/* These should probably go in a header file somewhere.
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* They are duplicated in kernel/wrappers.S
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@ -4,9 +4,6 @@
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extra-y := init_task.o head.o vmlinux.lds
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AFLAGS_entry.o := -traditional
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AFLAGS_pacache.o := -traditional
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obj-y := cache.o pacache.o setup.o traps.o time.o irq.o \
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pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \
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ptrace.o hardware.o inventory.o drivers.o \
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@ -38,18 +38,11 @@
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#include <asm/thread_info.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#ifdef CONFIG_64BIT
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#define CMPIB cmpib,*
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#define CMPB cmpb,*
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#define COND(x) *x
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.level 2.0w
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#else
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#define CMPIB cmpib,
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#define CMPB cmpb,
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#define COND(x) x
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.level 2.0
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#endif
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@ -629,7 +622,7 @@
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* the static part of the kernel address space.
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*/
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.text
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__HEAD
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.align PAGE_SIZE
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@ -957,9 +950,9 @@ intr_check_sig:
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* Only do signals if we are returning to user space
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*/
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LDREG PT_IASQ0(%r16), %r20
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CMPIB=,n 0,%r20,intr_restore /* backward */
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cmpib,COND(=),n 0,%r20,intr_restore /* backward */
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LDREG PT_IASQ1(%r16), %r20
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CMPIB=,n 0,%r20,intr_restore /* backward */
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cmpib,COND(=),n 0,%r20,intr_restore /* backward */
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copy %r0, %r25 /* long in_syscall = 0 */
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#ifdef CONFIG_64BIT
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@ -1013,10 +1006,10 @@ intr_do_resched:
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* we jump back to intr_restore.
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*/
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LDREG PT_IASQ0(%r16), %r20
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CMPIB= 0, %r20, intr_do_preempt
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cmpib,COND(=) 0, %r20, intr_do_preempt
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nop
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LDREG PT_IASQ1(%r16), %r20
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CMPIB= 0, %r20, intr_do_preempt
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cmpib,COND(=) 0, %r20, intr_do_preempt
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nop
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#ifdef CONFIG_64BIT
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@ -1045,7 +1038,7 @@ intr_do_preempt:
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/* current_thread_info()->preempt_count */
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mfctl %cr30, %r1
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LDREG TI_PRE_COUNT(%r1), %r19
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CMPIB<> 0, %r19, intr_restore /* if preempt_count > 0 */
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cmpib,COND(<>) 0, %r19, intr_restore /* if preempt_count > 0 */
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nop /* prev insn branched backwards */
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/* check if we interrupted a critical path */
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@ -1064,7 +1057,7 @@ intr_do_preempt:
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*/
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intr_extint:
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CMPIB=,n 0,%r16,1f
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cmpib,COND(=),n 0,%r16,1f
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get_stack_use_cr30
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b,n 2f
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@ -1099,7 +1092,7 @@ ENDPROC(syscall_exit_rfi)
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ENTRY(intr_save) /* for os_hpmc */
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mfsp %sr7,%r16
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CMPIB=,n 0,%r16,1f
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cmpib,COND(=),n 0,%r16,1f
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get_stack_use_cr30
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b 2f
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copy %r8,%r26
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@ -1121,7 +1114,7 @@ ENTRY(intr_save) /* for os_hpmc */
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* adjust isr/ior below.
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*/
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CMPIB=,n 6,%r26,skip_save_ior
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cmpib,COND(=),n 6,%r26,skip_save_ior
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mfctl %cr20, %r16 /* isr */
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@ -1450,11 +1443,11 @@ nadtlb_emulate:
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bb,>=,n %r9,26,nadtlb_nullify /* m bit not set, just nullify */
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BL get_register,%r25
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extrw,u %r9,15,5,%r8 /* Get index register # */
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CMPIB=,n -1,%r1,nadtlb_fault /* have to use slow path */
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cmpib,COND(=),n -1,%r1,nadtlb_fault /* have to use slow path */
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copy %r1,%r24
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BL get_register,%r25
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extrw,u %r9,10,5,%r8 /* Get base register # */
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CMPIB=,n -1,%r1,nadtlb_fault /* have to use slow path */
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cmpib,COND(=),n -1,%r1,nadtlb_fault /* have to use slow path */
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BL set_register,%r25
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add,l %r1,%r24,%r1 /* doesn't affect c/b bits */
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@ -1486,7 +1479,7 @@ nadtlb_probe_check:
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cmpb,<>,n %r16,%r17,nadtlb_fault /* Must be probe,[rw]*/
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BL get_register,%r25 /* Find the target register */
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extrw,u %r9,31,5,%r8 /* Get target register */
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CMPIB=,n -1,%r1,nadtlb_fault /* have to use slow path */
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cmpib,COND(=),n -1,%r1,nadtlb_fault /* have to use slow path */
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BL set_register,%r25
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copy %r0,%r1 /* Write zero to target register */
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b nadtlb_nullify /* Nullify return insn */
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@ -1570,12 +1563,12 @@ dbit_trap_20w:
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L3_ptep ptp,pte,t0,va,dbit_fault
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#ifdef CONFIG_SMP
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CMPIB=,n 0,spc,dbit_nolock_20w
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cmpib,COND(=),n 0,spc,dbit_nolock_20w
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load32 PA(pa_dbit_lock),t0
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dbit_spin_20w:
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LDCW 0(t0),t1
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cmpib,= 0,t1,dbit_spin_20w
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cmpib,COND(=) 0,t1,dbit_spin_20w
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nop
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dbit_nolock_20w:
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@ -1586,7 +1579,7 @@ dbit_nolock_20w:
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idtlbt pte,prot
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#ifdef CONFIG_SMP
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CMPIB=,n 0,spc,dbit_nounlock_20w
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cmpib,COND(=),n 0,spc,dbit_nounlock_20w
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ldi 1,t1
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stw t1,0(t0)
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@ -1606,7 +1599,7 @@ dbit_trap_11:
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L2_ptep ptp,pte,t0,va,dbit_fault
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#ifdef CONFIG_SMP
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CMPIB=,n 0,spc,dbit_nolock_11
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cmpib,COND(=),n 0,spc,dbit_nolock_11
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load32 PA(pa_dbit_lock),t0
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dbit_spin_11:
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@ -1628,7 +1621,7 @@ dbit_nolock_11:
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mtsp t1, %sr1 /* Restore sr1 */
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#ifdef CONFIG_SMP
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CMPIB=,n 0,spc,dbit_nounlock_11
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cmpib,COND(=),n 0,spc,dbit_nounlock_11
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ldi 1,t1
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stw t1,0(t0)
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@ -1646,7 +1639,7 @@ dbit_trap_20:
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L2_ptep ptp,pte,t0,va,dbit_fault
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#ifdef CONFIG_SMP
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CMPIB=,n 0,spc,dbit_nolock_20
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cmpib,COND(=),n 0,spc,dbit_nolock_20
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load32 PA(pa_dbit_lock),t0
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dbit_spin_20:
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@ -1665,7 +1658,7 @@ dbit_nolock_20:
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idtlbt pte,prot
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#ifdef CONFIG_SMP
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CMPIB=,n 0,spc,dbit_nounlock_20
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cmpib,COND(=),n 0,spc,dbit_nounlock_20
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ldi 1,t1
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stw t1,0(t0)
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@ -1994,7 +1987,7 @@ ENTRY(syscall_exit)
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/* We can't use "CMPIB<> PER_HPUX" since "im5" field is sign extended */
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ldo -PER_HPUX(%r19), %r19
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CMPIB<>,n 0,%r19,1f
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cmpib,COND(<>),n 0,%r19,1f
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/* Save other hpux returns if personality is PER_HPUX */
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STREG %r22,TASK_PT_GR22(%r1)
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@ -32,7 +32,7 @@ ENTRY(boot_args)
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.word 0 /* arg3 */
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END(boot_args)
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.section .text.head
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__HEAD
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.align 4
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.import init_thread_union,data
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.import fault_vector_20,code /* IVA parisc 2.0 32 bit */
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@ -47,6 +47,7 @@
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#include <asm/pdc.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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/*
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* stack for os_hpmc, the HPMC handler.
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@ -76,7 +77,7 @@ ENTRY(hpmc_pim_data)
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.block HPMC_PIM_DATA_SIZE
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END(hpmc_pim_data)
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.text
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__HEAD
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.import intr_save, code
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ENTRY(os_hpmc)
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@ -499,7 +499,7 @@ add_system_map_addresses(struct parisc_device *dev, int num_addrs,
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dev->addr = kmalloc(num_addrs * sizeof(unsigned long), GFP_KERNEL);
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if(!dev->addr) {
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printk(KERN_ERR "%s %s(): memory allocation failure\n",
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__FILE__, __FUNCTION__);
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__FILE__, __func__);
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return;
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}
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@ -37,8 +37,9 @@
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#include <asm/pgtable.h>
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#include <asm/cache.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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.text
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__HEAD
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.align 128
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ENTRY(flush_tlb_all_local)
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@ -85,7 +86,7 @@ ENTRY(flush_tlb_all_local)
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LDREG ITLB_OFF_COUNT(%r1), %arg2
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LDREG ITLB_LOOP(%r1), %arg3
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ADDIB= -1, %arg3, fitoneloop /* Preadjust and test */
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addib,COND(=) -1, %arg3, fitoneloop /* Preadjust and test */
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movb,<,n %arg3, %r31, fitdone /* If loop < 0, skip */
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copy %arg0, %r28 /* Init base addr */
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@ -95,14 +96,14 @@ fitmanyloop: /* Loop if LOOP >= 2 */
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copy %arg2, %r29 /* Init middle loop count */
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fitmanymiddle: /* Loop if LOOP >= 2 */
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ADDIB> -1, %r31, fitmanymiddle /* Adjusted inner loop decr */
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addib,COND(>) -1, %r31, fitmanymiddle /* Adjusted inner loop decr */
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pitlbe 0(%sr1, %r28)
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pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
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ADDIB> -1, %r29, fitmanymiddle /* Middle loop decr */
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addib,COND(>) -1, %r29, fitmanymiddle /* Middle loop decr */
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copy %arg3, %r31 /* Re-init inner loop count */
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movb,tr %arg0, %r28, fitmanyloop /* Re-init base addr */
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ADDIB<=,n -1, %r22, fitdone /* Outer loop count decr */
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addib,COND(<=),n -1, %r22, fitdone /* Outer loop count decr */
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fitoneloop: /* Loop if LOOP = 1 */
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mtsp %r20, %sr1
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@ -110,10 +111,10 @@ fitoneloop: /* Loop if LOOP = 1 */
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copy %arg2, %r29 /* init middle loop count */
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fitonemiddle: /* Loop if LOOP = 1 */
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ADDIB> -1, %r29, fitonemiddle /* Middle loop count decr */
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addib,COND(>) -1, %r29, fitonemiddle /* Middle loop count decr */
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pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
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ADDIB> -1, %r22, fitoneloop /* Outer loop count decr */
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addib,COND(>) -1, %r22, fitoneloop /* Outer loop count decr */
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add %r21, %r20, %r20 /* increment space */
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fitdone:
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@ -128,7 +129,7 @@ fitdone:
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LDREG DTLB_OFF_COUNT(%r1), %arg2
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LDREG DTLB_LOOP(%r1), %arg3
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ADDIB= -1, %arg3, fdtoneloop /* Preadjust and test */
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addib,COND(=) -1, %arg3, fdtoneloop /* Preadjust and test */
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movb,<,n %arg3, %r31, fdtdone /* If loop < 0, skip */
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copy %arg0, %r28 /* Init base addr */
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@ -138,14 +139,14 @@ fdtmanyloop: /* Loop if LOOP >= 2 */
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copy %arg2, %r29 /* Init middle loop count */
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fdtmanymiddle: /* Loop if LOOP >= 2 */
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ADDIB> -1, %r31, fdtmanymiddle /* Adjusted inner loop decr */
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addib,COND(>) -1, %r31, fdtmanymiddle /* Adjusted inner loop decr */
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pdtlbe 0(%sr1, %r28)
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pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
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ADDIB> -1, %r29, fdtmanymiddle /* Middle loop decr */
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addib,COND(>) -1, %r29, fdtmanymiddle /* Middle loop decr */
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copy %arg3, %r31 /* Re-init inner loop count */
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movb,tr %arg0, %r28, fdtmanyloop /* Re-init base addr */
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ADDIB<=,n -1, %r22,fdtdone /* Outer loop count decr */
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addib,COND(<=),n -1, %r22,fdtdone /* Outer loop count decr */
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|
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fdtoneloop: /* Loop if LOOP = 1 */
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mtsp %r20, %sr1
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|
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@ -153,10 +154,10 @@ fdtoneloop: /* Loop if LOOP = 1 */
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copy %arg2, %r29 /* init middle loop count */
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|
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fdtonemiddle: /* Loop if LOOP = 1 */
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ADDIB> -1, %r29, fdtonemiddle /* Middle loop count decr */
|
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addib,COND(>) -1, %r29, fdtonemiddle /* Middle loop count decr */
|
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pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */
|
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|
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ADDIB> -1, %r22, fdtoneloop /* Outer loop count decr */
|
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addib,COND(>) -1, %r22, fdtoneloop /* Outer loop count decr */
|
||||
add %r21, %r20, %r20 /* increment space */
|
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|
||||
|
||||
|
|
@ -209,18 +210,18 @@ ENTRY(flush_instruction_cache_local)
|
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LDREG ICACHE_COUNT(%r1), %arg2
|
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LDREG ICACHE_LOOP(%r1), %arg3
|
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rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
|
||||
ADDIB= -1, %arg3, fioneloop /* Preadjust and test */
|
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addib,COND(=) -1, %arg3, fioneloop /* Preadjust and test */
|
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movb,<,n %arg3, %r31, fisync /* If loop < 0, do sync */
|
||||
|
||||
fimanyloop: /* Loop if LOOP >= 2 */
|
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ADDIB> -1, %r31, fimanyloop /* Adjusted inner loop decr */
|
||||
addib,COND(>) -1, %r31, fimanyloop /* Adjusted inner loop decr */
|
||||
fice %r0(%sr1, %arg0)
|
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fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */
|
||||
movb,tr %arg3, %r31, fimanyloop /* Re-init inner loop count */
|
||||
ADDIB<=,n -1, %arg2, fisync /* Outer loop decr */
|
||||
addib,COND(<=),n -1, %arg2, fisync /* Outer loop decr */
|
||||
|
||||
fioneloop: /* Loop if LOOP = 1 */
|
||||
ADDIB> -1, %arg2, fioneloop /* Outer loop count decr */
|
||||
addib,COND(>) -1, %arg2, fioneloop /* Outer loop count decr */
|
||||
fice,m %arg1(%sr1, %arg0) /* Fice for one loop */
|
||||
|
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fisync:
|
||||
|
|
@ -250,18 +251,18 @@ ENTRY(flush_data_cache_local)
|
|||
LDREG DCACHE_COUNT(%r1), %arg2
|
||||
LDREG DCACHE_LOOP(%r1), %arg3
|
||||
rsm PSW_SM_I, %r22
|
||||
ADDIB= -1, %arg3, fdoneloop /* Preadjust and test */
|
||||
addib,COND(=) -1, %arg3, fdoneloop /* Preadjust and test */
|
||||
movb,<,n %arg3, %r31, fdsync /* If loop < 0, do sync */
|
||||
|
||||
fdmanyloop: /* Loop if LOOP >= 2 */
|
||||
ADDIB> -1, %r31, fdmanyloop /* Adjusted inner loop decr */
|
||||
addib,COND(>) -1, %r31, fdmanyloop /* Adjusted inner loop decr */
|
||||
fdce %r0(%sr1, %arg0)
|
||||
fdce,m %arg1(%sr1, %arg0) /* Last fdce and addr adjust */
|
||||
movb,tr %arg3, %r31, fdmanyloop /* Re-init inner loop count */
|
||||
ADDIB<=,n -1, %arg2, fdsync /* Outer loop decr */
|
||||
addib,COND(<=),n -1, %arg2, fdsync /* Outer loop decr */
|
||||
|
||||
fdoneloop: /* Loop if LOOP = 1 */
|
||||
ADDIB> -1, %arg2, fdoneloop /* Outer loop count decr */
|
||||
addib,COND(>) -1, %arg2, fdoneloop /* Outer loop count decr */
|
||||
fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */
|
||||
|
||||
fdsync:
|
||||
|
|
@ -342,7 +343,7 @@ ENTRY(copy_user_page_asm)
|
|||
* non-taken backward branch. Note that .+4 is a backwards branch.
|
||||
* The ldd should only get executed if the branch is taken.
|
||||
*/
|
||||
ADDIB>,n -1, %r1, 1b /* bundle 10 */
|
||||
addib,COND(>),n -1, %r1, 1b /* bundle 10 */
|
||||
ldd 0(%r25), %r19 /* start next loads */
|
||||
|
||||
#else
|
||||
|
|
@ -391,7 +392,7 @@ ENTRY(copy_user_page_asm)
|
|||
stw %r21, 56(%r26)
|
||||
stw %r22, 60(%r26)
|
||||
ldo 64(%r26), %r26
|
||||
ADDIB>,n -1, %r1, 1b
|
||||
addib,COND(>),n -1, %r1, 1b
|
||||
ldw 0(%r25), %r19
|
||||
#endif
|
||||
bv %r0(%r2)
|
||||
|
|
@ -515,7 +516,7 @@ ENTRY(copy_user_page_asm)
|
|||
stw %r21, 56(%r28)
|
||||
stw %r22, 60(%r28)
|
||||
ldo 64(%r28), %r28
|
||||
ADDIB> -1, %r1,1b
|
||||
addib,COND(>) -1, %r1,1b
|
||||
ldo 64(%r29), %r29
|
||||
|
||||
bv %r0(%r2)
|
||||
|
|
@ -574,7 +575,7 @@ ENTRY(__clear_user_page_asm)
|
|||
std %r0, 104(%r28)
|
||||
std %r0, 112(%r28)
|
||||
std %r0, 120(%r28)
|
||||
ADDIB> -1, %r1, 1b
|
||||
addib,COND(>) -1, %r1, 1b
|
||||
ldo 128(%r28), %r28
|
||||
|
||||
#else /* ! CONFIG_64BIT */
|
||||
|
|
@ -597,7 +598,7 @@ ENTRY(__clear_user_page_asm)
|
|||
stw %r0, 52(%r28)
|
||||
stw %r0, 56(%r28)
|
||||
stw %r0, 60(%r28)
|
||||
ADDIB> -1, %r1, 1b
|
||||
addib,COND(>) -1, %r1, 1b
|
||||
ldo 64(%r28), %r28
|
||||
#endif /* CONFIG_64BIT */
|
||||
|
||||
|
|
@ -640,7 +641,7 @@ ENTRY(flush_kernel_dcache_page_asm)
|
|||
fdc,m %r23(%r26)
|
||||
fdc,m %r23(%r26)
|
||||
fdc,m %r23(%r26)
|
||||
CMPB<< %r26, %r25,1b
|
||||
cmpb,COND(<<) %r26, %r25,1b
|
||||
fdc,m %r23(%r26)
|
||||
|
||||
sync
|
||||
|
|
@ -683,7 +684,7 @@ ENTRY(flush_user_dcache_page)
|
|||
fdc,m %r23(%sr3, %r26)
|
||||
fdc,m %r23(%sr3, %r26)
|
||||
fdc,m %r23(%sr3, %r26)
|
||||
CMPB<< %r26, %r25,1b
|
||||
cmpb,COND(<<) %r26, %r25,1b
|
||||
fdc,m %r23(%sr3, %r26)
|
||||
|
||||
sync
|
||||
|
|
@ -726,7 +727,7 @@ ENTRY(flush_user_icache_page)
|
|||
fic,m %r23(%sr3, %r26)
|
||||
fic,m %r23(%sr3, %r26)
|
||||
fic,m %r23(%sr3, %r26)
|
||||
CMPB<< %r26, %r25,1b
|
||||
cmpb,COND(<<) %r26, %r25,1b
|
||||
fic,m %r23(%sr3, %r26)
|
||||
|
||||
sync
|
||||
|
|
@ -769,7 +770,7 @@ ENTRY(purge_kernel_dcache_page)
|
|||
pdc,m %r23(%r26)
|
||||
pdc,m %r23(%r26)
|
||||
pdc,m %r23(%r26)
|
||||
CMPB<< %r26, %r25, 1b
|
||||
cmpb,COND(<<) %r26, %r25, 1b
|
||||
pdc,m %r23(%r26)
|
||||
|
||||
sync
|
||||
|
|
@ -833,7 +834,7 @@ ENTRY(flush_alias_page)
|
|||
fdc,m %r23(%r28)
|
||||
fdc,m %r23(%r28)
|
||||
fdc,m %r23(%r28)
|
||||
CMPB<< %r28, %r29, 1b
|
||||
cmpb,COND(<<) %r28, %r29, 1b
|
||||
fdc,m %r23(%r28)
|
||||
|
||||
sync
|
||||
|
|
@ -856,7 +857,7 @@ flush_user_dcache_range_asm:
|
|||
ldo -1(%r23), %r21
|
||||
ANDCM %r26, %r21, %r26
|
||||
|
||||
1: CMPB<<,n %r26, %r25, 1b
|
||||
1: cmpb,COND(<<),n %r26, %r25, 1b
|
||||
fdc,m %r23(%sr3, %r26)
|
||||
|
||||
sync
|
||||
|
|
@ -877,7 +878,7 @@ ENTRY(flush_kernel_dcache_range_asm)
|
|||
ldo -1(%r23), %r21
|
||||
ANDCM %r26, %r21, %r26
|
||||
|
||||
1: CMPB<<,n %r26, %r25,1b
|
||||
1: cmpb,COND(<<),n %r26, %r25,1b
|
||||
fdc,m %r23(%r26)
|
||||
|
||||
sync
|
||||
|
|
@ -899,7 +900,7 @@ ENTRY(flush_user_icache_range_asm)
|
|||
ldo -1(%r23), %r21
|
||||
ANDCM %r26, %r21, %r26
|
||||
|
||||
1: CMPB<<,n %r26, %r25,1b
|
||||
1: cmpb,COND(<<),n %r26, %r25,1b
|
||||
fic,m %r23(%sr3, %r26)
|
||||
|
||||
sync
|
||||
|
|
@ -942,7 +943,7 @@ ENTRY(flush_kernel_icache_page)
|
|||
fic,m %r23(%sr4, %r26)
|
||||
fic,m %r23(%sr4, %r26)
|
||||
fic,m %r23(%sr4, %r26)
|
||||
CMPB<< %r26, %r25, 1b
|
||||
cmpb,COND(<<) %r26, %r25, 1b
|
||||
fic,m %r23(%sr4, %r26)
|
||||
|
||||
sync
|
||||
|
|
@ -963,7 +964,7 @@ ENTRY(flush_kernel_icache_range_asm)
|
|||
ldo -1(%r23), %r21
|
||||
ANDCM %r26, %r21, %r26
|
||||
|
||||
1: CMPB<<,n %r26, %r25, 1b
|
||||
1: cmpb,COND(<<),n %r26, %r25, 1b
|
||||
fic,m %r23(%sr4, %r26)
|
||||
|
||||
sync
|
||||
|
|
|
|||
|
|
@ -20,6 +20,8 @@
|
|||
*/
|
||||
|
||||
#include <asm/assembly.h>
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
|
|
@ -41,7 +43,7 @@
|
|||
; The coprocessor only needs to be enabled when
|
||||
; starting/stopping the coprocessor with the pmenb/pmdis.
|
||||
;
|
||||
.text
|
||||
__HEAD
|
||||
|
||||
ENTRY(perf_intrigue_enable_perf_counters)
|
||||
.proc
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <asm/assembly.h>
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
.section .bss
|
||||
.export real_stack
|
||||
|
|
@ -39,7 +40,7 @@ save_cr_end:
|
|||
/************************ 32-bit real-mode calls ***********************/
|
||||
/* This can be called in both narrow and wide kernels */
|
||||
|
||||
.text
|
||||
__HEAD
|
||||
|
||||
/* unsigned long real32_call_asm(unsigned int *sp,
|
||||
* unsigned int *arg0p,
|
||||
|
|
@ -113,7 +114,7 @@ ENDPROC(real32_call_asm)
|
|||
# define PUSH_CR(r, where) mfctl r, %r1 ! STREG,ma %r1, REG_SZ(where)
|
||||
# define POP_CR(r, where) LDREG,mb -REG_SZ(where), %r1 ! mtctl %r1, r
|
||||
|
||||
.text
|
||||
__HEAD
|
||||
save_control_regs:
|
||||
load32 PA(save_cr_space), %r28
|
||||
PUSH_CR(%cr24, %r28)
|
||||
|
|
@ -145,7 +146,7 @@ restore_control_regs:
|
|||
/* rfi_virt2real() and rfi_real2virt() could perhaps be adapted for
|
||||
* more general-purpose use by the several places which need RFIs
|
||||
*/
|
||||
.text
|
||||
__HEAD
|
||||
.align 128
|
||||
rfi_virt2real:
|
||||
/* switch to real mode... */
|
||||
|
|
@ -180,7 +181,7 @@ rfi_v2r_1:
|
|||
bv 0(%r2)
|
||||
nop
|
||||
|
||||
.text
|
||||
__HEAD
|
||||
.align 128
|
||||
rfi_real2virt:
|
||||
rsm PSW_SM_I,%r0
|
||||
|
|
@ -218,7 +219,7 @@ rfi_r2v_1:
|
|||
|
||||
/************************ 64-bit real-mode calls ***********************/
|
||||
/* This is only usable in wide kernels right now and will probably stay so */
|
||||
.text
|
||||
__HEAD
|
||||
/* unsigned long real64_call_asm(unsigned long *sp,
|
||||
* unsigned long *arg0p,
|
||||
* unsigned long fn)
|
||||
|
|
@ -276,7 +277,7 @@ ENDPROC(real64_call_asm)
|
|||
|
||||
#endif
|
||||
|
||||
.text
|
||||
__HEAD
|
||||
/* http://lists.parisc-linux.org/hypermail/parisc-linux/10916.html
|
||||
** GCC 3.3 and later has a new function in libgcc.a for
|
||||
** comparing function pointers.
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#include <asm/processor.h>
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
/* We fill the empty parts of the gateway page with
|
||||
* something that will kill the kernel or a
|
||||
|
|
@ -26,7 +27,7 @@
|
|||
|
||||
.level LEVEL
|
||||
|
||||
.text
|
||||
__HEAD
|
||||
|
||||
.import syscall_exit,code
|
||||
.import syscall_exit_rfi,code
|
||||
|
|
@ -636,7 +637,7 @@ END(sys_call_table64)
|
|||
All light-weight-syscall atomic operations
|
||||
will use this set of locks
|
||||
*/
|
||||
.section .data
|
||||
.section .data, "aw"
|
||||
.align PAGE_SIZE
|
||||
ENTRY(lws_lock_start)
|
||||
/* lws locks */
|
||||
|
|
|
|||
|
|
@ -275,7 +275,7 @@ KERN_CRIT " || ||\n");
|
|||
|
||||
/* Wot's wrong wif bein' racy? */
|
||||
if (current->thread.flags & PARISC_KERNEL_DEATH) {
|
||||
printk(KERN_CRIT "%s() recursion detected.\n", __FUNCTION__);
|
||||
printk(KERN_CRIT "%s() recursion detected.\n", __func__);
|
||||
local_irq_enable();
|
||||
while (1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
/* #define DEBUG_UNALIGNED 1 */
|
||||
|
||||
#ifdef DEBUG_UNALIGNED
|
||||
#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __FUNCTION__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
|
||||
#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __func__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
|
||||
#else
|
||||
#define DPRINTF(fmt, args...)
|
||||
#endif
|
||||
|
|
@ -460,7 +460,8 @@ void handle_unaligned(struct pt_regs *regs)
|
|||
goto force_sigbus;
|
||||
}
|
||||
|
||||
if (unaligned_count > 5 && jiffies - last_time > 5*HZ) {
|
||||
if (unaligned_count > 5 &&
|
||||
time_after(jiffies, last_time + 5 * HZ)) {
|
||||
unaligned_count = 0;
|
||||
last_time = jiffies;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#include <asm/assembly.h>
|
||||
#include <asm/errno.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
.macro get_fault_ip t1 t2
|
||||
|
|
@ -55,7 +56,7 @@
|
|||
|
||||
.level LEVEL
|
||||
|
||||
.text
|
||||
__HEAD
|
||||
.section .fixup, "ax"
|
||||
|
||||
/* get_user() fixups, store -EFAULT in r8, and 0 in r9 */
|
||||
|
|
|
|||
|
|
@ -33,11 +33,12 @@
|
|||
*/
|
||||
|
||||
|
||||
.text
|
||||
|
||||
#include <asm/assembly.h>
|
||||
#include <asm/errno.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
__HEAD
|
||||
|
||||
/*
|
||||
* get_sr gets the appropriate space value into
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ DECLARE_PER_CPU(struct exception_data, exception_data);
|
|||
#define THRESHOLD 16
|
||||
|
||||
#ifdef DEBUG_MEMCPY
|
||||
#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __FUNCTION__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
|
||||
#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __func__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
|
||||
#else
|
||||
#define DPRINTF(fmt, args...)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -555,8 +555,6 @@ void show_mem(void)
|
|||
|
||||
printk(KERN_INFO "Mem-info:\n");
|
||||
show_free_areas();
|
||||
printk(KERN_INFO "Free swap: %6ldkB\n",
|
||||
nr_swap_pages<<(PAGE_SHIFT-10));
|
||||
#ifndef CONFIG_DISCONTIGMEM
|
||||
i = max_mapnr;
|
||||
while (i-- > 0) {
|
||||
|
|
|
|||
Loading…
Reference in a new issue