From 726ff832d382768bc033e1cfd9f53091289c5295 Mon Sep 17 00:00:00 2001
From: Naman Padhiar <npadhiar@qti.qualcomm.com>
Date: Fri, 3 Sep 2021 18:19:44 +0530
Subject: [PATCH] ARM: dts: msm: Add CNSS DT Node for HSP support

Add CNSS DT node and enable other nodes for HSP
support in Yupik MCC.

Change-Id: Ica348afd9cf3a9973b187171485d0f0518662a60
---
 qcom/yupik-hsp.dtsi             | 23 ++++++++++++
 qcom/yupik-idp-hsp-overlay.dts  |  1 +
 qcom/yupik-idp-hsp.dtsi         | 62 +++++++++++++++++++++++++++++++++
 qcom/yupikp-idp-hsp-overlay.dts |  1 +
 4 files changed, 87 insertions(+)

diff --git a/qcom/yupik-hsp.dtsi b/qcom/yupik-hsp.dtsi
index 662c0725b7ae..cc8df8e0eb0f 100644
--- a/qcom/yupik-hsp.dtsi
+++ b/qcom/yupik-hsp.dtsi
@@ -1,3 +1,26 @@
 #include "yupik.dtsi"
 / {
 };
+
+&gcc {
+	clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
+		<&usb3_phy_wrapper_gcc_usb30_pipe_clk>,
+		<&pcie_0_pipe_clk>, <&pcie_1_pipe_clk>;
+	clock-names = "bi_tcxo", "sleep_clk",
+		"usb3_phy_wrapper_gcc_usb30_pipe_clk",
+		"pcie_0_pipe_clk", "pcie_1_pipe_clk";
+
+	/delete-property/ protected-clocks;
+};
+
+&gcc_pcie_0_gdsc {
+	status = "ok";
+};
+
+&gcc_pcie_1_gdsc {
+	status = "ok";
+};
+
+&gcc_usb30_sec_gdsc {
+	status = "ok";
+};
diff --git a/qcom/yupik-idp-hsp-overlay.dts b/qcom/yupik-idp-hsp-overlay.dts
index f0dfb995e4a4..0b78f806c06b 100644
--- a/qcom/yupik-idp-hsp-overlay.dts
+++ b/qcom/yupik-idp-hsp-overlay.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 /plugin/;
 
+#include <dt-bindings/interconnect/qcom,yupik.h>
 #include "yupik-idp-hsp.dtsi"
 
 / {
diff --git a/qcom/yupik-idp-hsp.dtsi b/qcom/yupik-idp-hsp.dtsi
index 885e5af51402..2bcd7f793027 100644
--- a/qcom/yupik-idp-hsp.dtsi
+++ b/qcom/yupik-idp-hsp.dtsi
@@ -1,4 +1,66 @@
 #include "yupik-idp.dtsi"
+#include "qcx6490-cnss.dtsi"
+
+&wlan {
+	qcom,same-dt-multi-dev;
+};
+
+&pcie0 {
+	status = "ok";
+};
+
+&pcie0_msi {
+	status = "ok";
+};
+
+&pcie1 {
+	status = "ok";
+	qcom,boot-option = <0x0>;
+	qcom,ep-gpio = <&tlmm 19 0>;
+	pinctrl-0 = <&pcie1_perst_default
+			&pcie1_clkreq_default
+			&pcie1_wake_default
+			&pcie1_ep_default>;
+	pinctrl-1 = <&pcie1_perst_default
+			&pcie1_clkreq_sleep
+			&pcie1_wake_default
+			&pcie1_ep_default>;
+};
+
+&pcie1_msi {
+	status = "ok";
+};
+
+&pm7325_gpios {
+	usb2_vbus_boost {
+		usb2_vbus_boost_default: usb2_vbus_boost_default {
+			pins = "gpio8";
+			function = "normal";
+			output-low;
+			power-source = <0>;	/* 1.8V input supply */
+		};
+	};
+};
 
 &soc {
+	usb2_vbus_boost_reg: usb2_vbus_boost_reg {
+		compatible = "regulator-fixed";
+		regulator-name = "usb2_vbus_boost_vreg";
+		startup-delay-us = <4000>;
+		enable-active-high;
+		gpios = <&pm7325_gpios 8 0>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb2_vbus_boost_default>;
+	};
+};
+
+&usb1 {
+	vbus_dwc3-supply = <&usb2_vbus_boost_reg>;
+	qcom,default-mode-none;
+	status = "ok";
+};
+
+&usb2_phy1 {
+	status = "ok";
 };
diff --git a/qcom/yupikp-idp-hsp-overlay.dts b/qcom/yupikp-idp-hsp-overlay.dts
index 44bc8f59298f..da2b428bc2ed 100644
--- a/qcom/yupikp-idp-hsp-overlay.dts
+++ b/qcom/yupikp-idp-hsp-overlay.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 /plugin/;
 
+#include <dt-bindings/interconnect/qcom,yupik.h>
 #include "yupikp-idp-hsp.dtsi"
 
 / {