From 6db1bb6ad4c0166fcd1fea2f91c60671af982e30 Mon Sep 17 00:00:00 2001 From: Jagadeesh Kona Date: Thu, 17 Dec 2020 17:33:41 +0530 Subject: [PATCH] ARM: dts: msm: Update clocks and clock-names of GCC node for YUPIK Update the clocks and clock-names of GCC node to have all GCC external clocks. Change-Id: I8b25e58fb59b7d93e95baa1cc5f15958231ad892 --- qcom/yupik-rumi.dtsi | 6 +++++- qcom/yupik.dtsi | 12 ++++++++++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/qcom/yupik-rumi.dtsi b/qcom/yupik-rumi.dtsi index 9ef144149b00..34e49bd40431 100644 --- a/qcom/yupik-rumi.dtsi +++ b/qcom/yupik-rumi.dtsi @@ -167,7 +167,11 @@ }; &gcc { - clocks = <&bi_tcxo>, <&sleep_clk>; + clocks = <&bi_tcxo>, + <&sleep_clk>, + <&pcie_0_pipe_clk>, + <&pcie_1_pipe_clk>, + <&usb3_phy_wrapper_gcc_usb30_pipe_clk>; }; &gpucc { diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi index 28df86a51168..ef8134229467 100644 --- a/qcom/yupik.dtsi +++ b/qcom/yupik.dtsi @@ -631,8 +631,16 @@ reg = <0x100000 0x1f0000>; reg-names = "cc_base"; vdd_cx-supply = <&VDD_CX_LEVEL>; - clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; - clock-names = "bi_tcxo", "sleep_clk"; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, + <&pcie_0_pipe_clk>, + <&pcie_1_pipe_clk>, + <&usb3_phy_wrapper_gcc_usb30_pipe_clk>; + clock-names = "bi_tcxo", + "sleep_clk", + "pcie_0_pipe_clk", + "pcie_1_pipe_clk", + "usb3_phy_wrapper_gcc_usb30_pipe_clk"; #clock-cells = <1>; #reset-cells = <1>; };