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ARM: dts: msm: Add vidc node for SA6155

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add 6150 vidc node for sa6155.

Change-Id: Icfa71d10342f56ef18a4552b9f79881046feaf8b
This commit is contained in:
Laisheng Hu 2020-10-23 08:27:18 +08:00 • committed by Bo Fang
commit 72b904f26b
3 changed files with 105 additions and 0 deletions
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1
bindings/media/video/msm-vidc.txt
View file

@ -12,6 +12,7 @@ Required properties:
- "qcom,yupik-vidc" : Invokes driver-specific data for YUPIK.
- "qcom,sm8150-vidc" : Invokes driver specific data for SM8150.
- "qcom,scshrike-vidc" : Invokes driver specific data for SA8195.
- "qcom,sm6150-vidc" : Invokes driver specific data for SA6155.
Optional properties:
- vidc,firmware-name : Video Firmware ELF image name to be loaded by PIL

103
qcom/sm6150-vidc.dtsi Normal file
View file

@ -0,0 +1,103 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-sm6150.h>
#include <dt-bindings/clock/qcom,videocc-sm6150.h>
&soc {
msm_vidc: qcom,vidc@aa00000 {
compatible = "qcom,msm-vidc", "qcom,sm6150-vidc";
status = "ok"
reg = <0xaa00000 0x200000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
/* Supply */
venus-supply = <&venus_gdsc>;
venus-core0-supply = <&vcodec0_gdsc>;
/* Clocks */
clock-names = "core_clk", "iface_clk", "bus_clk",
"core0_clk", "core0_bus_clk";
clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
<&videocc VIDEO_CC_VENUS_AHB_CLK>,
<&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
<&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
<&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
qcom,proxy-clock-names = "core_clk", "iface_clk",
"bus_clk", "core0_clk", "core0_bus_clk";
qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0>;
qcom,allowed-clock-rates = <133330000 240000000 300000000
380000000 410000000>;
/* Bus Interconnects */
interconnect-names = "venus-cnoc", "venus-ddr", "venus-arm9-ddr";
interconnects = <&gem_noc MASTER_APPSS_PROC
&config_noc SLAVE_VENUS_CFG>,
<&mmss_noc MASTER_VIDEO_P0
&mc_virt SLAVE_EBI1>,
<&mmss_noc MASTER_VIDEO_P0
&mc_virt SLAVE_EBI1>;
/* Bus BW range (low, high) for each bus */
qcom,bus-range-kbps = <1000 1000
1000 2128000
1000 1000>;
/* MMUs */
non_secure_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_ns";
iommus =
<&apps_smmu 0xE40 0x20>;
qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-pagetable = "LLC";
buffer-types = <0xfff>;
virtual-addr-pool = <0x70800000 0x6f800000>;
dma-coherent-hint-cached;
};
secure_bitstream_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_sec_bitstream";
iommus =
<&apps_smmu 0xE61 0x4>;
qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-pagetable = "LLC";
qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/
buffer-types = <0x241>;
virtual-addr-pool = <0x4b000000 0x25800000>;
qcom,secure-context-bank;
};
secure_pixel_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_sec_pixel";
iommus =
<&apps_smmu 0xE63 0x0>;
qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-pagetable = "LLC";
qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/
buffer-types = <0x106>;
virtual-addr-pool = <0x25800000 0x25800000>;
qcom,secure-context-bank;
};
secure_non_pixel_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_sec_non_pixel";
iommus =
<&apps_smmu 0xE44 0x20>;
qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-pagetable = "LLC";
qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/
buffer-types = <0x480>;
virtual-addr-pool = <0x1000000 0x24800000>;
qcom,secure-context-bank;
};
};
};

1
qcom/sm6150.dtsi
View file

@ -1953,3 +1953,4 @@
#include "msm-arm-smmu-sm6150.dtsi"
#include "sm6150-slpi-pinctrl.dtsi"
#include "sm6150-usb.dtsi"
#include "sm6150-vidc.dtsi"