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[ARM] 3829/1: iop3xx: optimise irq entry macros

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Squeeze three instructions out of the iop32x irq demuxer, and nine
out of the iop33x irq demuxer by using the hardware vector generator.

Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Russell King <[email protected]>
This commit is contained in:
Lennert Buytenhek 2006-09-18 23:24:10 +01:00 • committed by Russell King
commit 7412b10f79
3 changed files with 24 additions and 24 deletions
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10
include/asm-arm/arch-iop32x/entry-macro.S
View file

@ -16,13 +16,9 @@
* Note: only deal with normal interrupts, not FIQ
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0
ldr \base, =IOP3XX_REG_ADDR(0x07D8)
ldr \irqstat, [\base] @ Read IINTSRC
cmp \irqstat, #0
beq 1001f
clz \irqnr, \irqstat
mov \base, #31
subs \irqnr,\base,\irqnr
1001:
cmp \irqstat, #0
clzne \irqnr, \irqstat
rsbne \irqnr, \irqnr, #31
.endm

22
include/asm-arm/arch-iop33x/entry-macro.S
View file

@ -12,23 +12,11 @@
.macro disable_fiq
.endm
/*
* Note: only deal with normal interrupts, not FIQ
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0
ldr \base, =IOP3XX_REG_ADDR(0x7A0)
ldr \irqstat, [\base] @ Read IINTSRC0
cmp \irqstat, #0
bne 1002f
ldr \irqstat, [\base, #4] @ Read IINTSRC1
ldr \base, =IOP3XX_REG_ADDR(0x07C8)
ldr \irqstat, [\base] @ Read IINTVEC
cmp \irqstat, #0
beq 1001f
clz \irqnr, \irqstat
rsbs \irqnr,\irqnr,#31 @ recommend by RMK
add \irqnr,\irqnr,#IRQ_IOP331_XINT8
b 1001f
1002: clz \irqnr, \irqstat
rsbs \irqnr,\irqnr,#31 @ recommend by RMK
1001:
ldreq \irqstat, [\base] @ erratum 63 workaround
adds \irqnr, \irqstat, #1
movne \irqnr, \irqstat, lsr #2
.endm