ARM: dts: msm: Add mdp_intf base address in dt

This change adds mdp_intf_base address entry for
dsi0 and dsi1 on shima, holi and lahaina targets.

Change-Id: I56c118884690237e0559e928c4828fe575adf98c
This commit is contained in:
Lipsa Rout 2020-11-04 16:56:52 +05:30
commit 745cefb9c4
3 changed files with 15 additions and 10 deletions

View file

@ -173,8 +173,9 @@
cell-index = <0>;
frame-threshold-time-us = <1000>;
reg = <0x05e94000 0x400>,
<0x05f08000 0x4>;
reg-names = "dsi_ctrl", "disp_cc_base";
<0x05f08000 0x4>,
<0x05e6b800 0x300>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
interrupt-parent = <&mdss_mdp>;
interrupts = <4 0>;

View file

@ -283,8 +283,9 @@
cell-index = <0>;
frame-threshold-time-us = <800>;
reg = <0xae94000 0x400>,
<0xaf08000 0x4>;
reg-names = "dsi_ctrl", "disp_cc_base";
<0xaf08000 0x4>,
<0x0ae36000 0x300>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
interrupt-parent = <&mdss_mdp>;
interrupts = <4 0>;
@ -322,8 +323,9 @@
cell-index = <1>;
frame-threshold-time-us = <800>;
reg = <0xae96000 0x400>,
<0xaf08000 0x4>;
reg-names = "dsi_ctrl", "disp_cc_base";
<0xaf08000 0x4>,
<0x0ae37000 0x300>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
interrupt-parent = <&mdss_mdp>;
interrupts = <5 0>;

View file

@ -241,8 +241,9 @@
cell-index = <0>;
frame-threshold-time-us = <800>;
reg = <0xae94000 0x400>,
<0xaf08000 0x4>;
reg-names = "dsi_ctrl", "disp_cc_base";
<0xaf08000 0x4>,
<0x0ae6b800 0x300>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
interrupt-parent = <&mdss_mdp>;
interrupts = <4 0>;
@ -281,8 +282,9 @@
cell-index = <1>;
frame-threshold-time-us = <800>;
reg = <0xae96000 0x400>,
<0xaf08000 0x4>;
reg-names = "dsi_ctrl", "disp_cc_base";
<0xaf08000 0x4>,
<0x0ae6c000 0x300>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base";
interrupt-parent = <&mdss_mdp>;
interrupts = <5 0>;