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drm/amdgpu: add register headers for DCN 1.0
Registers for Display Controller Next 1.0 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_default.h
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drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_default.h
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drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h
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drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_offset.h
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drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h
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drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_sh_mask.h
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