diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index 35ec64303b18..733aae9d850e 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -1,3 +1,10 @@ +#include +#include +#include +#include +#include +#include +#include #include #include "lahaina-regulators.dtsi" @@ -283,4 +290,84 @@ status = "disabled"; }; }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + clock-output-names = "xo_board"; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32764>; + }; + }; + + cxo: bi_tcxo { + compatible = "fixed-factor-clock"; + clocks = <&xo_board>; + clock-mult = <1>; + clock-div = <2>; + #clock-cells = <0>; + clock-output-names = "bi_tcxo"; + }; + + cxo_a: bi_tcxo_ao { + compatible = "fixed-factor-clock"; + clocks = <&xo_board>; + clock-mult = <1>; + clock-div = <2>; + #clock-cells = <0>; + clock-output-names = "bi_tcxo_ao"; + }; + + clock_rpmh: qcom,rpmhclk { + compatible = "qcom,dummycc"; + clock-output-names = "rpmh_clocks"; + #clock-cells = <1>; + }; + + clock_aop: qcom,aopclk { + compatible = "qcom,dummycc"; + clock-output-names = "qdss_clocks"; + #clock-cells = <1>; + }; + + clock_gcc: qcom,gcc { + compatible = "qcom,dummycc"; + clock-output-names = "gcc_clocks"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + clock_videocc: qcom,videocc { + compatible = "qcom,dummycc"; + clock-output-names = "videocc_clocks"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + clock_camcc: qcom,camcc { + compatible = "qcom,dummycc"; + clock-output-names = "camcc_clocks"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + clock_dispcc: qcom,dispcc { + compatible = "qcom,dummycc"; + clock-output-names = "dispcc_clocks"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + clock_gpucc: qcom,gpucc { + compatible = "qcom,dummycc"; + clock-output-names = "gpucc_clocks"; + #clock-cells = <1>; + #reset-cells = <1>; + }; };