From 75c33c1145c81dd32e56248fca39cd6893a0c9db Mon Sep 17 00:00:00 2001
From: Lina Iyer <ilina@quicinc.com>
Date: Tue, 25 Jun 2019 11:38:49 -0600
Subject: [PATCH] ARM: dts: msm: add PDC device bindings for Lahaina

Add DT bindings for PDC irqchip for Lahaina SoC.

Change-Id: Ida976271823b4b5162efa977c898291a7af4b1f4
---
 qcom/lahaina.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index 066d44a8bd32..2fea4485ef0b 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -688,6 +688,18 @@
 		memory-region = <&smem_mem>;
 		hwlocks = <&tcsr_mutex 3>;
 	};
+
+	pdc: interrupt-controller@b220000 {
+		compatible = "qcom,lahaina-pdc";
+		reg = <0xb220000 0x30000>, <0x17c000f0 0x60>;
+		qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>,
+				  <59 312 3>, <62 374 2>, <64 434 2>, <66 438 3>,
+				  <69 86 1>, <70 520 54>, <124 609 31>, <155 63 1>,
+				  <156 716 12>;
+		#interrupt-cells = <2>;
+		interrupt-parent = <&intc>;
+		interrupt-controller;
+	};
 };
 
 #include "lahaina-pinctrl.dtsi"