diff --git a/qcom/blair-bangkk-common-overlay.dtsi b/qcom/blair-bangkk-common-overlay.dtsi index b6046434d0ad..1fefa49b4db7 100644 --- a/qcom/blair-bangkk-common-overlay.dtsi +++ b/qcom/blair-bangkk-common-overlay.dtsi @@ -20,7 +20,6 @@ #include "bangkk-display.dtsi" #include "bangkk-touchscreen.dtsi" #include "bangkk-sensors.dtsi" -#include "camera/blair-camera-sensor-mot-bangkk-overlay.dtsi" #include "bangkk-wl286xx.dtsi" #include "moto_therm_sys_temp.dtsi" diff --git a/qcom/blair-pm6125-bangkk-common-overlay.dtsi b/qcom/blair-pm6125-bangkk-common-overlay.dtsi index 5a152b48afa2..571ee83d1d85 100644 --- a/qcom/blair-pm6125-bangkk-common-overlay.dtsi +++ b/qcom/blair-pm6125-bangkk-common-overlay.dtsi @@ -9,7 +9,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include "blair-milanf-common-overlay.dtsi" +#include "blair-bangkk-common-overlay.dtsi" #include "blair-pm6125-moto-common-overlay.dtsi" &pm7250b_charger { diff --git a/qcom/holi-audio-bangkk-overlay.dtsi b/qcom/holi-audio-bangkk-overlay.dtsi new file mode 100644 index 000000000000..d1412105625e --- /dev/null +++ b/qcom/holi-audio-bangkk-overlay.dtsi @@ -0,0 +1,394 @@ +#include +#include +#include +#include +#include + +&tlmm{ + aw882xx_irq_default: aw882xx_irq_default { + mux { + pins = "gpio59"; + function = "gpio"; + }; + config { + pins = "gpio59"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; +}; + +&cdc_dmic01_gpios { + status = "disabled"; +}; + +&cdc_dmic23_gpios { + status = "disabled"; +}; + +&rx_swr_gpios { + status = "okay"; +}; + +&dai_mi2s0_rx { + status = "okay"; + qcom,msm-mi2s-lines = <1>; +}; + +&dai_mi2s0_tx { + status = "okay"; + qcom,msm-mi2s-lines = <0>; +}; + +&dai_mi2s1_rx { + status = "okay"; + qcom,msm-mi2s-lines = <1>; +}; + +&dai_mi2s1_tx { + status = "okay"; + qcom,msm-mi2s-lines = <2>; +}; + +&dai_mi2s2_rx { + status = "okay"; + qcom,msm-mi2s-lines = <1>; +}; + +&dai_mi2s2_tx { + status = "okay"; + qcom,msm-mi2s-lines = <0>; +}; + +&dai_mi2s3_rx { + status = "okay"; + qcom,msm-mi2s-lines = <1>; +}; + +&dai_mi2s3_tx { + status = "okay"; + qcom,msm-mi2s-lines = <0>; +}; + +&q6core { + cdc_sec_mi2s_gpios: cdc_sec_mi2s_gpios { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active + &lpi_i2s2_sd0_active &lpi_i2s2_sd1_active>; + pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep + &lpi_i2s2_sd0_sleep &lpi_i2s2_sd1_sleep>; + qcom,lpi-gpios; + #gpio-cells = <0>; + }; +}; + +&bolero { + qcom,num-macros = <3>; + qcom,bolero-version = <5>; + #address-cells = <1>; + #size-cells = <1>; + bolero-clk-rsc-mngr { + compatible = "qcom,bolero-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x0A5640D8>; + qcom,va_mclk_mode_muxsel = <0x0A7A0000>; + clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk", + "va_core_clk", "va_npl_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>, + <&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>, + <&clock_audio_va_1 0>, <&clock_audio_va_2 0>; + }; + + va_macro: va-macro@A730000 { + compatible = "qcom,va-macro"; + reg = <0xA730000 0x0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,va-dmic-sample-rate = <600000>; + qcom,default-clk-id = ; + qcom,is-used-swr-gpio = <1>; + qcom,va-swr-gpios = <&va_swr_gpios>; + swr0: va_swr_master { + compatible = "qcom,swr-mstr"; + qcom,is_wcd937x = <1>; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <3>; + qcom,swrm-hctl-reg = <0x0A7EC100>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0xA740000 0x0>; + interrupts-extended = + <&wakegic 5 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 128 GPIO_ACTIVE_HIGH>; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-num-ports = <3>; + qcom,swr-port-mapping = <1 SWRM_TX1_CH1 0x1>, + <1 SWRM_TX1_CH2 0x2>, + <1 SWRM_TX1_CH3 0x4>, <1 SWRM_TX1_CH4 0x8>, + <2 SWRM_TX2_CH1 0x1>, <2 SWRM_TX2_CH2 0x2>, + <2 SWRM_TX2_CH3 0x4>, <2 SWRM_TX2_CH4 0x8>, + <3 SWRM_TX3_CH1 0x1>, <3 SWRM_TX3_CH2 0x2>, + <3 SWRM_TX3_CH3 0x4>, <3 SWRM_TX3_CH4 0x8>; + qcom,swr-num-dev = <1>; + qcom,swr-phy-dev-addr = <0x0A 0x01170223>, + <0x08 0x58350223>, + <0x08 0x58350222>, + <0x08 0x58350221>, + <0x08 0x58350220>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + qcom,is-always-on = <1>; + wcd937x_tx_slave: wcd937x-tx-slave { + compatible = "qcom,wcd937x-slave"; + reg = <0x0A 0x01170223>; + }; + }; + }; + + tx_macro: tx-macro@A620000 { + compatible = "qcom,tx-macro"; + reg = <0xA620000 0x0>; + clock-names = "tx_core_clk", "tx_npl_clk"; + clocks = <&clock_audio_tx_1 0>, + <&clock_audio_tx_2 0>; + qcom,tx-dmic-sample-rate = <2400000>; + qcom,is-used-swr-gpio = <0>; + }; + + rx_macro: rx-macro@A600000 { + compatible = "qcom,rx-macro"; + reg = <0xA600000 0x0>; + clock-names = "rx_core_clk", "rx_npl_clk"; + clocks = <&clock_audio_rx_1 0>, + <&clock_audio_rx_2 0>; + qcom,rx-swr-gpios = <&rx_swr_gpios>; + qcom,rx_mclk_mode_muxsel = <0xA5640D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + swr1: rx_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <2>; + qcom,swrm-hctl-reg = <0x0A6A9098>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0xA610000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <6>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x1>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>, <6 PCM_OUT1 0x01>; + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; + wcd937x_rx_slave: wcd937x-rx-slave { + compatible = "qcom,wcd937x-slave"; + reg = <0x0A 0x01170224>; + }; + }; + }; + + wcd937x_codec: wcd937x-codec { + compatible = "qcom,wcd937x-codec"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>; + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <1 ADC2 0x1 0 SWRM_TX2_CH1>, + <1 ADC3 0x2 0 SWRM_TX2_CH2>, + <2 DMIC0 0x1 0 SWRM_TX1_CH4>, + <2 DMIC1 0x2 0 SWRM_TX2_CH1>, + <2 MBHC 0x4 0 SWRM_TX2_CH2>, + <3 DMIC2 0x1 0 SWRM_TX2_CH3>, + <3 DMIC3 0x2 0 SWRM_TX2_CH4>, + <3 DMIC4 0x4 0 SWRM_TX3_CH1>, + <3 DMIC5 0x8 0 SWRM_TX3_CH2>; + + qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>; + qcom,rx-slave = <&wcd937x_rx_slave>; + qcom,tx-slave = <&wcd937x_tx_slave>; + + cdc-vdd-rxtx-supply = <&L11A>; + qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rxtx-current = <30000>; + + cdc-vddpx-supply = <&L11A>; + qcom,cdc-vddpx-voltage = <1800000 1800000>; + qcom,cdc-vddpx-current = <30000>; + + cdc-vdd-buck-supply = <&L14A>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <45000>; + + qcom,cdc-micbias1-mv = <2800>; + qcom,cdc-micbias2-mv = <2800>; + qcom,cdc-micbias3-mv = <2800>; + + qcom,cdc-static-supplies = "cdc-vdd-rxtx", + "cdc-vddpx", + "cdc-vdd-mic-bias"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + }; +}; + +&holi_snd { + qcom,model = "holi-9370_aw882xx-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>; + qcom,wcn-btfm = <1>; + qcom,tdm-max-slots = <4>; + qcom,sec-mi2s-gpios = <&cdc_sec_mi2s_gpios>; + + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "Analog Mic1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "Analog Mic2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "Analog Mic3", "MIC BIAS3", + "Analog Mic4", "MIC BIAS3", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS1", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS1", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS3", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS3", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC4", "Digital Mic4", + "VA DMIC5", "Digital Mic5", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", + "VA DMIC3", "VA MIC BIAS3"; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + asoc-codec = <&stub_codec>, <&bolero>, + <&wcd937x_codec>,<&aw882xxacf>; + asoc-codec-names = "msm-stub-codec.1", "bolero_codec", + "wcd937x_codec", "aw882xx_codec"; + qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>, + <&bolero>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <2700>; + qcom,msm-mbhc-hs-mic-min-threshold-mv = <116>; +}; + +&qupv3_se10_i2c { + status = "ok"; + aw882xxacf: aw882xxacf_smartpa@34 { + compatible = "awinic,aw882xxacf_smartpa"; + reg = <0x34>; + pinctrl-names = "default"; + pinctrl-0 = <&aw882xx_irq_default>; + irq-gpio = <&tlmm 59 0x2008>; + dc-flag = <0>; + sound-channel = <0>; + aw-tx-topo-id = <0x1000ff00>; + aw-rx-topo-id = <0x1000ff01>; + aw-rx-port-id = <0x1002>; + aw-tx-port-id = <0x1003>; + aw-re-min = <4000>; + aw-re-max = <30000>; + aw-cali-mode = "aw_attr"; + status = "okay"; + }; +}; + +&va_cdc_dma_0_tx { + qcom,msm-dai-is-island-supported = <1>; +}; + +&soc { + wcd937x_rst_gpio: msm_cdc_pinctrl@32 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd937x_reset_active>; + pinctrl-1 = <&wcd937x_reset_sleep>; + }; + + clock_audio_rx_1: rx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30E>; + #clock-cells = <1>; + }; + + clock_audio_rx_2: rx_npl_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30F>; + #clock-cells = <1>; + }; + + clock_audio_tx_1: tx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30C>; + #clock-cells = <1>; + }; + + clock_audio_tx_2: tx_npl_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30D>; + #clock-cells = <1>; + }; + + clock_audio_va_1: va_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30B>; + #clock-cells = <1>; + }; + + clock_audio_va_2: va_npl_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x310>; + #clock-cells = <1>; + }; +}; + +&adsp_loader { + nvmem-cells = <&adsp_variant>; + nvmem-cell-names = "adsp_variant"; + adsp-fw-names = "adsp2"; + adsp-fw-bit-values = <0x1>; +};