From 768d25aa4c9a34301d3bd89f78ef27f644596b3f Mon Sep 17 00:00:00 2001
From: Lina Iyer <ilina@quicinc.com>
Date: Wed, 12 Aug 2020 16:12:50 -0600
Subject: [PATCH] ARM: dts: msm: update cpuidle state definitions

Update CPU definitions to specify cpu power down state.

Change-Id: Ib0f63b72f7ae58ae00f320f0e9b068cc92a94011
---
 qcom/trustedvm.dtsi | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/qcom/trustedvm.dtsi b/qcom/trustedvm.dtsi
index 1441d7dc09de..6767a62922c8 100644
--- a/qcom/trustedvm.dtsi
+++ b/qcom/trustedvm.dtsi
@@ -29,7 +29,7 @@
 			reg = <0x0 0x0>;
 			device_type = "cpu";
 			enable-method = "psci";
-			cpu-idle-states = <0x2>;
+			cpu-idle-states = <&CPU_PWR_DWN>;
 		};
 
 		CPU1: cpu@100 {
@@ -37,9 +37,20 @@
 			reg = <0x0 0x100>;
 			device_type = "cpu";
 			enable-method = "psci";
-			cpu-idle-states = <0x2>;
+			cpu-idle-states = <&CPU_PWR_DWN>;
 		};
+	};
 
+	idle-states {
+		CPU_PWR_DWN: c4 {  /* Using Gold C4 latencies */
+			compatible = "arm,idle-state";
+			idle-state-name = "rail-pc";
+			entry-latency-us = <702>;
+			exit-latency-us = <1061>;
+			min-residency-us = <4488>;
+			arm,psci-suspend-param = <0x40000004>;
+			local-timer-stop;
+		};
 	};
 
 	neuron-client-block {