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himax_mmi: update version

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Update himax driver version for selftest.
Vendor driver version is 1.2.2.50_moto_02

Change-Id: I66d15240d7e6fab0c9d64ef2b76b0082a219a9ae
Signed-off-by: haojl2 <haojl2@motorola.com>
Reviewed-on: https://gerrit.mot.com/1219600
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Jianqi Yang <yangj@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
haojl2 2018-08-02 14:54:47 +08:00 • committed by Jialei Hao
commit 77178b3ee1
15 changed files with 10681 additions and 10361 deletions
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7
drivers/input/touchscreen/himax_mmi/Kbuild
View file

@ -2,13 +2,16 @@
EXTRA_CFLAGS += -Wall
EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include \
-I$(TOP)/motorola/kernel/modules/drivers/input/touchscreen/himax_mmi
EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG
EXTRA_CFLAGS += -DCONFIG_TOUCHSCREEN_HIMAX_DEBUG \
-DCONFIG_TOUCHSCREEN_HIMAX_INSPECT
ifeq ($(filter m y, $(CONFIG_TOUCHSCREEN_HIMAX_CHIPSET)),)
obj-m := himax_mmi.o
endif
himax_mmi-objs += himax_ic_HX83112.o
himax_mmi-objs += himax_platform.o
himax_mmi-objs += himax_ic.o
himax_mmi-objs += himax_inspection.o
himax_mmi-objs += himax_ic_incell_core.o
himax_mmi-objs += himax_common.o
himax_mmi-objs += himax_debug.o

4131
drivers/input/touchscreen/himax_mmi/himax_common.c
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File diff suppressed because it is too large Load diff

536
drivers/input/touchscreen/himax_mmi/himax_common.h
View file

@ -1,16 +1,16 @@
/* Himax Android Driver Sample Code for common functions
*
* Copyright (C) 2017 Himax Corporation.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
/* Himax Android Driver Sample Code for common functions
Copyright (C) 2018 Himax Corporation.
This software is licensed under the terms of the GNU General Public
License version 2, as published by the Free Software Foundation, and
may be copied, distributed, and modified under those terms.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
*/
#ifndef HIMAX_COMMON_H
@ -40,87 +40,74 @@
#include "himax_platform.h"
#if defined(CONFIG_FB)
#include <linux/notifier.h>
#include <linux/fb.h>
#include <linux/notifier.h>
#include <linux/fb.h>
#elif defined(CONFIG_HAS_EARLYSUSPEND)
#include <linux/earlysuspend.h>
#include <linux/earlysuspend.h>
#endif
#ifdef CONFIG_OF
#include <linux/of_gpio.h>
#include <linux/of_gpio.h>
#endif
#define HIMAX_DRIVER_VER "0.2.13.0_ABCD1234_01"
#define HIMAX_DRIVER_VER "1.2.2.50_moto_02"
#define FLASH_DUMP_FILE "/sdcard/HX_Flash_Dump.bin"
#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
#define HX_TP_PROC_DIAG
#define HX_TP_PROC_REGISTER
#define HX_TP_PROC_DEBUG
#define HX_TP_PROC_FLASH_DUMP
#define HX_TP_PROC_SELF_TEST
#define HX_TP_PROC_RESET
#define HX_TP_PROC_SENSE_ON_OFF
#define HX_TP_PROC_2T2R
//#define HX_TP_PROC_GUEST_INFO
#ifdef HX_TP_PROC_SELF_TEST
//#define HX_TP_SELF_TEST_DRIVER //if enable, selftest works in driver
#define HX_ORG_SELFTEST
//#define HX_INSPECT_LPWUG_TEST
//#define HX_DOZE_TEST
#define HX_TP_PROC_2T2R
/*#define HX_TP_SELF_TEST_DRIVER*/ /*if enable, selftest works in driver*/
#endif
int himax_touch_proc_init(void);
void himax_touch_proc_deinit(void);
#endif
//===========Himax Option function=============
/*===========Himax Option function=============*/
#define HX_RST_PIN_FUNC
#define HX_RESUME_SEND_CMD
#define HX_ESD_RECOVERY
//#define HX_AUTO_UPDATE_FW
//#define HX_CHIP_STATUS_MONITOR /*for ESD 2nd solution,it does not support incell,default off*/
//#define HX_SMART_WAKEUP
//#define HX_GESTURE_TRACK
//#define HX_HIGH_SENSE
//#define HX_PALM_REPORT
//#define HX_USB_DETECT_GLOBAL
//#define HX_USB_DETECT_CALLBACK
//#define HX_PROTOCOL_A /* for MTK special platform.If turning on,it will report to system by using specific format. */
//#define HX_RESUME_HW_RESET
/*#define HX_AUTO_UPDATE_FW*/
/*#define HX_SMART_WAKEUP*/
/*#define HX_GESTURE_TRACK*/
/*#define HX_HIGH_SENSE*/
/*#define HX_PALM_REPORT*/
/*#define HX_USB_DETECT_GLOBAL*/
/*#define HX_USB_DETECT_CALLBACK*/
/*#define HX_PROTOCOL_A*/ /* for MTK special platform.If turning on,it will report to system by using specific format. */
/*#define HX_RESUME_HW_RESET*/
#define HX_PROTOCOL_B_3PA
//#define HX_FIX_TOUCH_INFO /* if open, you need to change the touch info in the fix_touch_info*/
/*#define HX_FIX_TOUCH_INFO*/ /* if open, you need to change the touch info in the fix_touch_info*/
/*#define HX_ZERO_FLASH*/
/*#define CONFIG_CHIP_DTCFG*/
/*#undef CONFIG_FB*/ /* Enable it if driver go into suspend/resume twice */
//#define HX_EN_SEL_BUTTON /* Support Self Virtual key ,default is close*/
//#define HX_EN_MUT_BUTTON /* Support Mutual Virtual Key ,default is close*/
/*#define HX_EN_SEL_BUTTON*/ /* Support Self Virtual key ,default is close*/
/*#define HX_EN_MUT_BUTTON*/ /* Support Mutual Virtual Key ,default is close*/
#if defined(HX_EN_SEL_BUTTON) || defined(HX_EN_MUT_BUTTON)
//#define HX_PLATFOME_DEFINE_KEY /* for specfic platform to set key(button) */
/*#define HX_PLATFOME_DEFINE_KEY*/ /* for specfic platform to set key(button) */
#endif
#define HX_KEY_MAX_COUNT 4
#define DEFAULT_RETRY_CNT 3
#define HX_85XX_A_SERIES_PWON 1
#define HX_85XX_B_SERIES_PWON 2
#define HX_85XX_C_SERIES_PWON 3
#define HX_85XX_D_SERIES_PWON 4
#define HX_85XX_E_SERIES_PWON 5
#define HX_85XX_ES_SERIES_PWON 6
#define HX_85XX_F_SERIES_PWON 7
#define HX_85XX_G_SERIES_PWON 8
#define HX_85XX_H_SERIES_PWON 9
#define HX_83100A_SERIES_PWON 10
#define HX_83102A_SERIES_PWON 11
#define HX_83102B_SERIES_PWON 12
#define HX_83103A_SERIES_PWON 13
#define HX_83110A_SERIES_PWON 14
#define HX_83110B_SERIES_PWON 15
#define HX_83111B_SERIES_PWON 16
#define HX_83112A_SERIES_PWON 17
#define HX_83112B_SERIES_PWON 18
#define HX_83191_SERIES_PWON 19
#define HX_85XX_A_SERIES_PWON "HX85xxA"
#define HX_85XX_B_SERIES_PWON "HX85xxB"
#define HX_85XX_C_SERIES_PWON "HX85xxC"
#define HX_85XX_D_SERIES_PWON "HX85xxD"
#define HX_85XX_E_SERIES_PWON "HX85xxE"
#define HX_85XX_ES_SERIES_PWON "HX85xxES"
#define HX_85XX_F_SERIES_PWON "HX85xxF"
#define HX_85XX_H_SERIES_PWON "HX85xxH"
#define HX_83100A_SERIES_PWON "HX83100A"
#define HX_83102A_SERIES_PWON "HX83102A"
#define HX_83102B_SERIES_PWON "HX83102B"
#define HX_83102D_SERIES_PWON "HX83102D"
#define HX_83103A_SERIES_PWON "HX83103A"
#define HX_83110A_SERIES_PWON "HX83110A"
#define HX_83110B_SERIES_PWON "HX83110B"
#define HX_83111B_SERIES_PWON "HX83111B"
#define HX_83112A_SERIES_PWON "HX83112A"
#define HX_83112B_SERIES_PWON "HX83112B"
#define HX_83112D_SERIES_PWON "HX83112D"
#define HX_83112E_SERIES_PWON "HX83112E"
#define HX_83191A_SERIES_PWON "HX83191A"
#define HX_TP_BIN_CHECKSUM_SW 1
#define HX_TP_BIN_CHECKSUM_HW 2
@ -146,169 +133,214 @@ void himax_touch_proc_deinit(void);
#define LENGTH_FAIL -7
#define OPEN_FILE_FAIL -8
#define ERR_WORK_OUT -10
#define ERR_STS_WRONG -11
#define HW_CRC_FAIL 1
#define HX_FINGER_ON 1
#define HX_FINGER_LEAVE 2
#define HX_REPORT_COORD 1
#define HX_REPORT_SMWP_EVENT 2
#define HX_FILENAME_SIZE 80
#if defined(HX_PALM_REPORT)
#define PALM_REPORT 1
#define NOT_REPORT -1
#endif
enum HX_TS_PATH {
HX_REPORT_COORD = 1,
HX_REPORT_SMWP_EVENT,
HX_REPORT_COORD_RAWDATA,
};
enum HX_TS_STATUS {
HX_TS_GET_DATA_FAIL = -4,
HX_ESD_EVENT,
HX_CHKSUM_FAIL,
HX_PATH_FAIL,
HX_TS_NORMAL_END = 0,
HX_ESD_REC_OK,
HX_READY_SERVE,
HX_REPORT_DATA,
HX_ESD_WARNING,
HX_IC_RUNNING,
HX_ZERO_EVENT_COUNT,
HX_RST_OK,
};
enum cell_type {
CHIP_IS_ON_CELL,
CHIP_IS_IN_CELL
};
#ifdef HX_FIX_TOUCH_INFO
enum fix_touch_info
{
FIX_HX_RX_NUM = 0,
FIX_HX_TX_NUM = 0,
FIX_HX_BT_NUM = 0,
FIX_HX_X_RES = 0,
FIX_HX_Y_RES = 0,
FIX_HX_MAX_PT = 0,
FIX_HX_XY_REVERSE = false,
FIX_HX_INT_IS_EDGE = true,
enum fix_touch_info {
FIX_HX_RX_NUM = 36,
FIX_HX_TX_NUM = 18,
FIX_HX_BT_NUM = 0,
FIX_HX_X_RES = 720,
FIX_HX_Y_RES = 1520,
FIX_HX_MAX_PT = 10,
FIX_HX_XY_REVERSE = true,
FIX_HX_INT_IS_EDGE = true,
#ifdef HX_TP_PROC_2T2R
FIX_HX_RX_NUM_2 = 0,
FIX_HX_TX_NUM_2 = 0
FIX_HX_RX_NUM_2 = 0,
FIX_HX_TX_NUM_2 = 0,
#endif
};
#endif
#ifdef HX_ZERO_FLASH
#define HX_0F_DEBUG
#define HX_SPI_OPERATION
#define HX_0F_DEBUG
#endif
struct himax_ic_data
{
int vendor_fw_ver;
int vendor_config_ver;
int vendor_touch_cfg_ver;
int vendor_display_cfg_ver;
int vendor_cid_maj_ver;
int vendor_cid_min_ver;
int vendor_panel_ver;
int vendor_sensor_id;
int HX_RX_NUM;
int HX_TX_NUM;
int HX_BT_NUM;
int HX_X_RES;
int HX_Y_RES;
int HX_MAX_PT;
bool HX_XY_REVERSE;
bool HX_INT_IS_EDGE;
struct himax_ic_data {
int vendor_fw_ver;
int vendor_config_ver;
int vendor_touch_cfg_ver;
int vendor_display_cfg_ver;
int vendor_cid_maj_ver;
int vendor_cid_min_ver;
int vendor_panel_ver;
int vendor_sensor_id;
int HX_RX_NUM;
int HX_TX_NUM;
int HX_BT_NUM;
int HX_X_RES;
int HX_Y_RES;
int HX_MAX_PT;
bool HX_XY_REVERSE;
bool HX_INT_IS_EDGE;
#ifdef HX_TP_PROC_2T2R
int HX_RX_NUM_2;
int HX_TX_NUM_2;
int HX_RX_NUM_2;
int HX_TX_NUM_2;
#endif
};
struct himax_virtual_key
{
int index;
int keycode;
int x_range_min;
int x_range_max;
int y_range_min;
int y_range_max;
struct himax_virtual_key {
int index;
int keycode;
int x_range_min;
int x_range_max;
int y_range_min;
int y_range_max;
};
struct himax_report_data
{
int touch_all_size;
int raw_cnt_max;
int raw_cnt_rmd;
int touch_info_size;
uint8_t finger_num;
uint8_t finger_on;
uint8_t *hx_coord_buf;
uint8_t hx_state_info[2];
struct himax_target_report_data {
int *x;
int *y;
int *w;
int *finger_id;
int finger_on;
int finger_num;
#ifdef HX_PLATFORM_DEFINE_KEY
int key_size;
int *key_x;
int *key_y;
int *key_w;
#endif
#ifdef HX_SMART_WAKEUP
int SMWP_event_chk;
#endif
};
struct himax_report_data {
int touch_all_size;
int raw_cnt_max;
int raw_cnt_rmd;
int touch_info_size;
uint8_t finger_num;
uint8_t finger_on;
uint8_t *hx_coord_buf;
uint8_t hx_state_info[2];
#if defined(HX_SMART_WAKEUP)
int event_size;
uint8_t *hx_event_buf;
#endif
#if defined(HX_TP_PROC_DIAG)
int rawdata_size;
uint8_t diag_cmd;
uint8_t *hx_rawdata_buf;
uint8_t rawdata_frame_size;
int event_size;
uint8_t *hx_event_buf;
#endif
int rawdata_size;
uint8_t diag_cmd;
uint8_t *hx_rawdata_buf;
uint8_t rawdata_frame_size;
};
struct himax_ts_data
{
bool suspended;
bool force_update;
atomic_t suspend_mode;
atomic_t flash_mode;
uint8_t x_channel;
uint8_t y_channel;
uint8_t useScreenRes;
uint8_t diag_command;
struct himax_ts_data {
bool suspended;
bool force_update;
atomic_t suspend_mode;
atomic_t flash_mode;
uint8_t x_channel;
uint8_t y_channel;
uint8_t useScreenRes;
uint8_t diag_cmd;
char chip_name[30];
uint8_t chip_cell_type;
uint8_t protocol_type;
uint8_t first_pressed;
uint8_t coord_data_size;
uint8_t area_data_size;
uint8_t coordInfoSize;
uint8_t raw_data_frame_size;
uint8_t raw_data_nframes;
uint8_t nFinger_support;
uint8_t irq_enabled;
uint8_t diag_self[50];
uint8_t protocol_type;
uint8_t first_pressed;
uint8_t coord_data_size;
uint8_t area_data_size;
uint8_t coordInfoSize;
uint8_t raw_data_frame_size;
uint8_t raw_data_nframes;
uint8_t nFinger_support;
uint8_t irq_enabled;
uint8_t diag_self[50];
uint16_t finger_pressed;
uint16_t last_slot;
uint16_t pre_finger_mask;
uint16_t finger_pressed;
uint16_t last_slot;
uint16_t pre_finger_mask;
uint16_t old_finger;
int hx_point_num;
uint32_t debug_log_level;
uint32_t widthFactor;
uint32_t heightFactor;
uint32_t tw_x_min;
uint32_t tw_x_max;
uint32_t tw_y_min;
uint32_t tw_y_max;
uint32_t pl_x_min;
uint32_t pl_x_max;
uint32_t pl_y_min;
uint32_t pl_y_max;
int rst_gpio;
int use_irq;
int (*power)(int on);
int pre_finger_data[10][2];
uint32_t debug_log_level;
uint32_t widthFactor;
uint32_t heightFactor;
uint32_t tw_x_min;
uint32_t tw_x_max;
uint32_t tw_y_min;
uint32_t tw_y_max;
uint32_t pl_x_min;
uint32_t pl_x_max;
uint32_t pl_y_min;
uint32_t pl_y_max;
struct device *dev;
struct workqueue_struct *himax_wq;
struct work_struct work;
struct input_dev *input_dev;
struct hrtimer timer;
struct i2c_client *client;
struct himax_i2c_platform_data *pdata;
struct himax_virtual_key *button;
struct mutex rw_lock;
int rst_gpio;
int use_irq;
int (*power)(int on);
int pre_finger_data[10][2];
struct device *dev;
struct workqueue_struct *himax_wq;
struct work_struct work;
struct input_dev *input_dev;
struct hrtimer timer;
struct i2c_client *client;
struct himax_i2c_platform_data *pdata;
struct himax_virtual_key *button;
struct mutex rw_lock;
/******* SPI-start *******/
struct mutex spi_lock;
struct spi_device *spi;
int hx_irq;
/******* SPI-end *******/
int in_self_test;
#if defined(CONFIG_FB)
struct notifier_block fb_notif;
struct workqueue_struct *himax_att_wq;
struct delayed_work work_att;
struct notifier_block fb_notif;
struct workqueue_struct *himax_att_wq;
struct delayed_work work_att;
#elif defined(CONFIG_HAS_EARLYSUSPEND)
struct early_suspend early_suspend;
#endif
#ifdef HX_CHIP_STATUS_MONITOR
struct workqueue_struct *himax_chip_monitor_wq;
struct delayed_work himax_chip_monitor;
#endif
#ifdef HX_TP_PROC_FLASH_DUMP
struct workqueue_struct *flash_wq;
struct work_struct flash_work;
#endif
#ifdef HX_TP_PROC_GUEST_INFO
struct workqueue_struct *guest_info_wq;
struct work_struct guest_info_work;
struct early_suspend early_suspend;
#endif
struct workqueue_struct *flash_wq;
struct work_struct flash_work;
#ifdef HX_AUTO_UPDATE_FW
struct workqueue_struct *himax_update_wq;
struct delayed_work work_update;
struct workqueue_struct *himax_update_wq;
struct delayed_work work_update;
#endif
#ifdef HX_ZERO_FLASH
@ -316,120 +348,56 @@ struct himax_ts_data
struct delayed_work work_0f_update;
#endif
#ifdef HX_TP_PROC_DIAG
struct workqueue_struct *himax_diag_wq;
struct delayed_work himax_diag_delay_wrok;
#endif
struct workqueue_struct *himax_diag_wq;
struct delayed_work himax_diag_delay_wrok;
#ifdef HX_SMART_WAKEUP
uint8_t SMWP_enable;
uint8_t gesture_cust_en[16];
struct wake_lock ts_SMWP_wake_lock;
uint8_t SMWP_enable;
uint8_t gesture_cust_en[26];
struct wake_lock ts_SMWP_wake_lock;
#endif
#ifdef HX_HIGH_SENSE
uint8_t HSEN_enable;
uint8_t HSEN_enable;
#endif
#if defined(HX_USB_DETECT_CALLBACK)||defined(HX_USB_DETECT_GLOBAL)
uint8_t usb_connected;
uint8_t *cable_config;
#if defined(HX_USB_DETECT_CALLBACK) || defined(HX_USB_DETECT_GLOBAL)
uint8_t usb_connected;
uint8_t *cable_config;
#endif
#if defined(CONFIG_TOUCHSCREEN_HIMAX_ITO_TEST)
struct workqueue_struct *ito_test_wq;
struct work_struct ito_test_work;
#endif
};
#ifdef HX_CHIP_STATUS_MONITOR
struct chip_monitor_data
{
int HX_CHIP_POLLING_COUNT;
int HX_POLLING_TIMER;//unit:sec
int HX_POLLING_TIMES;//ex:5(timer)x2(times)=10sec(polling time)
int HX_ON_HAND_SHAKING;//
int HX_CHIP_MONITOR_EN;
struct himax_debug {
bool flash_dump_going;
void (*fp_ts_dbg_func)(struct himax_ts_data *ts, int start);
int (*fp_set_diag_cmd)(struct himax_ic_data *ic_data, struct himax_report_data *hx_touch_data);
};
#endif
enum input_protocol_type
{
PROTOCOL_TYPE_A = 0x00,
PROTOCOL_TYPE_B = 0x01,
enum input_protocol_type {
PROTOCOL_TYPE_A = 0x00,
PROTOCOL_TYPE_B = 0x01,
};
#ifdef HX_HIGH_SENSE
void himax_set_HSEN_func(struct i2c_client *client,uint8_t HSEN_enable);
void himax_set_HSEN_func(uint8_t HSEN_enable);
#endif
#ifdef HX_SMART_WAKEUP
void himax_set_SMWP_func(uint8_t SMWP_enable);
#define GEST_PTLG_ID_LEN (4)
#define GEST_PTLG_HDR_LEN (4)
#define GEST_PTLG_HDR_ID1 (0xCC)
#define GEST_PTLG_HDR_ID2 (0x44)
#define GEST_PT_MAX_NUM (128)
void himax_set_SMWP_func(struct i2c_client *client,uint8_t SMWP_enable);
enum gesture_event_type
{
EV_GESTURE_01 = 0x01,
EV_GESTURE_02,
EV_GESTURE_03,
EV_GESTURE_04,
EV_GESTURE_05,
EV_GESTURE_06,
EV_GESTURE_07,
EV_GESTURE_08,
EV_GESTURE_09,
EV_GESTURE_10,
EV_GESTURE_11,
EV_GESTURE_12,
EV_GESTURE_13,
EV_GESTURE_14,
EV_GESTURE_15,
EV_GESTURE_PWR = 0x80,
};
#define KEY_CUST_01 251
#define KEY_CUST_02 252
#define KEY_CUST_03 253
#define KEY_CUST_04 254
#define KEY_CUST_05 255
#define KEY_CUST_06 256
#define KEY_CUST_07 257
#define KEY_CUST_08 258
#define KEY_CUST_09 259
#define KEY_CUST_10 260
#define KEY_CUST_11 261
#define KEY_CUST_12 262
#define KEY_CUST_13 263
#define KEY_CUST_14 264
#define KEY_CUST_15 265
#endif
#if defined(CONFIG_TOUCHSCREEN_HIMAX_ITO_TEST)
extern uint8_t himax_ito_test(void);
#endif
#if defined(HX_SMART_WAKEUP) || defined(HX_INSPECT_LPWUG_TEST)
extern bool FAKE_POWER_KEY_SEND;
#endif
extern int irq_enable_count;
//void himax_HW_reset(uint8_t loadconfig,uint8_t int_off);
/*void himax_HW_reset(uint8_t loadconfig,uint8_t int_off);*/
#ifdef QCT
irqreturn_t himax_ts_thread(int irq, void *ptr);
int himax_input_register(struct himax_ts_data *ts);
#endif
extern int himax_chip_common_probe(struct i2c_client *client, const struct i2c_device_id *id);
extern int himax_chip_common_remove(struct i2c_client *client);
extern int himax_chip_common_suspend(struct himax_ts_data *ts);
extern int himax_chip_common_resume(struct himax_ts_data *ts);

4970
drivers/input/touchscreen/himax_mmi/himax_debug.c
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184
drivers/input/touchscreen/himax_mmi/himax_debug.h
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@ -1,16 +1,16 @@
/* Himax Android Driver Sample Code for debug nodes
*
* Copyright (C) 2017 Himax Corporation.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
/* Himax Android Driver Sample Code for debug nodes
Copyright (C) 2018 Himax Corporation.
This software is licensed under the terms of the GNU General Public
License version 2, as published by the Free Software Foundation, and
may be copied, distributed, and modified under those terms.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
*/
#ifndef H_HIMAX_DEBUG
#define H_HIMAX_DEBUG
@ -20,14 +20,12 @@
#ifdef HX_ESD_RECOVERY
extern u8 HX_ESD_RESET_ACTIVATE;
extern int hx_EB_event_flag;
extern int hx_EC_event_flag;
extern int hx_ED_event_flag;
extern u8 HX_ESD_RESET_ACTIVATE;
extern int hx_EB_event_flag;
extern int hx_EC_event_flag;
extern int hx_ED_event_flag;
#endif
#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
#define HIMAX_PROC_TOUCH_FOLDER "android_touch"
#define HIMAX_PROC_DEBUG_LEVEL_FILE "debug_level"
#define HIMAX_PROC_VENDOR_FILE "vendor"
#define HIMAX_PROC_ATTN_FILE "attn"
@ -35,47 +33,23 @@ extern int hx_ED_event_flag;
#define HIMAX_PROC_LAYOUT_FILE "layout"
#define HIMAX_PROC_CRC_TEST_FILE "CRC_test"
static struct proc_dir_entry *himax_touch_proc_dir = NULL;
static struct proc_dir_entry *himax_proc_debug_level_file = NULL;
static struct proc_dir_entry *himax_proc_vendor_file = NULL;
static struct proc_dir_entry *himax_proc_attn_file = NULL;
static struct proc_dir_entry *himax_proc_int_en_file = NULL;
static struct proc_dir_entry *himax_proc_layout_file = NULL;
static struct proc_dir_entry *himax_proc_CRC_test_file = NULL;
static struct proc_dir_entry *himax_proc_debug_level_file;
static struct proc_dir_entry *himax_proc_vendor_file;
static struct proc_dir_entry *himax_proc_attn_file;
static struct proc_dir_entry *himax_proc_int_en_file;
static struct proc_dir_entry *himax_proc_layout_file;
static struct proc_dir_entry *himax_proc_CRC_test_file;
uint8_t HX_PROC_SEND_FLAG;
int himax_touch_proc_init(void);
void himax_touch_proc_deinit(void);
extern int himax_int_en_set(void);
extern int himax_touch_proc_init(void);
extern void himax_touch_proc_deinit(void);
bool getFlashDumpGoing(void);
extern int himax_int_en_set(struct i2c_client *client);
#ifdef HX_TP_PROC_GUEST_INFO
#define HIMAX_PROC_GUEST_INFO_FILE "guest_info"
static struct proc_dir_entry *himax_proc_guest_info_file = NULL;
#endif
#if defined(CONFIG_TOUCHSCREEN_HIMAX_ITO_TEST)
#define HIMAX_PROC_ITO_TEST_FILE "ITO_test"
static struct proc_dir_entry *himax_proc_ito_test_file = NULL;
extern void ito_set_step_status(uint8_t status);
extern uint8_t ito_get_step_status(void);
extern void ito_set_result_status(uint8_t status);
extern uint8_t ito_get_result_status(void);
#endif
#ifdef HX_TP_PROC_REGISTER
#define HIMAX_PROC_REGISTER_FILE "register"
struct proc_dir_entry *himax_proc_register_file = NULL;
uint8_t byte_length = 0;
uint8_t register_command[4];
bool cfg_flag = false;
#endif
uint8_t cfg_flag = 0;
#ifdef HX_TP_PROC_DIAG
#define HIMAX_PROC_DIAG_FILE "diag"
struct proc_dir_entry *himax_proc_diag_file = NULL;
#define HIMAX_PROC_DIAG_ARR_FILE "diag_arr"
@ -86,133 +60,95 @@ uint8_t write_max_count = 30;
#define IIR_DUMP_FILE "/sdcard/HX_IIR_Dump.txt"
#define DC_DUMP_FILE "/sdcard/HX_DC_Dump.txt"
#define BANK_DUMP_FILE "/sdcard/HX_BANK_Dump.txt"
#ifdef HX_TP_PROC_2T2R
static uint8_t x_channel_2 = 0;
static uint8_t y_channel_2 = 0;
static uint32_t *diag_mutual_2 = NULL;
int32_t *getMutualBuffer_2(void);
uint8_t getXChannel_2(void);
uint8_t getYChannel_2(void);
void setMutualBuffer_2(void);
void setXChannel_2(uint8_t x);
void setYChannel_2(uint8_t y);
static uint8_t x_channel_2;
static uint8_t y_channel_2;
static uint32_t *diag_mutual_2;
int32_t *getMutualBuffer_2(void);
uint8_t getXChannel_2(void);
uint8_t getYChannel_2(void);
void setMutualBuffer_2(void);
void setXChannel_2(uint8_t x);
void setYChannel_2(uint8_t y);
#endif
uint8_t x_channel = 0;
uint8_t y_channel = 0;
int32_t *diag_mutual = NULL;
int32_t *diag_mutual_new = NULL;
int32_t *diag_mutual_old = NULL;
int32_t *diag_mutual = NULL;
int32_t *diag_mutual_new = NULL;
int32_t *diag_mutual_old = NULL;
uint8_t diag_max_cnt = 0;
uint8_t hx_state_info[2] = {0};
int g_diag_command = 0;
uint8_t diag_coor[128];// = {0xFF};
int32_t diag_self[100] = {0};
int32_t *getMutualBuffer(void);
int32_t *getMutualNewBuffer(void);
int32_t *getMutualOldBuffer(void);
int32_t *getSelfBuffer(void);
uint8_t getDiagCommand(void);
uint8_t diag_coor[128];
int32_t diag_self[100] = {0};
int32_t diag_self_new[100] = {0};
int32_t diag_self_old[100] = {0};
int32_t *getMutualBuffer(void);
int32_t *getMutualNewBuffer(void);
int32_t *getMutualOldBuffer(void);
int32_t *getSelfBuffer(void);
int32_t *getSelfNewBuffer(void);
int32_t *getSelfOldBuffer(void);
uint8_t getXChannel(void);
uint8_t getYChannel(void);
void setMutualBuffer(void);
void setMutualNewBuffer(void);
void setMutualOldBuffer(void);
void setXChannel(uint8_t x);
void setYChannel(uint8_t y);
#endif
#ifdef HX_TP_PROC_DEBUG
#define HIMAX_PROC_DEBUG_FILE "debug"
struct proc_dir_entry *himax_proc_debug_file = NULL;
#define HIMAX_PROC_FW_DEBUG_FILE "FW_debug"
struct proc_dir_entry *himax_proc_fw_debug_file = NULL;
#define HIMAX_PROC_DD_DEBUG_FILE "DD_debug"
struct proc_dir_entry *himax_proc_dd_debug_file = NULL;
bool fw_update_complete = false;
int handshaking_result = 0;
unsigned char debug_level_cmd = 0;
unsigned char upgrade_fw[128*1024];
uint8_t cmd_set[8];
uint8_t mutual_set_flag = 0;
#endif
#ifdef HX_TP_PROC_FLASH_DUMP
#define HIMAX_PROC_FLASH_DUMP_FILE "flash_dump"
struct proc_dir_entry *himax_proc_flash_dump_file = NULL;
static int Flash_Size = 131072;
static uint8_t *flash_buffer = NULL;
static uint8_t flash_command = 0;
static uint8_t flash_read_step = 0;
static uint8_t flash_progress = 0;
static uint8_t flash_dump_complete = 0;
static uint8_t flash_dump_fail = 0;
static uint8_t sys_operation = 0;
static bool flash_dump_going = false;
static uint8_t *flash_buffer;
static uint8_t flash_command;
static uint8_t flash_read_step;
static uint8_t flash_progress;
static uint8_t flash_dump_complete;
static uint8_t flash_dump_fail;
static uint8_t sys_operation;
static bool flash_dump_going;
static uint8_t getFlashDumpComplete(void);
static uint8_t getFlashDumpFail(void);
static uint8_t getFlashDumpProgress(void);
static uint8_t getFlashReadStep(void);
uint8_t getFlashCommand(void);
uint8_t getSysOperation(void);
static void setFlashCommand(uint8_t command);
static void setFlashReadStep(uint8_t step);
void setFlashBuffer(void);
void setFlashDumpComplete(uint8_t complete);
void setFlashDumpFail(uint8_t fail);
void setFlashDumpProgress(uint8_t progress);
void setSysOperation(uint8_t operation);
void setFlashDumpGoing(bool going);
bool getFlashDumpGoing(void);
#endif
#ifdef HX_TP_PROC_SELF_TEST
#define HIMAX_PROC_SELF_TEST_FILE "self_test"
struct proc_dir_entry *himax_proc_self_test_file = NULL;
uint32_t **raw_data_array;
uint8_t X_NUM = 0, Y_NUM = 0;
uint8_t sel_type = 0x0D;
#endif
#ifdef HX_TP_PROC_RESET
#define HIMAX_PROC_RESET_FILE "reset"
struct proc_dir_entry *himax_proc_reset_file = NULL;
#endif
#ifdef HX_HIGH_SENSE
#define HIMAX_PROC_HSEN_FILE "HSEN"
struct proc_dir_entry *himax_proc_HSEN_file = NULL;
#endif
#ifdef HX_TP_PROC_SENSE_ON_OFF
#define HIMAX_PROC_SENSE_ON_OFF_FILE "SenseOnOff"
struct proc_dir_entry *himax_proc_SENSE_ON_OFF_file = NULL;
#endif
#ifdef HX_SMART_WAKEUP
#define HIMAX_PROC_SMWP_FILE "SMWP"
struct proc_dir_entry *himax_proc_SMWP_file = NULL;
#define HIMAX_PROC_GESTURE_FILE "GESTURE"
struct proc_dir_entry *himax_proc_GESTURE_file = NULL;
uint8_t HX_SMWP_EN = 0;
//extern bool FAKE_POWER_KEY_SEND;
#endif
#ifdef HX_ESD_RECOVERY
#define HIMAX_PROC_ESD_CNT_FILE "ESD_cnt"
struct proc_dir_entry *himax_proc_ESD_cnt_file = NULL;
#endif
#define HIMAX_PROC_ESD_CNT_FILE "ESD_cnt"
struct proc_dir_entry *himax_proc_ESD_cnt_file = NULL;
#endif
#endif

4036
drivers/input/touchscreen/himax_mmi/himax_ic.c
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212
drivers/input/touchscreen/himax_mmi/himax_ic.h
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@ -1,212 +0,0 @@
/* Himax Android Driver Sample Code for HX83112 chipset
*
* Copyright (C) 2017 Himax Corporation.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include "himax_platform.h"
#include "himax_common.h"
#include <linux/slab.h>
#define HIMAX_REG_RETRY_TIMES 5
#ifdef HX_ESD_RECOVERY
extern u8 HX_ESD_RESET_ACTIVATE;
#endif
#ifndef HX_ORG_SELFTEST
#define BS_RAWDATANOISE 10
#define BS_OPENSHORT 0
#ifdef HX_INSPECT_LPWUG_TEST
#define BS_LPWUG 1
#define BS_LPWUG_dile 1
#endif
#ifdef HX_DOZE_TEST
#define BS_DOZE 1
#endif
// skip notch & dummy
#define SKIP_NOTCH_START 5
#define SKIP_NOTCH_END 10
#define SKIP_DUMMY_START 23 //TX+SKIP_NOTCH_START
#define SKIP_DUMMY_END 28 // TX+SKIP_NOTCH_END
//Himax MP Limit
#define RAWMIN 10000
#define RAWMAX 20000
#define SHORTMIN 0
#define SHORTMAX 150
#define OPENMIN 50
#define OPENMAX 500
#define M_OPENMIN 50
#define M_OPENMAX 500
#define NOISEFRAME BS_RAWDATANOISE+1
#define UNIFMAX 500
#ifdef HX_DOZE_TEST
#define DOZE_NOISE_MAX 9999
#define DOZE_NOISE_MIN 0
#define DOZE_RAWDATA_MAX 9999
#define DOZE_RAWDATA_MIN 0
#endif
#ifdef HX_INSPECT_LPWUG_TEST
#define LPWUG_NOISE_MAX 9999
#define LPWUG_NOISE_MIN 0
#define LPWUG_RAWDATA_MAX 9999
#define LPWUG_RAWDATA_MIN 0
#define LPWUG_IDLE_NOISE_MAX 9999
#define LPWUG_IDLE_NOISE_MIN 0
#define LPWUG_IDLE_RAWDATA_MAX 9999
#define LPWUG_IDLE_RAWDATA_MIN 0
#endif
//Himax MP Password
#define PWD_OPEN_START 0x77
#define PWD_OPEN_END 0x88
#define PWD_SHORT_START 0x11
#define PWD_SHORT_END 0x33
#define PWD_RAWDATA_START 0x00
#define PWD_RAWDATA_END 0x99
#define PWD_NOISE_START 0x00
#define PWD_NOISE_END 0x99
#define PWD_SORTING_START 0xAA
#define PWD_SORTING_END 0xCC
#ifdef HX_DOZE_TEST
#define PWD_DOZE_START 0x22
#define PWD_DOZE_END 0x44
#endif
#ifdef HX_INSPECT_LPWUG_TEST
#define PWD_LPWUG_START 0x55
#define PWD_LPWUG_END 0x66
#define PWD_LPWUG_IDLE_START 0x50
#define PWD_LPWUG_IDLE_END 0x60
#endif
//Himax DataType
#define DATA_OPEN 0x0B
#define DATA_MICRO_OPEN 0x0C
#define DATA_SHORT 0x0A
#define DATA_RAWDATA 0x0A
#define DATA_NOISE 0x0F
#define DATA_BACK_NORMAL 0x00
#define DATA_LPWUG_RAWDATA 0x0C
#define DATA_LPWUG_NOISE 0x0F
#define DATA_DOZE_RAWDATA 0x0A
#define DATA_DOZE_NOISE 0x0F
#define DATA_LPWUG_IDLE_RAWDATA 0x0A
#define DATA_LPWUG_IDLE_NOISE 0x0F
//Himax Data Ready Password
#define Data_PWD0 0xA5
#define Data_PWD1 0x5A
typedef enum
{
HIMAX_INSPECTION_OPEN,
HIMAX_INSPECTION_MICRO_OPEN,
HIMAX_INSPECTION_SHORT,
HIMAX_INSPECTION_RAWDATA,
HIMAX_INSPECTION_NOISE,
HIMAX_INSPECTION_SORTING,
HIMAX_INSPECTION_BACK_NORMAL,
#ifdef HX_DOZE_TEST
HIMAX_INSPECTION_DOZE_RAWDATA,
HIMAX_INSPECTION_DOZE_NOISE,
#endif
#ifdef HX_INSPECT_LPWUG_TEST
HIMAX_INSPECTION_LPWUG_RAWDATA,
HIMAX_INSPECTION_LPWUG_NOISE,
HIMAX_INSPECTION_LPWUG_IDLE_RAWDATA,
HIMAX_INSPECTION_LPWUG_IDLE_NOISE,
#endif
}THP_INSPECTION_ENUM;
/* Error code of AFE Inspection */
typedef enum
{
HX_INSPECT_OK = 0, /* OK */
HX_INSPECT_ESPI = (1 << 0), /* SPI communication error */
HX_INSPECT_ERAW = (1 << 1), /* Raw data error */
HX_INSPECT_ENOISE = (1 << 2), /* Noise error */
HX_INSPECT_EOPEN = (1 << 3), /* Sensor open error */
HX_INSPECT_EMOPEN = (1 << 4), /* Sensor micro open error */
HX_INSPECT_ESHORT = (1 << 5), /* Sensor short error */
HX_INSPECT_ERC = (1 << 6), /* Sensor RC error */
HX_INSPECT_EPIN = (1 << 7), /* Errors of TSVD!¢FFTSHD!¢FFTRCST!¢FFTRCRQ and other PINs
when Report Rate Switching between 60 Hz and 120 Hz */
HX_INSPECT_EOTHER = (1 << 8) /* All other errors */
} HX_INSPECT_ERR_ENUM;
#endif
enum fw_image_type
{
fw_image_32k = 0x01,
fw_image_48k,
fw_image_60k,
fw_image_64k,
fw_image_124k,
fw_image_128k,
};
int himax_hand_shaking(struct i2c_client *client);
void himax_set_SMWP_enable(struct i2c_client *client,uint8_t SMWP_enable, bool suspended);
void himax_set_HSEN_enable(struct i2c_client *client,uint8_t HSEN_enable, bool suspended);
void himax_usb_detect_set(struct i2c_client *client,uint8_t *cable_config);
int himax_determin_diag_rawdata(int diag_command);
int himax_determin_diag_storage(int diag_command);
void himax_diag_register_set(struct i2c_client *client, uint8_t diag_command);
void himax_flash_dump_func(struct i2c_client *client, uint8_t local_flash_command, int Flash_Size, uint8_t *flash_buffer);
int himax_chip_self_test(struct i2c_client *client);
void himax_burst_enable(struct i2c_client *client, uint8_t auto_add_4_byte);
int himax_register_read(struct i2c_client *client, uint8_t *read_addr, int read_length, uint8_t *read_data, bool cfg_flag);
void himax_flash_read(struct i2c_client *client, uint8_t *reg_byte, uint8_t *read_data);
int himax_flash_write_burst(struct i2c_client *client, uint8_t * reg_byte, uint8_t * write_data);
void himax_flash_write_burst_lenth(struct i2c_client *client, uint8_t *reg_byte, uint8_t *write_data, int length);
void himax_register_write(struct i2c_client *client, uint8_t *write_addr, int write_length, uint8_t *write_data, bool cfg_flag);
bool himax_sense_off(struct i2c_client *client);
void himax_interface_on(struct i2c_client *client);
bool wait_wip(struct i2c_client *client, int Timing);
void himax_sense_on(struct i2c_client *client, uint8_t FlashMode);
void himax_chip_erase(struct i2c_client *client);
bool himax_block_erase(struct i2c_client *client, int start_addr, int length);
void himax_flash_programming(struct i2c_client *client, uint8_t *FW_content, int FW_Size);
int himax_check_CRC(struct i2c_client *client, int mode);
int fts_ctpm_fw_upgrade_with_sys_fs_32k(struct i2c_client *client, unsigned char *fw, int len, bool change_iref);
int fts_ctpm_fw_upgrade_with_sys_fs_60k(struct i2c_client *client, unsigned char *fw, int len, bool change_iref);
int fts_ctpm_fw_upgrade_with_sys_fs_64k(struct i2c_client *client, unsigned char *fw, int len, bool change_iref);
int fts_ctpm_fw_upgrade_with_sys_fs_124k(struct i2c_client *client, unsigned char *fw, int len, bool change_iref);
int fts_ctpm_fw_upgrade_with_sys_fs_128k(struct i2c_client *client, unsigned char *fw, int len, bool change_iref);
void himax_touch_information(struct i2c_client *client);
int himax_read_i2c_status(struct i2c_client *client);
int himax_read_ic_trigger_type(struct i2c_client *client);
void himax_read_FW_ver(struct i2c_client *client);
bool himax_ic_package_check(struct i2c_client *client);
void himax_power_on_init(struct i2c_client *client);
bool himax_read_event_stack(struct i2c_client *client, uint8_t *buf, uint8_t length);
void himax_get_DSRAM_data(struct i2c_client *client, uint8_t *info_data);
bool himax_calculateChecksum(struct i2c_client *client, bool change_iref);
bool himax_flash_lastdata_check(struct i2c_client *client);
bool himax_program_reload(struct i2c_client *client);
uint8_t himax_read_DD_status(uint8_t *cmd_set, uint8_t *tmp_data);
int himax_read_FW_status(uint8_t *state_addr, uint8_t *tmp_addr);
void himax_resume_ic_action(struct i2c_client *client);
void himax_suspend_ic_action(struct i2c_client *client);
//ts_work
int cal_data_len(int raw_cnt_rmd, int HX_MAX_PT, int raw_cnt_max);
bool diag_check_sum(struct himax_report_data *hx_touch_data); //return checksum value
void diag_parse_raw_data(struct himax_report_data *hx_touch_data,int mul_num, int self_num,uint8_t diag_cmd, int32_t *mutual_data, int32_t *self_data);

316
drivers/input/touchscreen/himax_mmi/himax_ic_HX83112.c Normal file
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@ -0,0 +1,316 @@
/* Himax Android Driver Sample Code for HX83112 chipset
Copyright (C) 2018 Himax Corporation.
This software is licensed under the terms of the GNU General Public
License version 2, as published by the Free Software Foundation, and
may be copied, distributed, and modified under those terms.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
*/
#include "himax_ic_HX83112.h"
extern struct himax_ts_data *private_ts;
extern struct himax_core_fp g_core_fp;
extern struct ic_operation *pic_op;
extern struct fw_operation *pfw_op;
#ifdef HX_ZERO_FLASH
extern struct zf_operation *pzf_op;
#endif
extern int i2c_error_count;
extern unsigned char IC_TYPE;
extern unsigned char IC_CHECKSUM;
extern bool DSRAM_Flag;
extern unsigned long FW_VER_MAJ_FLASH_ADDR;
extern unsigned long FW_VER_MIN_FLASH_ADDR;
extern unsigned long CFG_VER_MAJ_FLASH_ADDR;
extern unsigned long CFG_VER_MIN_FLASH_ADDR;
extern unsigned long CID_VER_MAJ_FLASH_ADDR;
extern unsigned long CID_VER_MIN_FLASH_ADDR;
extern unsigned long FW_VER_MAJ_FLASH_LENG;
extern unsigned long FW_VER_MIN_FLASH_LENG;
extern unsigned long CFG_VER_MAJ_FLASH_LENG;
extern unsigned long CFG_VER_MIN_FLASH_LENG;
extern unsigned long CID_VER_MAJ_FLASH_LENG;
extern unsigned long CID_VER_MIN_FLASH_LENG;
#ifdef HX_AUTO_UPDATE_FW
extern int g_i_FW_VER;
extern int g_i_CFG_VER;
extern int g_i_CID_MAJ;
extern int g_i_CID_MIN;
extern unsigned char *i_CTPM_FW;
#endif
#ifdef HX_TP_PROC_2T2R
extern bool Is_2T2R;
#endif
#ifdef HX_USB_DETECT_GLOBAL
extern void himax_cable_detect_func (bool force_renew);
#endif
static void hx83112_chip_init (void)
{
private_ts->chip_cell_type = CHIP_IS_IN_CELL;
I ("%s:IC cell type = %d\n", __func__, private_ts->chip_cell_type);
IC_CHECKSUM = HX_TP_BIN_CHECKSUM_CRC;
/*Himax: Set FW and CFG Flash Address*/
FW_VER_MAJ_FLASH_ADDR = 49157; /*0x00C005*/
FW_VER_MAJ_FLASH_LENG = 1;
FW_VER_MIN_FLASH_ADDR = 49158; /*0x00C006*/
FW_VER_MIN_FLASH_LENG = 1;
CFG_VER_MAJ_FLASH_ADDR = 49408; /*0x00C100*/
CFG_VER_MAJ_FLASH_LENG = 1;
CFG_VER_MIN_FLASH_ADDR = 49409; /*0x00C101*/
CFG_VER_MIN_FLASH_LENG = 1;
CID_VER_MAJ_FLASH_ADDR = 49154; /*0x00C002*/
CID_VER_MAJ_FLASH_LENG = 1;
CID_VER_MIN_FLASH_ADDR = 49155; /*0x00C003*/
CID_VER_MIN_FLASH_LENG = 1;
}
static bool hx83112_sense_off(void)
{
uint8_t cnt = 0;
uint8_t tmp_data[FOUR_BYTE_DATA_SZ];
do {
/*===========================================
I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x27
===========================================*/
tmp_data[0] = pic_op->data_i2c_psw_lb[0];
if (himax_bus_write(pic_op->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
E("%s: i2c access fail!\n", __func__);
return false;
}
/*===========================================
I2C_password[15:8] set Enter safe mode :0x32 ==> 0x95
===========================================*/
tmp_data[0] = pic_op->data_i2c_psw_ub[0];
if (himax_bus_write(pic_op->adr_i2c_psw_ub[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
E("%s: i2c access fail!\n", __func__);
return false;
}
/*===========================================
I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x00
===========================================*/
tmp_data[0] = 0x00;
if (himax_bus_write(pic_op->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
E("%s: i2c access fail!\n", __func__);
return false;
}
/*===========================================
I2C_password[7:0] set Enter safe mode : 0x31 ==> 0x27
===========================================*/
tmp_data[0] = pic_op->data_i2c_psw_lb[0];
if (himax_bus_write(pic_op->adr_i2c_psw_lb[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
E("%s: i2c access fail!\n", __func__);
return false;
}
/*===========================================
I2C_password[15:8] set Enter safe mode :0x32 ==> 0x95
===========================================*/
tmp_data[0] = pic_op->data_i2c_psw_ub[0];
if (himax_bus_write(pic_op->adr_i2c_psw_ub[0], tmp_data, 1, HIMAX_I2C_RETRY_TIMES) < 0) {
E("%s: i2c access fail!\n", __func__);
return false;
}
/* ======================
Check enter_save_mode
======================*/
g_core_fp.fp_register_read(pic_op->addr_cs_central_state, FOUR_BYTE_ADDR_SZ, tmp_data, 0);
I("%s: Check enter_save_mode data[0]=%X \n", __func__, tmp_data[0]);
if (tmp_data[0] == 0x0C) {
/*=====================================
Reset TCON
=====================================*/
g_core_fp.fp_flash_write_burst(pic_op->addr_tcon_on_rst, pic_op->data_rst);
msleep(1);
tmp_data[3] = pic_op->data_rst[3];
tmp_data[2] = pic_op->data_rst[2];
tmp_data[1] = pic_op->data_rst[1];
tmp_data[0] = pic_op->data_rst[0] | 0x01;
g_core_fp.fp_flash_write_burst(pic_op->addr_tcon_on_rst, tmp_data);
/*=====================================
Reset ADC
=====================================*/
g_core_fp.fp_flash_write_burst(pic_op->addr_adc_on_rst, pic_op->data_rst);
msleep(1);
tmp_data[3] = pic_op->data_rst[3];
tmp_data[2] = pic_op->data_rst[2];
tmp_data[1] = pic_op->data_rst[1];
tmp_data[0] = pic_op->data_rst[0] | 0x01;
g_core_fp.fp_flash_write_burst(pic_op->addr_adc_on_rst, tmp_data);
return true;
} else {
msleep(10);
#ifdef HX_RST_PIN_FUNC
g_core_fp.fp_ic_reset(false, false);
#endif
}
} while (cnt++ < 15);
return false;
}
static void hx83112_func_re_init (void)
{
g_core_fp.fp_sense_off = hx83112_sense_off;
g_core_fp.fp_chip_init = hx83112_chip_init;
}
static void hx83112_reg_re_init (void)
{
}
bool hx83112_chip_detect (void)
{
uint8_t tmp_data[FOUR_BYTE_DATA_SZ];
bool ret_data = false;
int i = 0;
himax_mcu_in_cmd_struct_init();
himax_mcu_in_cmd_init();
hx83112_reg_re_init();
hx83112_func_re_init();
g_core_fp.fp_sense_off();
for (i = 0; i < 5; i++) {
g_core_fp.fp_register_read (pfw_op->addr_icid_addr, FOUR_BYTE_DATA_SZ, tmp_data, false);
I("%s:Read driver IC ID = %X, %X, %X\n", __func__, tmp_data[3], tmp_data[2], tmp_data[1]);
if ((tmp_data[3] == 0x83) && (tmp_data[2] == 0x11) && ((tmp_data[1] == 0x2a) || (tmp_data[1] == 0x2b) || (tmp_data[1] == 0x2e))) {
if (tmp_data[1] == 0x2a) {
strlcpy (private_ts->chip_name, HX_83112A_SERIES_PWON, 30);
} else if (tmp_data[1] == 0x2b) {
strlcpy (private_ts->chip_name, HX_83112B_SERIES_PWON, 30);
}
I("%s:IC name = %s\n", __func__, private_ts->chip_name);
I("Himax IC package %x%x%x in\n", tmp_data[3], tmp_data[2], tmp_data[1]);
ret_data = true;
break;
} else {
ret_data = false;
E("%s:Read driver ID register Fail:\n", __func__);
E("Could NOT find Himax Chipset \n");
E("Please check 1.VCCD,VCCA,VSP,VSN \n");
E("2. LCM_RST,TP_RST \n");
E("3. Power On Sequence \n");
}
}
return ret_data;
}
#if 0
#ifdef CONFIG_CHIP_DTCFG
static int himax_hx83112_probe(struct platform_device *pdev)
{
I("%s:Enter\n", __func__);
g_core_fp.fp_chip_detect = hx83112_chip_detect;
return 0;
}
static int himax_hx83112_remove(struct platform_device *pdev)
{
g_core_fp.fp_chip_detect = NULL;
g_core_fp.fp_chip_init = NULL;
return 0;
}
#ifdef CONFIG_OF
static const struct of_device_id himax_hx83112_mttable[] = {
{ .compatible = "himax,hx83112"},
{ },
};
#else
#define himax_hx83112_mttabl NULL
#endif
static struct platform_driver himax_hx83112_driver = {
.probe = himax_hx83112_probe,
.remove = himax_hx83112_remove,
.driver = {
.name = "HIMAX_HX83112",
.owner = THIS_MODULE,
.of_match_table = himax_hx83112_mttable,
},
};
static int __init himax_hx83112_init(void)
{
I("%s\n", __func__);
platform_driver_register(&himax_hx83112_driver);
return 0;
}
static void __exit himax_hx83112_exit(void)
{
platform_driver_unregister(&himax_hx83112_driver);
}
#else
static int himax_hx83112_probe(void)
{
I("%s:Enter\n", __func__);
g_core_fp.fp_chip_detect = hx83112_chip_detect;
return 0;
}
static int himax_hx83112_remove(void)
{
g_core_fp.fp_chip_detect = NULL;
g_core_fp.fp_chip_init = NULL;
return 0;
}
static int __init himax_hx83112_init(void)
{
int ret = 0;
I("%s\n", __func__);
ret = himax_hx83112_probe();
return 0;
}
static void __exit himax_hx83112_exit(void)
{
himax_hx83112_remove();
}
#endif
module_init(himax_hx83112_init);
module_exit(himax_hx83112_exit);
MODULE_DESCRIPTION("HIMAX HX83112 touch driver");
MODULE_LICENSE("GPL");
#endif

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drivers/input/touchscreen/himax_mmi/himax_ic_HX83112.h Normal file
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/* Himax Android Driver Sample Code for HX83112 chipset
Copyright (C) 2018 Himax Corporation.
This software is licensed under the terms of the GNU General Public
License version 2, as published by the Free Software Foundation, and
may be copied, distributed, and modified under those terms.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
*/
#include "himax_platform.h"
#include "himax_common.h"
#include "himax_ic_core.h"
#include <linux/slab.h>

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drivers/input/touchscreen/himax_mmi/himax_ic_core.h Normal file
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#include "himax_platform.h"
#include "himax_common.h"
#include <linux/slab.h>
#define EIGHT_BYTE_DATA_SZ 8
#define FOUR_BYTE_DATA_SZ 4
#define FOUR_BYTE_ADDR_SZ 4
#define FLASH_RW_MAX_LEN 256
#define FLASH_WRITE_BURST_SZ 8
#define PROGRAM_SZ 48
#define MAX_I2C_TRANS_SZ 128
#define HIMAX_REG_RETRY_TIMES 5
#define FW_BIN_16K_SZ 0x4000
#define HIMAX_TOUCH_DATA_SIZE 128
#define MASK_BIT_0 0x01
#define MASK_BIT_1 0x02
#define MASK_BIT_2 0x04
#define FW_SECTOR_PER_BLOCK 8
#define FW_PAGE_PER_SECTOR 64
#define FW_PAGE_SEZE 128
#define HX256B 0x100
#define HX4K 0x1000
#define HX_32K_SZ 0x8000
#define HX_40K_SZ 0xA000
#define HX_48K_SZ 0xC000
#define HX64K 0x10000
#define HX124K 0x1f000
#define HX4000K 0x1000000
#define HX_NORMAL_MODE 1
#define HX_SORTING_MODE 2
#define HX_CHANGE_MODE_FAIL (-1)
#define HX_RW_REG_FAIL (-1)
#define CORE_INIT
#define CORE_IC
#define CORE_FW
#define CORE_FLASH
#define CORE_SRAM
#define CORE_DRIVER
#define HX_0F_DEBUG
#ifdef HX_ESD_RECOVERY
extern u8 HX_ESD_RESET_ACTIVATE;
#endif
#ifdef CORE_INIT
void himax_mcu_in_cmd_struct_init(void);
/*void himax_mcu_in_cmd_struct_free(void);*/
void himax_in_parse_assign_cmd(uint32_t addr, uint8_t *cmd, int len);
void himax_mcu_in_cmd_init(void);
void himax_mcu_on_cmd_struct_init(void);
/*static void himax_mcu_on_cmd_struct_free(void);*/
void himax_on_parse_assign_cmd(uint32_t addr, uint8_t *cmd, int len);
void himax_mcu_on_cmd_init(void);
#endif
#if defined(CORE_IC)
#define ic_adr_ahb_addr_byte_0 0x00
#define ic_adr_ahb_rdata_byte_0 0x08
#define ic_adr_ahb_access_direction 0x0c
#define ic_adr_conti 0x13
#define ic_adr_incr4 0x0D
#define ic_adr_i2c_psw_lb 0x31
#define ic_adr_i2c_psw_ub 0x32
#define ic_cmd_ahb_access_direction_read 0x00
#define ic_cmd_conti 0x31
#define ic_cmd_incr4 0x10
#define ic_cmd_i2c_psw_lb 0x27
#define ic_cmd_i2c_psw_ub 0x95
#define ic_adr_tcon_on_rst 0x80020020
#define ic_addr_adc_on_rst 0x80020094
#define ic_adr_psl 0x900000A0
#define ic_adr_cs_central_state 0x900000A8
#define ic_cmd_rst 0x00000000
#define on_ic_adr_ahb_addr_byte_0 0x00
#define on_ic_adr_ahb_rdata_byte_0 0x08
#define on_ic_adr_ahb_access_direction 0x0c
#define on_ic_adr_conti 0x13
#define on_ic_adr_incr4 0x0D
#define on_ic_cmd_ahb_access_direction_read 0x00
#define on_ic_cmd_conti 0x31
#define on_ic_cmd_incr4 0x10
#define on_ic_adr_mcu_ctrl 0x82
#define on_ic_cmd_mcu_on 0x25
#define on_ic_cmd_mcu_off 0xDA
#define on_ic_adr_sleep_ctrl 0x99
#define on_ic_cmd_sleep_in 0x80
#define on_ic_adr_tcon_ctrl 0x80020000
#define on_ic_cmd_tcon_on 0x00000000
#define on_ic_adr_wdg_ctrl 0x9000800C
#define on_ic_cmd_wdg_psw 0x0000AC53
#define on_ic_adr_wdg_cnt_ctrl 0x90008010
#define on_ic_cmd_wdg_cnt_clr 0x000035CA
#endif
#if defined(CORE_FW)
#define fw_addr_system_reset 0x90000018
#define fw_addr_safe_mode_release_pw 0x90000098
#define fw_addr_ctrl_fw 0x9000005c
#define fw_addr_flag_reset_event 0x900000e4
#define fw_addr_hsen_enable 0x10007F14
#define fw_addr_smwp_enable 0x10007F10
#define fw_usb_detect_addr 0x10007F38
#define fw_addr_program_reload_from 0x00000000
#define fw_addr_program_reload_to 0x08000000
#define fw_addr_program_reload_page_write 0x0000fb00
#define fw_addr_raw_out_sel 0x800204b4
#define fw_addr_reload_status 0x80050000
#define fw_addr_reload_crc32_result 0x80050018
#define fw_addr_reload_addr_from 0x80050020
#define fw_addr_reload_addr_cmd_beat 0x80050028
#define fw_data_system_reset 0x00000055
#define fw_data_safe_mode_release_pw_active 0x00000053
#define fw_data_safe_mode_release_pw_reset 0x00000000
#define fw_data_clear 0x00000000
#define fw_data_program_reload_start 0x0A3C3000
#define fw_data_program_reload_compare 0x04663000
#define fw_data_program_reload_break 0x15E75678
#define fw_addr_selftest_addr_en 0x10007F18
#define fw_addr_selftest_result_addr 0x10007f24
#define fw_data_selftest_request 0x00006AA6
#define fw_addr_criteria_addr 0x10007f1c
#define fw_data_criteria_aa_top 0x64
#define fw_data_criteria_aa_bot 0x00
#define fw_data_criteria_key_top 0x64
#define fw_data_criteria_key_bot 0x00
#define fw_data_criteria_avg_top 0x64
#define fw_data_criteria_avg_bot 0x00
#define fw_addr_set_frame_addr 0x10007294
#define fw_data_set_frame 0x0000000A
#define fw_data_selftest_ack_hb 0xa6
#define fw_data_selftest_ack_lb 0x6a
#define fw_data_selftest_pass 0xaa
#define fw_data_normal_cmd 0x00
#define fw_data_normal_status 0x99
#define fw_data_sorting_cmd 0xaa
#define fw_data_sorting_status 0xcc
#define fw_data_idle_dis_pwd 0x17
#define fw_data_idle_en_pwd 0x1f
#define fw_addr_sorting_mode_en 0x10007f04
#define fw_addr_fw_mode_status 0x10007088
#define fw_addr_icid_addr 0x900000d0
#define fw_addr_trigger_addr 0x10007088
#define fw_addr_fw_ver_addr 0x10007004
#define fw_addr_fw_cfg_addr 0x10007084
#define fw_addr_fw_vendor_addr 0x10007000
#define fw_addr_fw_state_addr 0x900000f8
#define fw_addr_fw_dbg_msg_addr 0x10007f44
#define fw_addr_chk_fw_status 0x900000a8
#define fw_addr_dd_handshak_addr 0x900000fc
#define fw_addr_dd_data_addr 0x10007f80
#define fw_data_dd_request 0xaa
#define fw_data_dd_ack 0xbb
#define fw_data_rawdata_ready_hb 0xa3
#define fw_data_rawdata_ready_lb 0x3a
#define fw_addr_ahb_addr 0x11
#define fw_data_ahb_dis 0x00
#define fw_data_ahb_en 0x01
#define fw_addr_event_addr 0x30
#define fw_func_handshaking_pwd 0xA55AA55A
#define fw_func_handshaking_end 0x77887788
#define on_fw_addr_smwp_enable 0xA2
#define on_fw_usb_detect_addr 0xA4
#define on_fw_addr_program_reload_from 0x00000000
#define on_fw_addr_raw_out_sel 0x98
#define on_fw_addr_flash_checksum 0x80000044
#define on_fw_data_flash_checksum 0x00000491
#define on_fw_addr_crc_value 0x80000050
#define on_fw_data_safe_mode_release_pw_active 0x00000053
#define on_fw_data_safe_mode_release_pw_reset 0x00000000
#define on_fw_addr_criteria_addr 0x9A
#define on_fw_data_selftest_pass 0xaa
#define on_fw_addr_reK_crtl 0x8000000C
#define on_fw_data_reK_en 0x02
#define on_fw_data_reK_dis 0xFD
#define on_fw_data_rst_init 0xF0
#define on_fw_data_dc_set 0x02
#define on_fw_data_bank_set 0x03
#define on_fw_addr_selftest_addr_en 0x98
#define on_fw_addr_selftest_result_addr 0x9B
#define on_fw_data_selftest_request 0x06
#define on_fw_data_thx_avg_mul_dc_lsb 0x22
#define on_fw_data_thx_avg_mul_dc_msb 0x0B
#define on_fw_data_thx_mul_dc_up_low_bud 0x64
#define on_fw_data_thx_avg_slf_dc_lsb 0x14
#define on_fw_data_thx_avg_slf_dc_msb 0x05
#define on_fw_data_thx_slf_dc_up_low_bud 0x64
#define on_fw_data_thx_slf_bank_up 0x40
#define on_fw_data_thx_slf_bank_low 0x00
#define on_fw_data_idle_dis_pwd 0x40
#define on_fw_data_idle_en_pwd 0x00
#define on_fw_addr_fw_mode_status 0x99
#define on_fw_addr_icid_addr 0x900000d0
#define on_fw_addr_trigger_addr 0x10007088
#define on_fw_addr_fw_ver_start 0x90
#define on_fw_data_rawdata_ready_hb 0xa3
#define on_fw_data_rawdata_ready_lb 0x3a
#define on_fw_addr_ahb_addr 0x11
#define on_fw_data_ahb_dis 0x00
#define on_fw_data_ahb_en 0x01
#define on_fw_addr_event_addr 0x30
#endif
#if defined(CORE_FLASH)
#define flash_addr_ctrl_base 0x80000000
#define flash_addr_spi200_trans_fmt (flash_addr_ctrl_base + 0x10)
#define flash_addr_spi200_trans_ctrl (flash_addr_ctrl_base + 0x20)
#define flash_addr_spi200_cmd (flash_addr_ctrl_base + 0x24)
#define flash_addr_spi200_addr (flash_addr_ctrl_base + 0x28)
#define flash_addr_spi200_data (flash_addr_ctrl_base + 0x2c)
#define flash_addr_spi200_bt_num (flash_addr_ctrl_base + 0xe8)
#define flash_data_spi200_trans_fmt 0x00020780
#define flash_data_spi200_trans_ctrl_1 0x42000003
#define flash_data_spi200_trans_ctrl_2 0x47000000
#define flash_data_spi200_trans_ctrl_3 0x67000000
#define flash_data_spi200_trans_ctrl_4 0x610ff000
#define flash_data_spi200_trans_ctrl_5 0x694002ff
#define flash_data_spi200_cmd_1 0x00000005
#define flash_data_spi200_cmd_2 0x00000006
#define flash_data_spi200_cmd_3 0x000000C7
#define flash_data_spi200_cmd_4 0x000000D8
#define flash_data_spi200_cmd_5 0x00000020
#define flash_data_spi200_cmd_6 0x00000002
#define flash_data_spi200_cmd_7 0x0000003b
#define flash_data_spi200_addr 0x00000000
#define on_flash_addr_ctrl_base 0x80000000
#define on_flash_addr_ctrl_auto 0x80000004
#define on_flash_data_main_erase 0x0000A50D
#define on_flash_data_auto 0xA5
#define on_flash_data_main_read 0x03
#define on_flash_data_page_write 0x05
#define on_flash_data_spp_read 0x10
#define on_flash_data_sfr_read 0x14
#define on_flash_addr_ahb_ctrl 0x80000020
#define on_flash_data_ahb_squit 0x00000001
#define on_flash_addr_unlock_0 0x00000000
#define on_flash_addr_unlock_4 0x00000004
#define on_flash_addr_unlock_8 0x00000008
#define on_flash_addr_unlock_c 0x0000000C
#define on_flash_data_cmd0 0x28178EA0
#define on_flash_data_cmd1 0x0A0E03FF
#define on_flash_data_cmd2 0x8C203D0C
#define on_flash_data_cmd3 0x00300263
#define on_flash_data_lock 0x03400000
#endif
#if defined(CORE_SRAM)
#define sram_adr_mkey 0x100070E8
#define sram_adr_rawdata_addr 0x10000000
#define sram_adr_rawdata_end 0x00000000
#define sram_cmd_conti 0x44332211
#define sram_cmd_fin 0x00000000
#define sram_passwrd_start 0x5AA5
#define sram_passwrd_end 0xA55A
#define on_sram_adr_rawdata_addr 0x080002E0
#define on_sram_adr_rawdata_end 0x00000000
#define on_sram_cmd_conti 0x44332211
#define on_sram_cmd_fin 0x00000000
#define on_sram_passwrd_start 0x5AA5
#define on_sram_passwrd_end 0xA55A
#endif
#if defined(CORE_DRIVER)
#define driver_addr_fw_define_flash_reload 0x10007f00
#define driver_addr_fw_define_2nd_flash_reload 0x100072c0
#define driver_data_fw_define_flash_reload_dis 0x0000a55a
#define driver_data_fw_define_flash_reload_en 0x00000000
#define driver_addr_fw_define_int_is_edge 0x10007089
#define driver_addr_fw_define_rxnum_txnum_maxpt 0x100070f4
#define driver_data_fw_define_rxnum_txnum_maxpt_sorting 0x00000008
#define driver_data_fw_define_rxnum_txnum_maxpt_normal 0x00000014
#define driver_addr_fw_define_xy_res_enable 0x100070fa
#define driver_addr_fw_define_x_y_res 0x100070fc
#define on_driver_addr_fw_define_int_is_edge 0x10007089
#define on_driver_addr_fw_rx_tx_maxpt_num 0x0800001C
#define on_driver_addr_fw_xy_rev_int_edge 0x0800000C
#define on_driver_addr_fw_define_x_y_res 0x08000030
#endif
#if defined(HX_ZERO_FLASH)
#define zf_addr_dis_flash_reload 0x10007f00
#define zf_data_dis_flash_reload 0x00009AA9
#define zf_addr_system_reset 0x90000018
#define zf_data_system_reset 0x00000055
#define zf_data_sram_start_addr 0x08000000
#define zf_data_sram_clean 0x10000000
#define zf_data_cfg_info 0x10007000
#define zf_data_fw_cfg_1 0x10007084
#define zf_data_fw_cfg_2 0x10007264
#define zf_data_fw_cfg_3 0x10007300
#define zf_data_adc_cfg_1 0x10006A00
#define zf_data_adc_cfg_2 0x10007B28
#define zf_data_adc_cfg_3 0x10007AF0
#define zf_data_map_table 0x10007500
#define zf_data_mode_switch 0x10007294
#define zf_addr_sts_chk 0x900000A8
#define zf_data_activ_sts 0x05
#define zf_addr_activ_relod 0x90000048
#define zf_data_activ_in 0xEC
struct zf_info{
uint8_t sram_addr[4];
int write_size;
uint32_t fw_addr;
};
#endif
struct ic_operation {
uint8_t addr_ahb_addr_byte_0[1];
uint8_t addr_ahb_rdata_byte_0[1];
uint8_t addr_ahb_access_direction[1];
uint8_t addr_conti[1];
uint8_t addr_incr4[1];
uint8_t adr_i2c_psw_lb[1];
uint8_t adr_i2c_psw_ub[1];
uint8_t data_ahb_access_direction_read[1];
uint8_t data_conti[1];
uint8_t data_incr4[1];
uint8_t data_i2c_psw_lb[1];
uint8_t data_i2c_psw_ub[1];
uint8_t addr_tcon_on_rst[4];
uint8_t addr_adc_on_rst[4];
uint8_t addr_psl[4];
uint8_t addr_cs_central_state[4];
uint8_t data_rst[4];
};
struct fw_operation {
uint8_t addr_system_reset[4];
uint8_t addr_safe_mode_release_pw[4];
uint8_t addr_ctrl_fw_isr[4];
uint8_t addr_flag_reset_event[4];
uint8_t addr_hsen_enable[4];
uint8_t addr_smwp_enable[4];
uint8_t addr_program_reload_from[4];
uint8_t addr_program_reload_to[4];
uint8_t addr_program_reload_page_write[4];
uint8_t addr_raw_out_sel[4];
uint8_t addr_reload_status[4];
uint8_t addr_reload_crc32_result[4];
uint8_t addr_reload_addr_from[4];
uint8_t addr_reload_addr_cmd_beat[4];
uint8_t addr_selftest_addr_en[4];
uint8_t addr_criteria_addr[4];
uint8_t addr_set_frame_addr[4];
uint8_t addr_selftest_result_addr[4];
uint8_t addr_sorting_mode_en[4];
uint8_t addr_fw_mode_status[4];
uint8_t addr_icid_addr[4];
uint8_t addr_trigger_addr[4];
uint8_t addr_fw_ver_addr[4];
uint8_t addr_fw_cfg_addr[4];
uint8_t addr_fw_vendor_addr[4];
uint8_t addr_fw_state_addr[4];
uint8_t addr_fw_dbg_msg_addr[4];
uint8_t addr_chk_fw_status[4];
uint8_t addr_dd_handshak_addr[4];
uint8_t addr_dd_data_addr[4];
uint8_t data_system_reset[4];
uint8_t data_safe_mode_release_pw_active[4];
uint8_t data_safe_mode_release_pw_reset[4];
uint8_t data_clear[4];
uint8_t data_program_reload_start[4];
uint8_t data_program_reload_compare[4];
uint8_t data_program_reload_break[4];
uint8_t data_selftest_request[4];
uint8_t data_criteria_aa_top[1];
uint8_t data_criteria_aa_bot[1];
uint8_t data_criteria_key_top[1];
uint8_t data_criteria_key_bot[1];
uint8_t data_criteria_avg_top[1];
uint8_t data_criteria_avg_bot[1];
uint8_t data_set_frame[4];
uint8_t data_selftest_ack_hb[1];
uint8_t data_selftest_ack_lb[1];
uint8_t data_selftest_pass[1];
uint8_t data_normal_cmd[1];
uint8_t data_normal_status[1];
uint8_t data_sorting_cmd[1];
uint8_t data_sorting_status[1];
uint8_t data_dd_request[1];
uint8_t data_dd_ack[1];
uint8_t data_idle_dis_pwd[1];
uint8_t data_idle_en_pwd[1];
uint8_t data_rawdata_ready_hb[1];
uint8_t data_rawdata_ready_lb[1];
uint8_t addr_ahb_addr[1];
uint8_t data_ahb_dis[1];
uint8_t data_ahb_en[1];
uint8_t addr_event_addr[1];
uint8_t addr_usb_detect[4];
};
struct flash_operation {
uint8_t addr_spi200_trans_fmt[4];
uint8_t addr_spi200_trans_ctrl[4];
uint8_t addr_spi200_cmd[4];
uint8_t addr_spi200_addr[4];
uint8_t addr_spi200_data[4];
uint8_t addr_spi200_bt_num[4];
uint8_t data_spi200_trans_fmt[4];
uint8_t data_spi200_trans_ctrl_1[4];
uint8_t data_spi200_trans_ctrl_2[4];
uint8_t data_spi200_trans_ctrl_3[4];
uint8_t data_spi200_trans_ctrl_4[4];
uint8_t data_spi200_trans_ctrl_5[4];
uint8_t data_spi200_cmd_1[4];
uint8_t data_spi200_cmd_2[4];
uint8_t data_spi200_cmd_3[4];
uint8_t data_spi200_cmd_4[4];
uint8_t data_spi200_cmd_5[4];
uint8_t data_spi200_cmd_6[4];
uint8_t data_spi200_cmd_7[4];
uint8_t data_spi200_addr[4];
};
struct sram_operation {
uint8_t addr_mkey[4];
uint8_t addr_rawdata_addr[4];
uint8_t addr_rawdata_end[4];
uint8_t data_conti[4];
uint8_t data_fin[4];
uint8_t passwrd_start[2];
uint8_t passwrd_end[2];
};
struct driver_operation {
uint8_t addr_fw_define_flash_reload[4];
uint8_t addr_fw_define_2nd_flash_reload[4];
uint8_t addr_fw_define_int_is_edge[4];
uint8_t addr_fw_define_rxnum_txnum_maxpt[4];
uint8_t addr_fw_define_xy_res_enable[4];
uint8_t addr_fw_define_x_y_res[4];
uint8_t data_fw_define_flash_reload_dis[4];
uint8_t data_fw_define_flash_reload_en[4];
uint8_t data_fw_define_rxnum_txnum_maxpt_sorting[4];
uint8_t data_fw_define_rxnum_txnum_maxpt_normal[4];
};
struct zf_operation {
uint8_t addr_dis_flash_reload[4];
uint8_t data_dis_flash_reload[4];
uint8_t addr_system_reset[4];
uint8_t data_system_reset[4];
uint8_t data_sram_start_addr[4];
uint8_t data_sram_clean[4];
uint8_t data_cfg_info[4];
uint8_t data_fw_cfg_1[4];
uint8_t data_fw_cfg_2[4];
uint8_t data_fw_cfg_3[4];
uint8_t data_adc_cfg_1[4];
uint8_t data_adc_cfg_2[4];
uint8_t data_adc_cfg_3[4];
uint8_t data_map_table[4];
uint8_t data_mode_switch[4];
uint8_t addr_sts_chk[4];
uint8_t data_activ_sts[1];
uint8_t addr_activ_relod[4];
uint8_t data_activ_in[1];
};
struct himax_core_command_operation {
struct ic_operation *ic_op;
struct fw_operation *fw_op;
struct flash_operation *flash_op;
struct sram_operation *sram_op;
struct driver_operation *driver_op;
struct zf_operation *zf_op;
};
struct on_ic_operation {
uint8_t addr_ahb_addr_byte_0[1];
uint8_t addr_ahb_rdata_byte_0[1];
uint8_t addr_ahb_access_direction[1];
uint8_t addr_conti[1];
uint8_t addr_incr4[1];
uint8_t adr_mcu_ctrl[1];
uint8_t data_ahb_access_direction_read[1];
uint8_t data_conti[1];
uint8_t data_incr4[1];
uint8_t cmd_mcu_on[1];
uint8_t cmd_mcu_off[1];
uint8_t adr_sleep_ctrl[1];
uint8_t cmd_sleep_in[1];
uint8_t adr_tcon_ctrl[4];
uint8_t cmd_tcon_on[4];
uint8_t adr_wdg_ctrl[4];
uint8_t cmd_wdg_psw[4];
uint8_t adr_wdg_cnt_ctrl[4];
uint8_t cmd_wdg_cnt_clr[4];
};
struct on_fw_operation {
uint8_t addr_smwp_enable[1];
uint8_t addr_program_reload_from[4];
uint8_t addr_raw_out_sel[1];
uint8_t addr_flash_checksum[4];
uint8_t data_flash_checksum[4];
uint8_t addr_crc_value[4];
uint8_t addr_reload_status[4];
uint8_t addr_reload_crc32_result[4];
uint8_t addr_reload_addr_from[4];
uint8_t addr_reload_addr_cmd_beat[4];
uint8_t addr_set_frame_addr[4];
uint8_t addr_fw_mode_status[1];
uint8_t addr_icid_addr[4];
uint8_t addr_trigger_addr[4];
uint8_t addr_fw_ver_start[1];
uint8_t data_safe_mode_release_pw_active[4];
uint8_t data_safe_mode_release_pw_reset[4];
uint8_t data_clear[4];
uint8_t addr_criteria_addr[1];
uint8_t data_selftest_pass[1];
uint8_t addr_reK_crtl[4];
uint8_t data_reK_en[1];
uint8_t data_reK_dis[1];
uint8_t data_rst_init[1];
uint8_t data_dc_set[1];
uint8_t data_bank_set[1];
uint8_t addr_selftest_addr_en[1];
uint8_t addr_selftest_result_addr[1];
uint8_t data_selftest_request[1];
uint8_t data_thx_avg_mul_dc_lsb[1];
uint8_t data_thx_avg_mul_dc_msb[1];
uint8_t data_thx_mul_dc_up_low_bud[1];
uint8_t data_thx_avg_slf_dc_lsb[1];
uint8_t data_thx_avg_slf_dc_msb[1];
uint8_t data_thx_slf_dc_up_low_bud[1];
uint8_t data_thx_slf_bank_up[1];
uint8_t data_thx_slf_bank_low[1];
uint8_t data_idle_dis_pwd[1];
uint8_t data_idle_en_pwd[1];
uint8_t data_rawdata_ready_hb[1];
uint8_t data_rawdata_ready_lb[1];
uint8_t addr_ahb_addr[1];
uint8_t data_ahb_dis[1];
uint8_t data_ahb_en[1];
uint8_t addr_event_addr[1];
uint8_t addr_usb_detect[1];
};
struct on_flash_operation {
uint8_t addr_ctrl_base[4];
uint8_t addr_ctrl_auto[4];
uint8_t data_main_erase[4];
uint8_t data_auto[1];
uint8_t data_main_read[1];
uint8_t data_page_write[1];
uint8_t data_sfr_read[1];
uint8_t data_spp_read[1];
uint8_t addr_ahb_ctrl[4];
uint8_t data_ahb_squit[4];
uint8_t addr_unlock_0[4];
uint8_t addr_unlock_4[4];
uint8_t addr_unlock_8[4];
uint8_t addr_unlock_c[4];
uint8_t data_cmd0[4];
uint8_t data_cmd1[4];
uint8_t data_cmd2[4];
uint8_t data_cmd3[4];
uint8_t data_lock[4];
};
struct on_sram_operation {
uint8_t addr_rawdata_addr[4];
uint8_t addr_rawdata_end[4];
uint8_t data_conti[4];
uint8_t data_fin[4];
uint8_t passwrd_start[2];
uint8_t passwrd_end[2];
};
struct on_driver_operation {
uint8_t addr_fw_define_int_is_edge[4];
uint8_t addr_fw_rx_tx_maxpt_num[4];
uint8_t addr_fw_xy_rev_int_edge[4];
uint8_t addr_fw_define_x_y_res[4];
uint8_t data_fw_define_rxnum_txnum_maxpt_sorting[4];
uint8_t data_fw_define_rxnum_txnum_maxpt_normal[4];
};
struct himax_on_core_command_operation {
struct on_ic_operation *ic_op;
struct on_fw_operation *fw_op;
struct on_flash_operation *flash_op;
struct on_sram_operation *sram_op;
struct on_driver_operation *driver_op;
};
struct himax_core_fp {
#ifdef CORE_IC
void (*fp_burst_enable)(uint8_t auto_add_4_byte);
int (*fp_register_read)(uint8_t *read_addr, uint32_t read_length, uint8_t *read_data, uint8_t cfg_flag);
int (*fp_flash_write_burst)(uint8_t *reg_byte, uint8_t *write_data);
void (*fp_flash_write_burst_lenth)(uint8_t *reg_byte, uint8_t *write_data, uint32_t length);
void (*fp_register_write)(uint8_t *write_addr, uint32_t write_length, uint8_t *write_data, uint8_t cfg_flag);
void (*fp_interface_on)(void);
void (*fp_sense_on)(uint8_t FlashMode);
void (*fp_tcon_on)(void);
bool (*fp_watch_dog_off)(void);
bool (*fp_sense_off)(void);
void (*fp_sleep_in)(void);
bool (*fp_wait_wip)(int Timing);
void (*fp_init_psl)(void);
void (*fp_resume_ic_action)(void);
void (*fp_suspend_ic_action)(void);
void (*fp_power_on_init)(void);
#endif
#ifdef CORE_FW
void (*fp_parse_raw_data)(struct himax_report_data *hx_touch_data, int mul_num, int self_num, uint8_t diag_cmd, int16_t *mutual_data, int16_t *self_data);
void (*fp_system_reset)(void);
bool (*fp_Calculate_CRC_with_AP)(unsigned char *FW_content, int CRC_from_FW, int mode);
uint32_t (*fp_check_CRC)(uint8_t *start_addr, int reload_length);
void (*fp_set_reload_cmd)(uint8_t *write_data, int idx, uint32_t cmd_from, uint32_t cmd_to, uint32_t cmd_beat);
bool (*fp_program_reload)(void);
void (*fp_set_SMWP_enable)(uint8_t SMWP_enable, bool suspended);
void (*fp_set_HSEN_enable)(uint8_t HSEN_enable, bool suspended);
void (*fp_diag_register_set)(uint8_t diag_command, uint8_t storage_type);
#ifdef HX_TP_SELF_TEST_DRIVER
void (*fp_control_reK)(bool enable);
#endif
int (*fp_chip_self_test)(void);
void (*fp_idle_mode)(int disable);
void (*fp_reload_disable)(int disable);
bool (*fp_check_chip_version)(void);
int (*fp_read_ic_trigger_type)(void);
int (*fp_read_i2c_status)(void);
void (*fp_read_FW_ver)(void);
bool (*fp_read_event_stack)(uint8_t *buf, uint8_t length);
void (*fp_return_event_stack)(void);
bool (*fp_calculateChecksum)(bool change_iref);
int (*fp_read_FW_status)(uint8_t *state_addr, uint8_t *tmp_addr);
void (*fp_irq_switch)(int switch_on);
int (*fp_assign_sorting_mode)(uint8_t *tmp_data);
int (*fp_check_sorting_mode)(uint8_t *tmp_data);
int (*fp_switch_mode)(int mode);
uint8_t (*fp_read_DD_status)(uint8_t *cmd_set, uint8_t *tmp_data);
#endif
#ifdef CORE_FLASH
void (*fp_chip_erase)(void);
bool (*fp_block_erase)(int start_addr, int length);
bool (*fp_sector_erase)(int start_addr);
void (*fp_flash_programming)(uint8_t *FW_content, int FW_Size);
void (*fp_flash_page_write)(uint8_t *write_addr, int length, uint8_t *write_data);
int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_32k)(unsigned char *fw, int len, bool change_iref);
int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_60k)(unsigned char *fw, int len, bool change_iref);
int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_64k)(unsigned char *fw, int len, bool change_iref);
int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_124k)(unsigned char *fw, int len, bool change_iref);
int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_128k)(unsigned char *fw, int len, bool change_iref);
void (*fp_flash_dump_func)(uint8_t local_flash_command, int Flash_Size, uint8_t *flash_buffer);
bool (*fp_flash_lastdata_check)(void);
bool (*fp_ahb_squit)(void);
void (*fp_flash_read)(uint8_t *r_data, int start_addr, int length);
bool (*fp_sfr_rw)(uint8_t *addr, int length, uint8_t *data, uint8_t rw_ctrl);
bool (*fp_lock_flash)(void);
bool (*fp_unlock_flash)(void);
void (*fp_init_auto_func)(void);
#endif
#ifdef CORE_SRAM
void (*fp_sram_write)(uint8_t *FW_content);
bool (*fp_sram_verify)(uint8_t *FW_File, int FW_Size);
bool (*fp_get_DSRAM_data)(uint8_t *info_data, bool DSRAM_Flag);
#endif
#ifdef CORE_DRIVER
bool (*fp_chip_detect)(void);
void (*fp_chip_init)(void);
#ifdef HX_AUTO_UPDATE_FW
int (*fp_fw_ver_bin)(void);
#endif
void (*fp_pin_reset)(void);
void (*fp_touch_information)(void);
void (*fp_reload_config)(void);
int (*fp_get_touch_data_size)(void);
void (*fp_usb_detect_set)(uint8_t *cable_config);
int (*fp_hand_shaking)(void);
int (*fp_determin_diag_rawdata)(int diag_command);
int (*fp_determin_diag_storage)(int diag_command);
int (*fp_cal_data_len)(int raw_cnt_rmd, int HX_MAX_PT, int raw_cnt_max);
bool (*fp_diag_check_sum)(struct himax_report_data *hx_touch_data);
void (*fp_diag_parse_raw_data)(struct himax_report_data *hx_touch_data, int mul_num, int self_num, uint8_t diag_cmd, int32_t *mutual_data, int32_t *self_data);
void (*fp_ic_reset)(uint8_t loadconfig, uint8_t int_off);
int (*fp_ic_esd_recovery)(int hx_esd_event, int hx_zero_event, int length);
void (*fp_esd_ic_reset)(void);
void (*fp_resend_cmd_func)(bool suspended);
#endif
#ifdef HX_ZERO_FLASH
void (*fp_clean_sram_0f)(uint8_t *addr, int write_len, int type);
void (*fp_write_sram_0f)(const struct firmware *fw_entry, uint8_t *addr, int start_index, uint32_t write_len);
void (*fp_firmware_update_0f)(const struct firmware *fw_entry);
int (*fp_0f_operation_dirly)(void);
int (*fp_0f_op_file_dirly)(char *file_name);
void (*fp_0f_operation)(struct work_struct *work);
int (*fp_0f_esd_check)(void);
#ifdef HX_0F_DEBUG
void (*fp_read_sram_0f)(const struct firmware *fw_entry, uint8_t *addr, int start_index, int read_len);
void (*fp_read_all_sram)(uint8_t *addr, int read_len);
void (*fp_firmware_read_0f)(const struct firmware *fw_entry, int type);
void (*fp_0f_operation_check)(int type);
#endif
#endif
};

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drivers/input/touchscreen/himax_mmi/himax_ic_incell_core.c Normal file
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drivers/input/touchscreen/himax_mmi/himax_inspection.c Normal file
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drivers/input/touchscreen/himax_mmi/himax_inspection.h Normal file
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#include "himax_platform.h"
#include "himax_common.h"
#include "himax_ic_core.h"
/*#define HX_GAP_TEST*/
/*#define HX_INSPECT_LPWUG_TEST*/
/*#define HX_ACT_IDLE_TEST*/
#define HX_RSLT_OUT_PATH "/sdcard/"
#define HX_RSLT_OUT_FILE "hx_test_result.txt"
char *g_file_path;
char *g_rslt_data;
uint32_t g_rslt_data_len = 0;
#define BS_RAWDATANOISE 10
#define BS_OPENSHORT 0
#ifdef HX_INSPECT_LPWUG_TEST
#define BS_LPWUG 1
#define BS_LPWUG_dile 1
#endif
#ifdef HX_ACT_IDLE_TEST
#define BS_ACT_IDLE 1
#endif
/* skip notch & dummy */
#define SKIP_NOTCH_START 5
#define SKIP_NOTCH_END 10
/* TX+SKIP_NOTCH_START */
#define SKIP_DUMMY_START 23
/* TX+SKIP_NOTCH_END*/
#define SKIP_DUMMY_END 28
#define NOISEFRAME (BS_RAWDATANOISE+1)
#define UNIFMAX 500
/*Himax MP Password*/
#define PWD_OPEN_START 0x77
#define PWD_OPEN_END 0x88
#define PWD_SHORT_START 0x11
#define PWD_SHORT_END 0x33
#define PWD_RAWDATA_START 0x00
#define PWD_RAWDATA_END 0x99
#define PWD_NOISE_START 0x00
#define PWD_NOISE_END 0x99
#define PWD_SORTING_START 0xAA
#define PWD_SORTING_END 0xCC
#ifdef HX_ACT_IDLE_TEST
#define PWD_ACT_IDLE_START 0x22
#define PWD_ACT_IDLE_END 0x44
#endif
#ifdef HX_INSPECT_LPWUG_TEST
#define PWD_LPWUG_START 0x55
#define PWD_LPWUG_END 0x66
#define PWD_LPWUG_IDLE_START 0x50
#define PWD_LPWUG_IDLE_END 0x60
#endif
/*Himax DataType*/
#define DATA_SORTING 0x0A
#define DATA_OPEN 0x0B
#define DATA_MICRO_OPEN 0x0C
#define DATA_SHORT 0x0A
#define DATA_RAWDATA 0x0A
#define DATA_NOISE 0x0F
#define DATA_BACK_NORMAL 0x00
#define DATA_LPWUG_RAWDATA 0x0C
#define DATA_LPWUG_NOISE 0x0F
#define DATA_ACT_IDLE_RAWDATA 0x0A
#define DATA_ACT_IDLE_NOISE 0x0F
#define DATA_LPWUG_IDLE_RAWDATA 0x0A
#define DATA_LPWUG_IDLE_NOISE 0x0F
/*Himax Data Ready Password*/
#define Data_PWD0 0xA5
#define Data_PWD1 0x5A
/* ASCII format */
#define ASCII_LF (0x0A)
#define ASCII_CR (0x0D)
#define ASCII_COMMA (0x2C)
#define ASCII_ZERO (0x30)
#define CHAR_EL '\0'
#define CHAR_NL '\n'
#define ACSII_SPACE (0x20)
/* INSOECTION Setting */
int HX_CRITERIA_ITEM;
int HX_CRITERIA_SIZE;
typedef enum {
HIMAX_INSPECTION_OPEN,
HIMAX_INSPECTION_MICRO_OPEN,
HIMAX_INSPECTION_SHORT,
HIMAX_INSPECTION_RAWDATA,
HIMAX_INSPECTION_NOISE,
HIMAX_INSPECTION_SORTING,
HIMAX_INSPECTION_BACK_NORMAL,
#ifdef HX_GAP_TEST
HIMAX_INSPECTION_GAPTEST_RAW,
#endif
#ifdef HX_ACT_IDLE_TEST
HIMAX_INSPECTION_ACT_IDLE_RAWDATA,
HIMAX_INSPECTION_ACT_IDLE_NOISE,
#endif
#ifdef HX_INSPECT_LPWUG_TEST
HIMAX_INSPECTION_LPWUG_RAWDATA,
HIMAX_INSPECTION_LPWUG_NOISE,
HIMAX_INSPECTION_LPWUG_IDLE_RAWDATA,
HIMAX_INSPECTION_LPWUG_IDLE_NOISE,
#endif
} THP_INSPECTION_ENUM;
char *g_himax_inspection_mode[] = {
"HIMAX_INSPECTION_OPEN",
"HIMAX_INSPECTION_MICRO_OPEN",
"HIMAX_INSPECTION_SHORT",
"HIMAX_INSPECTION_RAWDATA",
"HIMAX_INSPECTION_NOISE",
"HIMAX_INSPECTION_SORTING",
"HIMAX_INSPECTION_BACK_NORMAL",
#ifdef HX_GAP_TEST
"HIMAX_INSPECTION_GAPTEST_RAW",
#endif
#ifdef HX_ACT_IDLE_TEST
"HIMAX_INSPECTION_ACT_IDLE_RAWDATA",
"HIMAX_INSPECTION_ACT_IDLE_NOISE",
#endif
#ifdef HX_INSPECT_LPWUG_TEST
"HIMAX_INSPECTION_LPWUG_RAWDATA",
"HIMAX_INSPECTION_LPWUG_NOISE",
"HIMAX_INSPECTION_LPWUG_IDLE_RAWDATA",
"HIMAX_INSPECTION_LPWUG_IDLE_NOISE",
#endif
};
/* for criteria */
int **g_inspection_criteria;
char *g_hx_inspt_crtra_name[] = {
"CRITERIA_RAW_MIN",
"CRITERIA_RAW_MAX",
"CRITERIA_SHORT_MIN",
"CRITERIA_SHORT_MAX",
"CRITERIA_OPEN_MIN",
"CRITERIA_OPEN_MAX",
"CRITERIA_MICRO_OPEN_MIN",
"CRITERIA_MICRO_OPEN_MAX",
"CRITERIA_NOISE",
"CRITERIA_SORT_MIN",
"CRITERIA_SORT_MAX",
#ifdef HX_GAP_TEST
"CRITERIA_GAP_RAW_MIN",
"CRITERIA_GAP_RAW_MAX",
#endif
#ifdef HX_ACT_IDLE_TEST
"ACT_IDLE_NOISE_MIN",
"ACT_IDLE_NOISE_MAX",
"ACT_IDLE_RAWDATA_MIN",
"ACT_IDLE_RAWDATA_MAX",
#endif
#ifdef HX_INSPECT_LPWUG_TEST
"LPWUG_NOISE_MIN",
"LPWUG_NOISE_MAX",
"LPWUG_RAWDATA_MIN",
"LPWUG_RAWDATA_MAX",
"LPWUG_IDLE_NOISE_MIN",
"LPWUG_IDLE_NOISE_MAX",
"LPWUG_IDLE_RAWDATA_MIN",
"LPWUG_IDLE_RAWDATA_MAX"
#endif
};
typedef enum {
IDX_RAWMIN = 0,
IDX_RAWMAX,
IDX_SHORTMIN,
IDX_SHORTMAX,
IDX_OPENMIN,
IDX_OPENMAX,
IDX_M_OPENMIN,
IDX_M_OPENMAX,
IDX_NOISEMAX,
IDX_SORTMIN,
IDX_SORTMAX,
#ifdef HX_GAP_TEST
IDX_GAP_RAWMAX,
IDX_GAP_RAWMIN,
#endif
#ifdef HX_ACT_IDLE_TEST
IDX_ACT_IDLE_NOISE_MIN,
IDX_ACT_IDLE_NOISE_MAX,
IDX_ACT_IDLE_RAWDATA_MIN,
IDX_ACT_IDLE_RAWDATA_MAX,
#endif
#ifdef HX_INSPECT_LPWUG_TEST
IDX_LPWUG_NOISE_MIN,
IDX_LPWUG_NOISE_MAX,
IDX_LPWUG_RAWDATA_MIN,
IDX_LPWUG_RAWDATA_MAX,
IDX_LPWUG_IDLE_NOISE_MIN,
IDX_LPWUG_IDLE_NOISE_MAX,
IDX_LPWUG_IDLE_RAWDATA_MIN,
IDX_LPWUG_IDLE_RAWDATA_MAX,
#endif
} HX_CRITERIA_ENUM;
/* Error code of Inspection */
typedef enum {
HX_INSPECT_OK = 0, /* OK */
HX_INSPECT_ESPI = 1 << 1, /* SPI communication error */
HX_INSPECT_ERAW = 2 << 1, /* Raw data error */
HX_INSPECT_ENOISE = 3 << 1, /* Noise error */
HX_INSPECT_EOPEN = 4 << 1, /* Sensor open error */
HX_INSPECT_EMOPEN = 5 << 1, /* Sensor micro open error */
HX_INSPECT_ESHORT = 6 << 1, /* Sensor short error */
#ifdef HX_GAP_TEST
HX_INSPECT_EGAP_RAW = 8 << 1, /* Sensor short error */
#endif
#ifdef HX_ACT_IDLE_TEST
HX_INSPECT_EACT_IDLE_RAW = 9 << 1, /* ACT_IDLE RAW ERROR */
HX_INSPECT_EACT_IDLE_NOISE = 10 << 1, /* ACT_IDLE NOISE ERROR */
#endif
#ifdef HX_INSPECT_LPWUG_TEST
HX_INSPECT_ELPWUG_RAW = 11 << 1, /* LPWUG RAW ERROR */
HX_INSPECT_ELPWUG_NOISE = 12 << 1, /* LPWUG NOISE ERROR */
HX_INSPECT_ELPWUG_IDLE_RAW = 13 << 1, /* LPWUG IDLE RAW ERROR */
HX_INSPECT_ELPWUG_IDLE_NOISE = 14 << 1, /* LPWUG IDLE NOISE ERROR */
#endif
HX_INSPECT_EFILE = 15 << 1, /*Criteria file error*/
HX_INSPECT_EOTHER = 16 << 1, /* All other errors */
} HX_INSPECT_ERR_ENUM;

1171
drivers/input/touchscreen/himax_mmi/himax_platform.c
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154
drivers/input/touchscreen/himax_mmi/himax_platform.h
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@ -1,16 +1,16 @@
/* Himax Android Driver Sample Code for QCT platform
*
* Copyright (C) 2017 Himax Corporation.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
/* Himax Android Driver Sample Code for QCT platform
Copyright (C) 2018 Himax Corporation.
This software is licensed under the terms of the GNU General Public
License version 2, as published by the Free Software Foundation, and
may be copied, distributed, and modified under those terms.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
*/
#ifndef HIMAX_PLATFORM_H
@ -23,10 +23,10 @@
#include <linux/i2c.h>
#include <linux/interrupt.h>
#if defined(CONFIG_HMX_DB)
#include <linux/regulator/consumer.h>
#include <linux/regulator/consumer.h>
#endif
#define QCT
#define HIMAX_I2C_RETRY_TIMES 10
#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
#define D(x...) printk("[HXTP] " x)
@ -34,9 +34,10 @@
#define W(x...) printk("[HXTP][WARNING] " x)
#define E(x...) printk("[HXTP][ERROR] " x)
#define DIF(x...) \
do { \
if (debug_flag) \
printk("[HXTP][DEBUG] " x) \
} while(0)
printk("[HXTP][DEBUG] " x) \
} while (0)
#else
#define D(x...)
#define I(x...)
@ -46,85 +47,84 @@
#endif
#if defined(CONFIG_HMX_DB)
/* Analog voltage @2.7 V */
#define HX_VTG_MIN_UV 2700000
#define HX_VTG_MAX_UV 3300000
#define HX_ACTIVE_LOAD_UA 15000
#define HX_LPM_LOAD_UA 10
/* Digital voltage @1.8 V */
#define HX_VTG_DIG_MIN_UV 1800000
#define HX_VTG_DIG_MAX_UV 1800000
#define HX_ACTIVE_LOAD_DIG_UA 10000
#define HX_LPM_LOAD_DIG_UA 10
/* Analog voltage @2.7 V */
#define HX_VTG_MIN_UV 2700000
#define HX_VTG_MAX_UV 3300000
#define HX_ACTIVE_LOAD_UA 15000
#define HX_LPM_LOAD_UA 10
/* Digital voltage @1.8 V */
#define HX_VTG_DIG_MIN_UV 1800000
#define HX_VTG_DIG_MAX_UV 1800000
#define HX_ACTIVE_LOAD_DIG_UA 10000
#define HX_LPM_LOAD_DIG_UA 10
#define HX_I2C_VTG_MIN_UV 1800000
#define HX_I2C_VTG_MAX_UV 1800000
#define HX_I2C_LOAD_UA 10000
#define HX_I2C_LPM_LOAD_UA 10
#define HX_I2C_VTG_MIN_UV 1800000
#define HX_I2C_VTG_MAX_UV 1800000
#define HX_I2C_LOAD_UA 10000
#define HX_I2C_LPM_LOAD_UA 10
#endif
#define HIMAX_common_NAME "himax_tp"
#define HIMAX_I2C_ADDR 0x48
#define INPUT_DEV_NAME "himax-touchscreen"
struct himax_i2c_platform_data
{
int abs_x_min;
int abs_x_max;
int abs_x_fuzz;
int abs_y_min;
int abs_y_max;
int abs_y_fuzz;
int abs_pressure_min;
int abs_pressure_max;
int abs_pressure_fuzz;
int abs_width_min;
int abs_width_max;
int screenWidth;
int screenHeight;
uint8_t fw_version;
uint8_t tw_id;
uint8_t powerOff3V3;
uint8_t cable_config[2];
uint8_t protocol_type;
int gpio_irq;
int gpio_reset;
int gpio_3v3_en;
int (*power)(int on);
void (*reset)(void);
struct himax_virtual_key *virtual_key;
struct kobject *vk_obj;
struct kobj_attribute *vk2Use;
struct himax_i2c_platform_data {
int abs_x_min;
int abs_x_max;
int abs_x_fuzz;
int abs_y_min;
int abs_y_max;
int abs_y_fuzz;
int abs_pressure_min;
int abs_pressure_max;
int abs_pressure_fuzz;
int abs_width_min;
int abs_width_max;
int screenWidth;
int screenHeight;
uint8_t fw_version;
uint8_t tw_id;
uint8_t powerOff3V3;
uint8_t cable_config[2];
uint8_t protocol_type;
int gpio_irq;
int gpio_reset;
int gpio_3v3_en;
int (*power)(int on);
void (*reset)(void);
struct himax_virtual_key *virtual_key;
struct kobject *vk_obj;
struct kobj_attribute *vk2Use;
int hx_config_size;
int hx_config_size;
#if defined(CONFIG_HMX_DB)
bool i2c_pull_up;
bool digital_pwr_regulator;
int reset_gpio;
u32 reset_gpio_flags;
int irq_gpio;
u32 irq_gpio_flags;
bool i2c_pull_up;
bool digital_pwr_regulator;
int reset_gpio;
u32 reset_gpio_flags;
int irq_gpio;
u32 irq_gpio_flags;
struct regulator *vcc_ana; //For Dragon Board
struct regulator *vcc_dig; //For Dragon Board
struct regulator *vcc_i2c; //For Dragon Board
struct regulator *vcc_ana; /* For Dragon Board */
struct regulator *vcc_dig; /* For Dragon Board */
struct regulator *vcc_i2c; /* For Dragon Board */
#endif
};
extern int irq_enable_count;
extern int i2c_himax_read(struct i2c_client *client, uint8_t command, uint8_t *data, uint8_t length, uint8_t toRetry);
extern int i2c_himax_write(struct i2c_client *client, uint8_t command, uint8_t *data, uint8_t length, uint8_t toRetry);
extern int i2c_himax_write_command(struct i2c_client *client, uint8_t command, uint8_t toRetry);
extern int i2c_himax_master_write(struct i2c_client *client, uint8_t *data, uint8_t length, uint8_t toRetry);
extern void himax_int_enable(int irqnum, int enable);
extern int himax_ts_register_interrupt(struct i2c_client *client);
extern int himax_bus_read(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
extern int himax_bus_write(uint8_t command, uint8_t *data, uint32_t length, uint8_t toRetry);
extern int himax_bus_write_command(uint8_t command, uint8_t toRetry);
extern int himax_bus_master_write(uint8_t *data, uint32_t length, uint8_t toRetry);
extern void himax_int_enable(int enable);
extern int himax_ts_register_interrupt(void);
extern uint8_t himax_int_gpio_read(int pinnum);
extern int himax_gpio_power_config(struct i2c_client *client,struct himax_i2c_platform_data *pdata);
extern int himax_gpio_power_config(struct himax_i2c_platform_data *pdata);
#if defined(CONFIG_FB)
extern int fb_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
extern int fb_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
#endif
#endif