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iommu/tegra: gart: Fix register offset correctly

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DT passes the exact GART register ranges without any overlapping with
MC register ranges. GART register offset needs to be adjusted by one
passed by DT correctly.

Signed-off-by: Hiroshi DOYU <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Joerg Roedel <[email protected]>
This commit is contained in:
Hiroshi DOYU 2012-05-10 10:45:32 +03:00 • committed by Joerg Roedel
commit 774dfc9bb7
2 changed files with 7 additions and 6 deletions
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7
drivers/iommu/tegra-gart.c
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@ -36,9 +36,10 @@
/* bitmap of the page sizes currently supported */
#define GART_IOMMU_PGSIZES (SZ_4K)
#define GART_CONFIG 0x24
#define GART_ENTRY_ADDR 0x28
#define GART_ENTRY_DATA 0x2c
#define GART_REG_BASE 0x24
#define GART_CONFIG (0x24 - GART_REG_BASE)
#define GART_ENTRY_ADDR (0x28 - GART_REG_BASE)
#define GART_ENTRY_DATA (0x2c - GART_REG_BASE)
#define GART_ENTRY_PHYS_ADDR_VALID (1 << 31)
#define GART_PAGE_SHIFT 12