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Merge branch 'for_3.8-rc1' into v4l_for_linus

Browse source 
* for_3.8-rc1: (243 commits)
  [media] omap3isp: Replace cpu_is_omap3630() with ISP revision check
  [media] omap3isp: Prepare/unprepare clocks before/after enable/disable
  [media] omap3isp: preview: Add support for 8-bit formats at the sink pad
  [media] omap3isp: Replace printk with dev_*
  [media] omap3isp: Find source pad from external entity
  [media] omap3isp: Configure CSI-2 phy based on platform data
  [media] omap3isp: Add PHY routing configuration
  [media] omap3isp: Add CSI configuration registers from control block to ISP resources
  [media] omap3isp: Remove unneeded module memory address definitions
  [media] omap3isp: Use monotonic timestamps for statistics buffers
  [media] uvcvideo: Fix control value clamping for unsigned integer controls
  [media] uvcvideo: Mark first output terminal as default video node
  [media] uvcvideo: Add VIDIOC_[GS]_PRIORITY support
  [media] uvcvideo: Return -ENOTTY for unsupported ioctls
  [media] uvcvideo: Set device_caps in VIDIOC_QUERYCAP
  [media] uvcvideo: Don't fail when an unsupported format is requested
  [media] uvcvideo: Return -EACCES when trying to access a read/write-only control
  [media] uvcvideo: Set error_idx properly for extended controls API failures
  [media] rtl28xxu: add NOXON DAB/DAB+ USB dongle rev 2
  [media] fc2580: write some registers conditionally
  ...
This commit is contained in:
Mauro Carvalho Chehab 2012-12-11 11:28:37 -02:00
commit 77c53d0b56
314 changed files with 7754 additions and 1863 deletions
Download patch file Download diff file Expand all files Collapse all files

7
drivers/media/common/Kconfig
View file

@ -1,3 +1,10 @@
# Used by common drivers, when they need to ask questions
config MEDIA_COMMON_OPTIONS
bool
comment "common driver options"
depends on MEDIA_COMMON_OPTIONS
source "drivers/media/common/b2c2/Kconfig"
source "drivers/media/common/saa7146/Kconfig"
source "drivers/media/common/siano/Kconfig"

5
drivers/media/common/b2c2/Kconfig
View file

@ -17,11 +17,6 @@ config DVB_B2C2_FLEXCOP
select DVB_CX24123 if MEDIA_SUBDRV_AUTOSELECT
select MEDIA_TUNER_SIMPLE if MEDIA_SUBDRV_AUTOSELECT
select DVB_TUNER_CX24113 if MEDIA_SUBDRV_AUTOSELECT
help
Support for the digital TV receiver chip made by B2C2 Inc. included in
Technisats PCI cards and USB boxes.
Say Y if you own such a device and want to use it.
# Selected via the PCI or USB flexcop drivers
config DVB_B2C2_FLEXCOP_DEBUG

18
drivers/media/common/siano/Kconfig
View file

@ -4,14 +4,16 @@
config SMS_SIANO_MDTV
tristate
depends on DVB_CORE && RC_CORE && HAS_DMA
depends on DVB_CORE && HAS_DMA
depends on !RC_CORE || RC_CORE
depends on SMS_USB_DRV || SMS_SDIO_DRV
default y
config SMS_SIANO_RC
bool "Enable Remote Controller support for Siano devices"
depends on SMS_SIANO_MDTV && RC_CORE
depends on SMS_USB_DRV || SMS_SDIO_DRV
depends on MEDIA_COMMON_OPTIONS
default y
---help---
Choose Y or M here if you have MDTV receiver with a Siano chipset.
To compile this driver as a module, choose M here
(The module will be called smsmdtv).
Further documentation on this driver can be found on the WWW
at http://www.siano-ms.com/
Choose Y to select Remote Controller support for Siano driver.

6
drivers/media/common/siano/Makefile
View file

@ -1,7 +1,11 @@
smsmdtv-objs := smscoreapi.o sms-cards.o smsendian.o smsir.o
smsmdtv-objs := smscoreapi.o sms-cards.o smsendian.o
obj-$(CONFIG_SMS_SIANO_MDTV) += smsmdtv.o smsdvb.o
ifeq ($(CONFIG_SMS_SIANO_RC),y)
smsmdtv-objs += smsir.o
endif
ccflags-y += -Idrivers/media/dvb-core
ccflags-y += $(extra-cflags-y) $(extra-cflags-m)

2
drivers/media/common/siano/smscoreapi.c
View file

@ -1092,7 +1092,7 @@ EXPORT_SYMBOL_GPL(smscore_onresponse);
* @return pointer to descriptor on success, NULL on error.
*/
struct smscore_buffer_t *get_entry(struct smscore_device_t *coredev)
static struct smscore_buffer_t *get_entry(struct smscore_device_t *coredev)
{
struct smscore_buffer_t *cb = NULL;
unsigned long flags;

2
drivers/media/common/siano/smsir.c
View file

@ -88,7 +88,7 @@ int sms_ir_init(struct smscore_device_t *coredev)
dev->priv = coredev;
dev->driver_type = RC_DRIVER_IR_RAW;
dev->allowed_protos = RC_TYPE_ALL;
dev->allowed_protos = RC_BIT_ALL;
dev->map_name = sms_get_board(board_id)->rc_codes;
dev->driver_name = MODULE_NAME;

9
drivers/media/common/siano/smsir.h
View file

@ -46,10 +46,19 @@ struct ir_t {
u32 controller;
};
#ifdef CONFIG_SMS_SIANO_RC
int sms_ir_init(struct smscore_device_t *coredev);
void sms_ir_exit(struct smscore_device_t *coredev);
void sms_ir_event(struct smscore_device_t *coredev,
const char *buf, int len);
#else
inline static int sms_ir_init(struct smscore_device_t *coredev) {
return 0;
}
inline static void sms_ir_exit(struct smscore_device_t *coredev) {};
inline static void sms_ir_event(struct smscore_device_t *coredev,
const char *buf, int len) {};
#endif
#endif /* __SMS_IR_H__ */

2
drivers/media/dvb-core/dmxdev.c
View file

@ -877,7 +877,7 @@ static int dvb_dmxdev_pes_filter_set(struct dmxdev *dmxdev,
dvb_dmxdev_filter_stop(dmxdevfilter);
dvb_dmxdev_filter_reset(dmxdevfilter);
if (params->pes_type > DMX_PES_OTHER || params->pes_type < 0)
if ((unsigned)params->pes_type > DMX_PES_OTHER)
return -EINVAL;
dmxdevfilter->type = DMXDEV_TYPE_PES;

1
drivers/media/dvb-core/dmxdev.h
View file

@ -26,6 +26,7 @@
#include <linux/types.h>
#include <linux/spinlock.h>
#include <linux/kernel.h>
#include <linux/time.h>
#include <linux/timer.h>
#include <linux/wait.h>
#include <linux/fs.h>

1
drivers/media/dvb-core/dvb-usb-ids.h
View file

@ -250,6 +250,7 @@
#define USB_PID_TERRATEC_T3 0x10a0
#define USB_PID_TERRATEC_T5 0x10a1
#define USB_PID_NOXON_DAB_STICK 0x00b3
#define USB_PID_NOXON_DAB_STICK_REV2 0x00e0
#define USB_PID_PINNACLE_EXPRESSCARD_320CX 0x022e
#define USB_PID_PINNACLE_PCTV2000E 0x022c
#define USB_PID_PINNACLE_PCTV_DVB_T_FLASH 0x0228

10
drivers/media/dvb-core/dvb_frontend.c
View file

@ -1029,12 +1029,6 @@ static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = {
/* Get */
_DTV_CMD(DTV_DISEQC_SLAVE_REPLY, 0, 1),
_DTV_CMD(DTV_API_VERSION, 0, 0),
_DTV_CMD(DTV_CODE_RATE_HP, 0, 0),
_DTV_CMD(DTV_CODE_RATE_LP, 0, 0),
_DTV_CMD(DTV_GUARD_INTERVAL, 0, 0),
_DTV_CMD(DTV_TRANSMISSION_MODE, 0, 0),
_DTV_CMD(DTV_HIERARCHY, 0, 0),
_DTV_CMD(DTV_INTERLEAVING, 0, 0),
_DTV_CMD(DTV_ENUM_DELSYS, 0, 0),
@ -1042,13 +1036,11 @@ static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = {
_DTV_CMD(DTV_ATSCMH_RS_FRAME_ENSEMBLE, 1, 0),
_DTV_CMD(DTV_ATSCMH_FIC_VER, 0, 0),
_DTV_CMD(DTV_ATSCMH_PARADE_ID, 0, 0),
_DTV_CMD(DTV_ATSCMH_NOG, 0, 0),
_DTV_CMD(DTV_ATSCMH_TNOG, 0, 0),
_DTV_CMD(DTV_ATSCMH_SGN, 0, 0),
_DTV_CMD(DTV_ATSCMH_PRC, 0, 0),
_DTV_CMD(DTV_ATSCMH_RS_FRAME_MODE, 0, 0),
_DTV_CMD(DTV_ATSCMH_RS_FRAME_ENSEMBLE, 0, 0),
_DTV_CMD(DTV_ATSCMH_RS_CODE_MODE_PRI, 0, 0),
_DTV_CMD(DTV_ATSCMH_RS_CODE_MODE_SEC, 0, 0),
_DTV_CMD(DTV_ATSCMH_SCCC_BLOCK_MODE, 0, 0),
@ -1056,8 +1048,6 @@ static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = {
_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_B, 0, 0),
_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_C, 0, 0),
_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_D, 0, 0),
_DTV_CMD(DTV_LNA, 0, 0),
};
static void dtv_property_dump(struct dvb_frontend *fe, struct dtv_property *tvp)

4
drivers/media/dvb-frontends/cx22700.c
View file

@ -139,7 +139,7 @@ static int cx22700_set_tps(struct cx22700_state *state,
if (p->code_rate_HP == FEC_4_5 || p->code_rate_LP == FEC_4_5)
return -EINVAL;
if (p->guard_interval < GUARD_INTERVAL_1_32 ||
if ((int)p->guard_interval < GUARD_INTERVAL_1_32 ||
p->guard_interval > GUARD_INTERVAL_1_4)
return -EINVAL;
@ -152,7 +152,7 @@ static int cx22700_set_tps(struct cx22700_state *state,
p->modulation != QAM_64)
return -EINVAL;
if (p->hierarchy < HIERARCHY_NONE ||
if ((int)p->hierarchy < HIERARCHY_NONE ||
p->hierarchy > HIERARCHY_4)
return -EINVAL;

2
drivers/media/dvb-frontends/cx24123.c
View file

@ -338,7 +338,7 @@ static int cx24123_set_fec(struct cx24123_state *state, fe_code_rate_t fec)
{
u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07;
if ((fec < FEC_NONE) || (fec > FEC_AUTO))
if (((int)fec < FEC_NONE) || (fec > FEC_AUTO))
fec = FEC_AUTO;
/* Set the soft decision threshold */

2
drivers/media/dvb-frontends/dib9000.h
View file

@ -97,7 +97,7 @@ static inline int dib9000_set_slave_frontend(struct dvb_frontend *fe, struct dvb
return -ENODEV;
}
int dib9000_remove_slave_frontend(struct dvb_frontend *fe)
static inline int dib9000_remove_slave_frontend(struct dvb_frontend *fe)
{
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
return -ENODEV;

8
drivers/media/dvb-frontends/drxd_hard.c
View file

@ -1748,7 +1748,8 @@ static int DRX_Stop(struct drxd_state *state)
return status;
}
int SetOperationMode(struct drxd_state *state, int oMode)
#if 0 /* Currently unused */
static int SetOperationMode(struct drxd_state *state, int oMode)
{
int status;
@ -1788,6 +1789,7 @@ int SetOperationMode(struct drxd_state *state, int oMode)
state->operation_mode = oMode;
return status;
}
#endif
static int StartDiversity(struct drxd_state *state)
{
@ -2612,7 +2614,7 @@ static int CDRXD(struct drxd_state *state, u32 IntermediateFrequency)
return 0;
}
int DRXD_init(struct drxd_state *state, const u8 * fw, u32 fw_size)
static int DRXD_init(struct drxd_state *state, const u8 *fw, u32 fw_size)
{
int status = 0;
u32 driverVersion;
@ -2774,7 +2776,7 @@ int DRXD_init(struct drxd_state *state, const u8 * fw, u32 fw_size)
return status;
}
int DRXD_status(struct drxd_state *state, u32 * pLockStatus)
static int DRXD_status(struct drxd_state *state, u32 *pLockStatus)
{
DRX_GetLockStatus(state, pLockStatus);

24
drivers/media/dvb-frontends/drxk_hard.c
View file

@ -65,16 +65,6 @@ static bool IsQAM(struct drxk_state *state)
state->m_OperationMode == OM_QAM_ITU_C;
}
bool IsA1WithPatchCode(struct drxk_state *state)
{
return state->m_DRXK_A1_PATCH_CODE;
}
bool IsA1WithRomCode(struct drxk_state *state)
{
return state->m_DRXK_A1_ROM_CODE;
}
#define NOA1ROM 0
#define DRXDAP_FASI_SHORT_FORMAT(addr) (((addr) & 0xFC30FF80) == 0)
@ -189,7 +179,7 @@ static inline u32 MulDiv32(u32 a, u32 b, u32 c)
return (u32) tmp64;
}
inline u32 Frac28a(u32 a, u32 c)
static inline u32 Frac28a(u32 a, u32 c)
{
int i = 0;
u32 Q1 = 0;
@ -587,7 +577,7 @@ static int write_block(struct drxk_state *state, u32 Address,
#define DRXK_MAX_RETRIES_POWERUP 20
#endif
int PowerUpDevice(struct drxk_state *state)
static int PowerUpDevice(struct drxk_state *state)
{
int status;
u8 data = 0;
@ -720,11 +710,6 @@ static int init_state(struct drxk_state *state)
state->m_bPowerDown = (ulPowerDown != 0);
state->m_DRXK_A1_PATCH_CODE = false;
state->m_DRXK_A1_ROM_CODE = false;
state->m_DRXK_A2_ROM_CODE = false;
state->m_DRXK_A3_ROM_CODE = false;
state->m_DRXK_A2_PATCH_CODE = false;
state->m_DRXK_A3_PATCH_CODE = false;
/* Init AGC and PGA parameters */
@ -921,7 +906,7 @@ static int GetDeviceCapabilities(struct drxk_state *state)
status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE);
if (status < 0)
goto error;
status = write16(state, SIO_TOP_COMM_KEY__A, 0xFABA);
status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY);
if (status < 0)
goto error;
status = read16(state, SIO_PDR_OHW_CFG__A, &sioPdrOhwCfg);
@ -1217,7 +1202,7 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
goto error;
/* MPEG TS pad configuration */
status = write16(state, SIO_TOP_COMM_KEY__A, 0xFABA);
status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY);
if (status < 0)
goto error;
@ -5461,6 +5446,7 @@ static int QAMDemodulatorCommand(struct drxk_state *state,
} else {
printk(KERN_WARNING "drxk: Unknown QAM demodulator parameter "
"count %d\n", numberOfParameters);
status = -EINVAL;
}
error:

6
drivers/media/dvb-frontends/drxk_hard.h
View file

@ -320,11 +320,7 @@ struct drxk_state {
u8 *m_microcode;
int m_microcode_length;
bool m_DRXK_A1_PATCH_CODE;
bool m_DRXK_A1_ROM_CODE;
bool m_DRXK_A2_ROM_CODE;
bool m_DRXK_A3_ROM_CODE;
bool m_DRXK_A2_PATCH_CODE;
bool m_DRXK_A3_ROM_CODE;
bool m_DRXK_A3_PATCH_CODE;
bool m_rfmirror;

15
drivers/media/dvb-frontends/ds3000.c
View file

@ -30,7 +30,6 @@
#include "ds3000.h"
static int debug;
static int force_fw_upload;
#define dprintk(args...) \
do { \
@ -234,7 +233,6 @@ struct ds3000_state {
struct i2c_adapter *i2c;
const struct ds3000_config *config;
struct dvb_frontend frontend;
u8 skip_fw_load;
/* previous uncorrected block counter for DVB-S2 */
u16 prevUCBS2;
};
@ -397,9 +395,6 @@ static int ds3000_firmware_ondemand(struct dvb_frontend *fe)
if (ret < 0)
return ret;
if (state->skip_fw_load || !force_fw_upload)
return 0; /* Firmware already uploaded, skipping */
/* Load firmware */
/* request the firmware, this will block until someone uploads it */
printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__,
@ -413,9 +408,6 @@ static int ds3000_firmware_ondemand(struct dvb_frontend *fe)
return ret;
}
/* Make sure we don't recurse back through here during loading */
state->skip_fw_load = 1;
ret = ds3000_load_firmware(fe, fw);
if (ret)
printk("%s: Writing firmware to device failed\n", __func__);
@ -425,9 +417,6 @@ static int ds3000_firmware_ondemand(struct dvb_frontend *fe)
dprintk("%s: Firmware upload %s\n", __func__,
ret == 0 ? "complete" : "failed");
/* Ensure firmware is always loaded if required */
state->skip_fw_load = 0;
return ret;
}
@ -1309,10 +1298,8 @@ static struct dvb_frontend_ops ds3000_ops = {
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
module_param(force_fw_upload, int, 0644);
MODULE_PARM_DESC(force_fw_upload, "Force firmware upload (default:0)");
MODULE_DESCRIPTION("DVB Frontend module for Montage Technology "
"DS3000/TS2020 hardware");
MODULE_AUTHOR("Konstantin Dimitrov");
MODULE_LICENSE("GPL");
MODULE_FIRMWARE(DS3000_DEFAULT_FIRMWARE);

4
drivers/media/dvb-frontends/l64781.c
View file

@ -180,11 +180,11 @@ static int apply_frontend_param(struct dvb_frontend *fe)
p->transmission_mode != TRANSMISSION_MODE_8K)
return -EINVAL;
if (p->guard_interval < GUARD_INTERVAL_1_32 ||
if ((int)p->guard_interval < GUARD_INTERVAL_1_32 ||
p->guard_interval > GUARD_INTERVAL_1_4)
return -EINVAL;
if (p->hierarchy < HIERARCHY_NONE ||
if ((int)p->hierarchy < HIERARCHY_NONE ||
p->hierarchy > HIERARCHY_4)
return -EINVAL;

4
drivers/media/dvb-frontends/mt312.c
View file

@ -549,7 +549,7 @@ static int mt312_set_frontend(struct dvb_frontend *fe)
|| (p->frequency > fe->ops.info.frequency_max))
return -EINVAL;
if ((p->inversion < INVERSION_OFF)
if (((int)p->inversion < INVERSION_OFF)
|| (p->inversion > INVERSION_ON))
return -EINVAL;
@ -557,7 +557,7 @@ static int mt312_set_frontend(struct dvb_frontend *fe)
|| (p->symbol_rate > fe->ops.info.symbol_rate_max))
return -EINVAL;
if ((p->fec_inner < FEC_NONE)
if (((int)p->fec_inner < FEC_NONE)
|| (p->fec_inner > FEC_AUTO))
return -EINVAL;

6
drivers/media/dvb-frontends/rtl2830.c
View file

@ -130,7 +130,7 @@ static int rtl2830_rd_reg(struct rtl2830_priv *priv, u16 reg, u8 *val)
}
/* write single register with mask */
int rtl2830_wr_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 val, u8 mask)
static int rtl2830_wr_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 val, u8 mask)
{
int ret;
u8 tmp;
@ -150,7 +150,7 @@ int rtl2830_wr_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 val, u8 mask)
}
/* read single register with mask */
int rtl2830_rd_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 *val, u8 mask)
static int rtl2830_rd_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 *val, u8 mask)
{
int ret, i;
u8 tmp;
@ -256,7 +256,7 @@ static int rtl2830_sleep(struct dvb_frontend *fe)
return 0;
}
int rtl2830_get_tune_settings(struct dvb_frontend *fe,
static int rtl2830_get_tune_settings(struct dvb_frontend *fe,
struct dvb_frontend_tune_settings *s)
{
s->min_delay_ms = 500;

6
drivers/media/dvb-frontends/rtl2832.c
View file

@ -265,7 +265,7 @@ static int rtl2832_rd_reg(struct rtl2832_priv *priv, u8 reg, u8 page, u8 *val)
return rtl2832_rd_regs(priv, reg, page, val, 1);
}
int rtl2832_rd_demod_reg(struct rtl2832_priv *priv, int reg, u32 *val)
static int rtl2832_rd_demod_reg(struct rtl2832_priv *priv, int reg, u32 *val)
{
int ret;
@ -305,7 +305,7 @@ err:
}
int rtl2832_wr_demod_reg(struct rtl2832_priv *priv, int reg, u32 val)
static int rtl2832_wr_demod_reg(struct rtl2832_priv *priv, int reg, u32 val)
{
int ret, i;
u8 len;
@ -510,7 +510,7 @@ static int rtl2832_sleep(struct dvb_frontend *fe)
return 0;
}
int rtl2832_get_tune_settings(struct dvb_frontend *fe,
static int rtl2832_get_tune_settings(struct dvb_frontend *fe,
struct dvb_frontend_tune_settings *s)
{
struct rtl2832_priv *priv = fe->demodulator_priv;

2
drivers/media/dvb-frontends/stb0899_drv.c
View file

@ -1260,7 +1260,7 @@ static inline void CONVERT32(u32 x, char *str)
*str = '\0';
}
int stb0899_get_dev_id(struct stb0899_state *state)
static int stb0899_get_dev_id(struct stb0899_state *state)
{
u8 chip_id, release;
u16 id;

19
drivers/media/dvb-frontends/stv0367.c
View file

@ -879,7 +879,8 @@ static u8 stv0367_readbits(struct stv0367_state *state, u32 label)
return val;
}
u8 stv0367_getbits(u8 reg, u32 label)
#if 0 /* Currently, unused */
static u8 stv0367_getbits(u8 reg, u32 label)
{
u8 mask, pos;
@ -887,7 +888,7 @@ u8 stv0367_getbits(u8 reg, u32 label)
return (reg & mask) >> pos;
}
#endif
static int stv0367ter_gate_ctrl(struct dvb_frontend *fe, int enable)
{
struct stv0367_state *state = fe->demodulator_priv;
@ -1263,8 +1264,8 @@ stv0367_ter_signal_type stv0367ter_check_cpamp(struct stv0367_state *state,
return CPAMPStatus;
}
enum
stv0367_ter_signal_type stv0367ter_lock_algo(struct stv0367_state *state)
static enum stv0367_ter_signal_type
stv0367ter_lock_algo(struct stv0367_state *state)
{
enum stv0367_ter_signal_type ret_flag;
short int wd, tempo;
@ -1528,7 +1529,7 @@ static int stv0367ter_sleep(struct dvb_frontend *fe)
return stv0367ter_standby(fe, 1);
}
int stv0367ter_init(struct dvb_frontend *fe)
static int stv0367ter_init(struct dvb_frontend *fe)
{
struct stv0367_state *state = fe->demodulator_priv;
struct stv0367ter_state *ter_state = state->ter_state;
@ -2378,9 +2379,9 @@ static u32 stv0367cab_get_adc_freq(struct dvb_frontend *fe, u32 ExtClk_Hz)
return ADCClk_Hz;
}
enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state,
u32 SymbolRate,
enum stv0367cab_mod QAMSize)
static enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state,
u32 SymbolRate,
enum stv0367cab_mod QAMSize)
{
/* Set QAM size */
stv0367_writebits(state, F367CAB_QAM_MODE, QAMSize);
@ -2762,7 +2763,7 @@ static int stv0367cab_sleep(struct dvb_frontend *fe)
return stv0367cab_standby(fe, 1);
}
int stv0367cab_init(struct dvb_frontend *fe)
static int stv0367cab_init(struct dvb_frontend *fe)
{
struct stv0367_state *state = fe->demodulator_priv;
struct stv0367cab_state *cab_state = state->cab_state;

6
drivers/media/dvb-frontends/tda10071.c
View file

@ -96,7 +96,8 @@ static int tda10071_rd_reg(struct tda10071_priv *priv, u8 reg, u8 *val)
}
/* write single register with mask */
int tda10071_wr_reg_mask(struct tda10071_priv *priv, u8 reg, u8 val, u8 mask)
static int tda10071_wr_reg_mask(struct tda10071_priv *priv,
u8 reg, u8 val, u8 mask)
{
int ret;
u8 tmp;
@ -116,7 +117,8 @@ int tda10071_wr_reg_mask(struct tda10071_priv *priv, u8 reg, u8 val, u8 mask)
}
/* read single register with mask */
int tda10071_rd_reg_mask(struct tda10071_priv *priv, u8 reg, u8 *val, u8 mask)
static int tda10071_rd_reg_mask(struct tda10071_priv *priv,
u8 reg, u8 *val, u8 mask)
{
int ret, i;
u8 tmp;

1
drivers/media/dvb-frontends/tda18271c2dd.c
View file

@ -32,6 +32,7 @@
#include <asm/div64.h>
#include "dvb_frontend.h"
#include "tda18271c2dd.h"
struct SStandardParam {
s32 m_IFFrequency;

1
drivers/media/firewire/firedtv.h
View file

@ -13,6 +13,7 @@
#ifndef _FIREDTV_H
#define _FIREDTV_H
#include <linux/time.h>
#include <linux/dvb/dmx.h>
#include <linux/dvb/frontend.h>
#include <linux/list.h>

4
drivers/media/i2c/adp1653.c
View file

@ -3,10 +3,10 @@
*
* Copyright (C) 2008--2011 Nokia Corporation
*
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* Contributors:
* Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Sakari Ailus <sakari.ailus@iki.fi>
* Tuukka Toivonen <tuukkat76@gmail.com>
*
* This program is free software; you can redistribute it and/or

13
drivers/media/i2c/adv7183.c
View file

@ -681,18 +681,7 @@ static struct i2c_driver adv7183_driver = {
.id_table = adv7183_id,
};
static __init int adv7183_init(void)
{
return i2c_add_driver(&adv7183_driver);
}
static __exit void adv7183_exit(void)
{
i2c_del_driver(&adv7183_driver);
}
module_init(adv7183_init);
module_exit(adv7183_exit);
module_i2c_driver(adv7183_driver);
MODULE_DESCRIPTION("Analog Devices ADV7183 video decoder driver");
MODULE_AUTHOR("Scott Jiang <[email protected]>");

16
drivers/media/i2c/adv7604.c
View file

@ -486,9 +486,19 @@ static inline int edid_read_block(struct v4l2_subdev *sd, unsigned len, u8 *val)
struct i2c_client *client = state->i2c_edid;
u8 msgbuf0[1] = { 0 };
u8 msgbuf1[256];
struct i2c_msg msg[2] = { { client->addr, 0, 1, msgbuf0 },
{ client->addr, 0 | I2C_M_RD, len, msgbuf1 }
};
struct i2c_msg msg[2] = {
{
.addr = client->addr,
.len = 1,
.buf = msgbuf0
},
{
.addr = client->addr,
.flags = I2C_M_RD,
.len = len,
.buf = msgbuf1
},
};
if (i2c_transfer(client->adapter, msg, 2) < 0)
return -EIO;

2
drivers/media/i2c/cx25840/cx25840-core.c
View file

@ -2065,7 +2065,7 @@ static int cx25840_irq_handler(struct v4l2_subdev *sd, u32 status,
#define DIF_BPF_COEFF3435 (0x38c)
#define DIF_BPF_COEFF36 (0x390)
void cx23885_dif_setup(struct i2c_client *client, u32 ifHz)
static void cx23885_dif_setup(struct i2c_client *client, u32 ifHz)
{
u64 pll_freq;
u32 pll_freq_word;

14
drivers/media/i2c/ir-kbd-i2c.c
View file

@ -284,7 +284,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
char *ir_codes = NULL;
const char *name = NULL;
u64 rc_type = RC_TYPE_UNKNOWN;
u64 rc_type = RC_BIT_UNKNOWN;
struct IR_i2c *ir;
struct rc_dev *rc = NULL;
struct i2c_adapter *adap = client->adapter;
@ -303,7 +303,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
case 0x64:
name = "Pixelview";
ir->get_key = get_key_pixelview;
rc_type = RC_TYPE_OTHER;
rc_type = RC_BIT_OTHER;
ir_codes = RC_MAP_EMPTY;
break;
case 0x18:
@ -311,31 +311,31 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
case 0x1a:
name = "Hauppauge";
ir->get_key = get_key_haup;
rc_type = RC_TYPE_RC5;
rc_type = RC_BIT_RC5;
ir_codes = RC_MAP_HAUPPAUGE;
break;
case 0x30:
name = "KNC One";
ir->get_key = get_key_knc1;
rc_type = RC_TYPE_OTHER;
rc_type = RC_BIT_OTHER;
ir_codes = RC_MAP_EMPTY;
break;
case 0x6b:
name = "FusionHDTV";
ir->get_key = get_key_fusionhdtv;
rc_type = RC_TYPE_RC5;
rc_type = RC_BIT_RC5;
ir_codes = RC_MAP_FUSIONHDTV_MCE;
break;
case 0x40:
name = "AVerMedia Cardbus remote";
ir->get_key = get_key_avermedia_cardbus;
rc_type = RC_TYPE_OTHER;
rc_type = RC_BIT_OTHER;
ir_codes = RC_MAP_AVERMEDIA_CARDBUS;
break;
case 0x71:
name = "Hauppauge/Zilog Z8";
ir->get_key = get_key_haup_xvr;
rc_type = RC_TYPE_RC5;
rc_type = RC_BIT_RC5;
ir_codes = RC_MAP_HAUPPAUGE;
break;
}

2
drivers/media/i2c/s5k4ecgx.c
View file

@ -343,7 +343,7 @@ static int s5k4ecgx_load_firmware(struct v4l2_subdev *sd)
}
regs_num = le32_to_cpu(get_unaligned_le32(fw->data));
v4l2_dbg(3, debug, sd, "FW: %s size %d register sets %d\n",
v4l2_dbg(3, debug, sd, "FW: %s size %zu register sets %d\n",
S5K4ECGX_FIRMWARE, fw->size, regs_num);
regs_num++; /* Add header */

219
drivers/media/i2c/smiapp-pll.c
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@ -58,7 +58,7 @@ static int bounds_check(struct device *dev, uint32_t val,
if (val >= min && val <= max)
return 0;
dev_warn(dev, "%s out of bounds: %d (%d--%d)\n", str, val, min, max);
dev_dbg(dev, "%s out of bounds: %d (%d--%d)\n", str, val, min, max);
return -EINVAL;
}
@ -87,14 +87,14 @@ static void print_pll(struct device *dev, struct smiapp_pll *pll)
dev_dbg(dev, "vt_pix_clk_freq_hz \t%d\n", pll->vt_pix_clk_freq_hz);
}
int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
struct smiapp_pll *pll)
static int __smiapp_pll_calculate(struct device *dev,
const struct smiapp_pll_limits *limits,
struct smiapp_pll *pll, uint32_t mul,
uint32_t div, uint32_t lane_op_clock_ratio)
{
uint32_t sys_div;
uint32_t best_pix_div = INT_MAX >> 1;
uint32_t vt_op_binning_div;
uint32_t lane_op_clock_ratio;
uint32_t mul, div;
uint32_t more_mul_min, more_mul_max;
uint32_t more_mul_factor;
uint32_t min_vt_div, max_vt_div, vt_div;
@ -102,54 +102,6 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
unsigned int i;
int rval;
if (pll->flags & SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE)
lane_op_clock_ratio = pll->lanes;
else
lane_op_clock_ratio = 1;
dev_dbg(dev, "lane_op_clock_ratio: %d\n", lane_op_clock_ratio);
dev_dbg(dev, "binning: %dx%d\n", pll->binning_horizontal,
pll->binning_vertical);
/* CSI transfers 2 bits per clock per lane; thus times 2 */
pll->pll_op_clk_freq_hz = pll->link_freq * 2
* (pll->lanes / lane_op_clock_ratio);
/* Figure out limits for pre-pll divider based on extclk */
dev_dbg(dev, "min / max pre_pll_clk_div: %d / %d\n",
limits->min_pre_pll_clk_div, limits->max_pre_pll_clk_div);
limits->max_pre_pll_clk_div =
min_t(uint16_t, limits->max_pre_pll_clk_div,
clk_div_even(pll->ext_clk_freq_hz /
limits->min_pll_ip_freq_hz));
limits->min_pre_pll_clk_div =
max_t(uint16_t, limits->min_pre_pll_clk_div,
clk_div_even_up(
DIV_ROUND_UP(pll->ext_clk_freq_hz,
limits->max_pll_ip_freq_hz)));
dev_dbg(dev, "pre-pll check: min / max pre_pll_clk_div: %d / %d\n",
limits->min_pre_pll_clk_div, limits->max_pre_pll_clk_div);
i = gcd(pll->pll_op_clk_freq_hz, pll->ext_clk_freq_hz);
mul = div_u64(pll->pll_op_clk_freq_hz, i);
div = pll->ext_clk_freq_hz / i;
dev_dbg(dev, "mul %d / div %d\n", mul, div);
limits->min_pre_pll_clk_div =
max_t(uint16_t, limits->min_pre_pll_clk_div,
clk_div_even_up(
DIV_ROUND_UP(mul * pll->ext_clk_freq_hz,
limits->max_pll_op_freq_hz)));
dev_dbg(dev, "pll_op check: min / max pre_pll_clk_div: %d / %d\n",
limits->min_pre_pll_clk_div, limits->max_pre_pll_clk_div);
if (limits->min_pre_pll_clk_div > limits->max_pre_pll_clk_div) {
dev_err(dev, "unable to compute pre_pll divisor\n");
return -EINVAL;
}
pll->pre_pll_clk_div = limits->min_pre_pll_clk_div;
/*
* Get pre_pll_clk_div so that our pll_op_clk_freq_hz won't be
* too high.
@ -162,7 +114,7 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
more_mul_max);
/* Don't go above max pll op frequency. */
more_mul_max =
min_t(int,
min_t(uint32_t,
more_mul_max,
limits->max_pll_op_freq_hz
/ (pll->ext_clk_freq_hz / pll->pre_pll_clk_div * mul));
@ -170,7 +122,7 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
more_mul_max);
/* Don't go above the division capability of op sys clock divider. */
more_mul_max = min(more_mul_max,
limits->max_op_sys_clk_div * pll->pre_pll_clk_div
limits->op.max_sys_clk_div * pll->pre_pll_clk_div
/ div);
dev_dbg(dev, "more_mul_max: max_op_sys_clk_div check: %d\n",
more_mul_max);
@ -193,14 +145,14 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
more_mul_min);
if (more_mul_min > more_mul_max) {
dev_warn(dev,
"unable to compute more_mul_min and more_mul_max");
dev_dbg(dev,
"unable to compute more_mul_min and more_mul_max\n");
return -EINVAL;
}
more_mul_factor = lcm(div, pll->pre_pll_clk_div) / div;
dev_dbg(dev, "more_mul_factor: %d\n", more_mul_factor);
more_mul_factor = lcm(more_mul_factor, limits->min_op_sys_clk_div);
more_mul_factor = lcm(more_mul_factor, limits->op.min_sys_clk_div);
dev_dbg(dev, "more_mul_factor: min_op_sys_clk_div: %d\n",
more_mul_factor);
i = roundup(more_mul_min, more_mul_factor);
@ -209,7 +161,7 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
dev_dbg(dev, "final more_mul: %d\n", i);
if (i > more_mul_max) {
dev_warn(dev, "final more_mul is bad, max %d", more_mul_max);
dev_dbg(dev, "final more_mul is bad, max %d\n", more_mul_max);
return -EINVAL;
}
@ -268,19 +220,19 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
dev_dbg(dev, "min_vt_div: %d\n", min_vt_div);
min_vt_div = max(min_vt_div,
DIV_ROUND_UP(pll->pll_op_clk_freq_hz,
limits->max_vt_pix_clk_freq_hz));
limits->vt.max_pix_clk_freq_hz));
dev_dbg(dev, "min_vt_div: max_vt_pix_clk_freq_hz: %d\n",
min_vt_div);
min_vt_div = max_t(uint32_t, min_vt_div,
limits->min_vt_pix_clk_div
* limits->min_vt_sys_clk_div);
limits->vt.min_pix_clk_div
* limits->vt.min_sys_clk_div);
dev_dbg(dev, "min_vt_div: min_vt_clk_div: %d\n", min_vt_div);
max_vt_div = limits->max_vt_sys_clk_div * limits->max_vt_pix_clk_div;
max_vt_div = limits->vt.max_sys_clk_div * limits->vt.max_pix_clk_div;
dev_dbg(dev, "max_vt_div: %d\n", max_vt_div);
max_vt_div = min(max_vt_div,
DIV_ROUND_UP(pll->pll_op_clk_freq_hz,
limits->min_vt_pix_clk_freq_hz));
limits->vt.min_pix_clk_freq_hz));
dev_dbg(dev, "max_vt_div: min_vt_pix_clk_freq_hz: %d\n",
max_vt_div);
@ -288,28 +240,28 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
* Find limitsits for sys_clk_div. Not all values are possible
* with all values of pix_clk_div.
*/
min_sys_div = limits->min_vt_sys_clk_div;
min_sys_div = limits->vt.min_sys_clk_div;
dev_dbg(dev, "min_sys_div: %d\n", min_sys_div);
min_sys_div = max(min_sys_div,
DIV_ROUND_UP(min_vt_div,
limits->max_vt_pix_clk_div));
limits->vt.max_pix_clk_div));
dev_dbg(dev, "min_sys_div: max_vt_pix_clk_div: %d\n", min_sys_div);
min_sys_div = max(min_sys_div,
pll->pll_op_clk_freq_hz
/ limits->max_vt_sys_clk_freq_hz);
/ limits->vt.max_sys_clk_freq_hz);
dev_dbg(dev, "min_sys_div: max_pll_op_clk_freq_hz: %d\n", min_sys_div);
min_sys_div = clk_div_even_up(min_sys_div);
dev_dbg(dev, "min_sys_div: one or even: %d\n", min_sys_div);
max_sys_div = limits->max_vt_sys_clk_div;
max_sys_div = limits->vt.max_sys_clk_div;
dev_dbg(dev, "max_sys_div: %d\n", max_sys_div);
max_sys_div = min(max_sys_div,
DIV_ROUND_UP(max_vt_div,
limits->min_vt_pix_clk_div));
limits->vt.min_pix_clk_div));
dev_dbg(dev, "max_sys_div: min_vt_pix_clk_div: %d\n", max_sys_div);
max_sys_div = min(max_sys_div,
DIV_ROUND_UP(pll->pll_op_clk_freq_hz,
limits->min_vt_pix_clk_freq_hz));
limits->vt.min_pix_clk_freq_hz));
dev_dbg(dev, "max_sys_div: min_vt_pix_clk_freq_hz: %d\n", max_sys_div);
/*
@ -322,15 +274,15 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
for (sys_div = min_sys_div;
sys_div <= max_sys_div;
sys_div += 2 - (sys_div & 1)) {
int pix_div = DIV_ROUND_UP(vt_div, sys_div);
uint16_t pix_div = DIV_ROUND_UP(vt_div, sys_div);
if (pix_div < limits->min_vt_pix_clk_div
|| pix_div > limits->max_vt_pix_clk_div) {
if (pix_div < limits->vt.min_pix_clk_div
|| pix_div > limits->vt.max_pix_clk_div) {
dev_dbg(dev,
"pix_div %d too small or too big (%d--%d)\n",
pix_div,
limits->min_vt_pix_clk_div,
limits->max_vt_pix_clk_div);
limits->vt.min_pix_clk_div,
limits->vt.max_pix_clk_div);
continue;
}
@ -354,16 +306,10 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
pll->pixel_rate_csi =
pll->op_pix_clk_freq_hz * lane_op_clock_ratio;
print_pll(dev, pll);
rval = bounds_check(dev, pll->pre_pll_clk_div,
limits->min_pre_pll_clk_div,
limits->max_pre_pll_clk_div, "pre_pll_clk_div");
if (!rval)
rval = bounds_check(
dev, pll->pll_ip_clk_freq_hz,
limits->min_pll_ip_freq_hz, limits->max_pll_ip_freq_hz,
"pll_ip_clk_freq_hz");
rval = bounds_check(dev, pll->pll_ip_clk_freq_hz,
limits->min_pll_ip_freq_hz,
limits->max_pll_ip_freq_hz,
"pll_ip_clk_freq_hz");
if (!rval)
rval = bounds_check(
dev, pll->pll_multiplier,
@ -377,42 +323,121 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
if (!rval)
rval = bounds_check(
dev, pll->op_sys_clk_div,
limits->min_op_sys_clk_div, limits->max_op_sys_clk_div,
limits->op.min_sys_clk_div, limits->op.max_sys_clk_div,
"op_sys_clk_div");
if (!rval)
rval = bounds_check(
dev, pll->op_pix_clk_div,
limits->min_op_pix_clk_div, limits->max_op_pix_clk_div,
limits->op.min_pix_clk_div, limits->op.max_pix_clk_div,
"op_pix_clk_div");
if (!rval)
rval = bounds_check(
dev, pll->op_sys_clk_freq_hz,
limits->min_op_sys_clk_freq_hz,
limits->max_op_sys_clk_freq_hz,
limits->op.min_sys_clk_freq_hz,
limits->op.max_sys_clk_freq_hz,
"op_sys_clk_freq_hz");
if (!rval)
rval = bounds_check(
dev, pll->op_pix_clk_freq_hz,
limits->min_op_pix_clk_freq_hz,
limits->max_op_pix_clk_freq_hz,
limits->op.min_pix_clk_freq_hz,
limits->op.max_pix_clk_freq_hz,
"op_pix_clk_freq_hz");
if (!rval)
rval = bounds_check(
dev, pll->vt_sys_clk_freq_hz,
limits->min_vt_sys_clk_freq_hz,
limits->max_vt_sys_clk_freq_hz,
limits->vt.min_sys_clk_freq_hz,
limits->vt.max_sys_clk_freq_hz,
"vt_sys_clk_freq_hz");
if (!rval)
rval = bounds_check(
dev, pll->vt_pix_clk_freq_hz,
limits->min_vt_pix_clk_freq_hz,
limits->max_vt_pix_clk_freq_hz,
limits->vt.min_pix_clk_freq_hz,
limits->vt.max_pix_clk_freq_hz,
"vt_pix_clk_freq_hz");
return rval;
}
int smiapp_pll_calculate(struct device *dev,
const struct smiapp_pll_limits *limits,
struct smiapp_pll *pll)
{
uint16_t min_pre_pll_clk_div;
uint16_t max_pre_pll_clk_div;
uint32_t lane_op_clock_ratio;
uint32_t mul, div;
unsigned int i;
int rval = -EINVAL;
if (pll->flags & SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE)
lane_op_clock_ratio = pll->csi2.lanes;
else
lane_op_clock_ratio = 1;
dev_dbg(dev, "lane_op_clock_ratio: %d\n", lane_op_clock_ratio);
dev_dbg(dev, "binning: %dx%d\n", pll->binning_horizontal,
pll->binning_vertical);
switch (pll->bus_type) {
case SMIAPP_PLL_BUS_TYPE_CSI2:
/* CSI transfers 2 bits per clock per lane; thus times 2 */
pll->pll_op_clk_freq_hz = pll->link_freq * 2
* (pll->csi2.lanes / lane_op_clock_ratio);
break;
case SMIAPP_PLL_BUS_TYPE_PARALLEL:
pll->pll_op_clk_freq_hz = pll->link_freq * pll->bits_per_pixel
/ DIV_ROUND_UP(pll->bits_per_pixel,
pll->parallel.bus_width);
break;
default:
return -EINVAL;
}
/* Figure out limits for pre-pll divider based on extclk */
dev_dbg(dev, "min / max pre_pll_clk_div: %d / %d\n",
limits->min_pre_pll_clk_div, limits->max_pre_pll_clk_div);
max_pre_pll_clk_div =
min_t(uint16_t, limits->max_pre_pll_clk_div,
clk_div_even(pll->ext_clk_freq_hz /
limits->min_pll_ip_freq_hz));
min_pre_pll_clk_div =
max_t(uint16_t, limits->min_pre_pll_clk_div,
clk_div_even_up(
DIV_ROUND_UP(pll->ext_clk_freq_hz,
limits->max_pll_ip_freq_hz)));
dev_dbg(dev, "pre-pll check: min / max pre_pll_clk_div: %d / %d\n",
min_pre_pll_clk_div, max_pre_pll_clk_div);
i = gcd(pll->pll_op_clk_freq_hz, pll->ext_clk_freq_hz);
mul = div_u64(pll->pll_op_clk_freq_hz, i);
div = pll->ext_clk_freq_hz / i;
dev_dbg(dev, "mul %d / div %d\n", mul, div);
min_pre_pll_clk_div =
max_t(uint16_t, min_pre_pll_clk_div,
clk_div_even_up(
DIV_ROUND_UP(mul * pll->ext_clk_freq_hz,
limits->max_pll_op_freq_hz)));
dev_dbg(dev, "pll_op check: min / max pre_pll_clk_div: %d / %d\n",
min_pre_pll_clk_div, max_pre_pll_clk_div);
for (pll->pre_pll_clk_div = min_pre_pll_clk_div;
pll->pre_pll_clk_div <= max_pre_pll_clk_div;
pll->pre_pll_clk_div += 2 - (pll->pre_pll_clk_div & 1)) {
rval = __smiapp_pll_calculate(dev, limits, pll, mul, div,
lane_op_clock_ratio);
if (rval)
continue;
print_pll(dev, pll);
return 0;
}
dev_info(dev, "unable to compute pre_pll divisor\n");
return rval;
}
EXPORT_SYMBOL_GPL(smiapp_pll_calculate);
MODULE_AUTHOR("Sakari Ailus <[email protected]>");
MODULE_AUTHOR("Sakari Ailus <sakari.ailus@iki.fi>");
MODULE_DESCRIPTION("Generic SMIA/SMIA++ PLL calculator");
MODULE_LICENSE("GPL");

61
drivers/media/i2c/smiapp-pll.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@ -27,16 +27,34 @@
#include <linux/device.h>
/* CSI-2 or CCP-2 */
#define SMIAPP_PLL_BUS_TYPE_CSI2 0x00
#define SMIAPP_PLL_BUS_TYPE_PARALLEL 0x01
/* op pix clock is for all lanes in total normally */
#define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)
#define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1)
struct smiapp_pll {
uint8_t lanes;
/* input values */
uint8_t bus_type;
union {
struct {
uint8_t lanes;
} csi2;
struct {
uint8_t bus_width;
} parallel;
};
uint8_t flags;
uint8_t binning_horizontal;
uint8_t binning_vertical;
uint8_t scale_m;
uint8_t scale_n;
uint8_t bits_per_pixel;
uint16_t flags;
uint32_t link_freq;
/* output values */
uint16_t pre_pll_clk_div;
uint16_t pll_multiplier;
uint16_t op_sys_clk_div;
@ -55,6 +73,17 @@ struct smiapp_pll {
uint32_t pixel_rate_csi;
};
struct smiapp_pll_branch_limits {
uint16_t min_sys_clk_div;
uint16_t max_sys_clk_div;
uint32_t min_sys_clk_freq_hz;
uint32_t max_sys_clk_freq_hz;
uint16_t min_pix_clk_div;
uint16_t max_pix_clk_div;
uint32_t min_pix_clk_freq_hz;
uint32_t max_pix_clk_freq_hz;
};
struct smiapp_pll_limits {
/* Strict PLL limits */
uint32_t min_ext_clk_freq_hz;
@ -68,36 +97,18 @@ struct smiapp_pll_limits {
uint32_t min_pll_op_freq_hz;
uint32_t max_pll_op_freq_hz;
uint16_t min_vt_sys_clk_div;
uint16_t max_vt_sys_clk_div;
uint32_t min_vt_sys_clk_freq_hz;
uint32_t max_vt_sys_clk_freq_hz;
uint16_t min_vt_pix_clk_div;
uint16_t max_vt_pix_clk_div;
uint32_t min_vt_pix_clk_freq_hz;
uint32_t max_vt_pix_clk_freq_hz;
uint16_t min_op_sys_clk_div;
uint16_t max_op_sys_clk_div;
uint32_t min_op_sys_clk_freq_hz;
uint32_t max_op_sys_clk_freq_hz;
uint16_t min_op_pix_clk_div;
uint16_t max_op_pix_clk_div;
uint32_t min_op_pix_clk_freq_hz;
uint32_t max_op_pix_clk_freq_hz;
struct smiapp_pll_branch_limits vt;
struct smiapp_pll_branch_limits op;
/* Other relevant limits */
uint32_t min_line_length_pck_bin;
uint32_t min_line_length_pck;
};
/* op pix clock is for all lanes in total normally */
#define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)
#define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1)
struct device;
int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
int smiapp_pll_calculate(struct device *dev,
const struct smiapp_pll_limits *limits,
struct smiapp_pll *pll);
#endif /* SMIAPP_PLL_H */

72
drivers/media/i2c/smiapp/smiapp-core.c
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2010--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* Based on smiapp driver by Vimarsh Zutshi
* Based on jt8ev1.c by Vimarsh Zutshi
@ -252,23 +252,23 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor)
.min_pll_op_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_PLL_OP_FREQ_HZ],
.max_pll_op_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_PLL_OP_FREQ_HZ],
.min_op_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV],
.max_op_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV],
.min_op_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV],
.max_op_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV],
.min_op_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ],
.max_op_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ],
.min_op_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ],
.max_op_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ],
.op.min_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV],
.op.max_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV],
.op.min_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV],
.op.max_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV],
.op.min_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ],
.op.max_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ],
.op.min_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ],
.op.max_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ],
.min_vt_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV],
.max_vt_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV],
.min_vt_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV],
.max_vt_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV],
.min_vt_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ],
.max_vt_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ],
.min_vt_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ],
.max_vt_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ],
.vt.min_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV],
.vt.max_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV],
.vt.min_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV],
.vt.max_pix_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV],
.vt.min_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ],
.vt.max_sys_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ],
.vt.min_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ],
.vt.max_pix_clk_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ],
.min_line_length_pck_bin = sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN],
.min_line_length_pck = sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK],
@ -276,11 +276,6 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor)
struct smiapp_pll *pll = &sensor->pll;
int rval;
memset(&sensor->pll, 0, sizeof(sensor->pll));
pll->lanes = sensor->platform_data->lanes;
pll->ext_clk_freq_hz = sensor->platform_data->ext_clk;
if (sensor->minfo.smiapp_profile == SMIAPP_PROFILE_0) {
/*
* Fill in operational clock divisors limits from the
@ -288,28 +283,14 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor)
* requirements regarding them are essentially the
* same as on VT ones.
*/
lim.min_op_sys_clk_div = lim.min_vt_sys_clk_div;
lim.max_op_sys_clk_div = lim.max_vt_sys_clk_div;
lim.min_op_pix_clk_div = lim.min_vt_pix_clk_div;
lim.max_op_pix_clk_div = lim.max_vt_pix_clk_div;
lim.min_op_sys_clk_freq_hz = lim.min_vt_sys_clk_freq_hz;
lim.max_op_sys_clk_freq_hz = lim.max_vt_sys_clk_freq_hz;
lim.min_op_pix_clk_freq_hz = lim.min_vt_pix_clk_freq_hz;
lim.max_op_pix_clk_freq_hz = lim.max_vt_pix_clk_freq_hz;
/* Profile 0 sensors have no separate OP clock branch. */
pll->flags |= SMIAPP_PLL_FLAG_NO_OP_CLOCKS;
lim.op = lim.vt;
}
if (smiapp_needs_quirk(sensor,
SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE))
pll->flags |= SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE;
pll->binning_horizontal = sensor->binning_horizontal;
pll->binning_vertical = sensor->binning_vertical;
pll->link_freq =
sensor->link_freq->qmenu_int[sensor->link_freq->val];
pll->scale_m = sensor->scale_m;
pll->scale_n = sensor->limits[SMIAPP_LIMIT_SCALER_N_MIN];
pll->bits_per_pixel = sensor->csi_format->compressed;
rval = smiapp_pll_calculate(&client->dev, &lim, pll);
@ -1010,7 +991,7 @@ static int smiapp_setup_flash_strobe(struct smiapp_sensor *sensor)
* do not change, or if you do at least know what you're
* doing. :-)
*
* Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> 2010-10-25
* Sakari Ailus <sakari.ailus@iki.fi> 2010-10-25
*
* flash_strobe_length [us] / 10^6 = (tFlash_strobe_width_ctrl
* / EXTCLK freq [Hz]) * flash_strobe_adjustment
@ -2369,6 +2350,7 @@ static int smiapp_registered(struct v4l2_subdev *subdev)
{
struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);
struct i2c_client *client = v4l2_get_subdevdata(subdev);
struct smiapp_pll *pll = &sensor->pll;
struct smiapp_subdev *last = NULL;
u32 tmp;
unsigned int i;
@ -2635,6 +2617,18 @@ static int smiapp_registered(struct v4l2_subdev *subdev)
if (rval < 0)
goto out_nvm_release;
/* prepare PLL configuration input values */
pll->bus_type = SMIAPP_PLL_BUS_TYPE_CSI2;
pll->csi2.lanes = sensor->platform_data->lanes;
pll->ext_clk_freq_hz = sensor->platform_data->ext_clk;
/* Profile 0 sensors have no separate OP clock branch. */
if (sensor->minfo.smiapp_profile == SMIAPP_PROFILE_0)
pll->flags |= SMIAPP_PLL_FLAG_NO_OP_CLOCKS;
if (smiapp_needs_quirk(sensor,
SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE))
pll->flags |= SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE;
pll->scale_n = sensor->limits[SMIAPP_LIMIT_SCALER_N_MIN];
rval = smiapp_update_mode(sensor);
if (rval) {
dev_err(&client->dev, "update mode failed\n");
@ -2893,6 +2887,6 @@ static struct i2c_driver smiapp_i2c_driver = {
module_i2c_driver(smiapp_i2c_driver);
MODULE_AUTHOR("Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>");
MODULE_AUTHOR("Sakari Ailus <sakari.ailus@iki.fi>");
MODULE_DESCRIPTION("Generic SMIA/SMIA++ camera module driver");
MODULE_LICENSE("GPL");

2
drivers/media/i2c/smiapp/smiapp-limits.c
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-limits.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-quirk.c
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-quirk.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-reg-defs.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-reg.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-regs.c
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp-regs.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

2
drivers/media/i2c/smiapp/smiapp.h
View file

@ -4,7 +4,7 @@
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2010--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License

88
drivers/media/i2c/soc_camera/mt9v022.c
View file

@ -15,6 +15,7 @@
#include <linux/log2.h>
#include <linux/module.h>
#include <media/mt9v022.h>
#include <media/soc_camera.h>
#include <media/soc_mediabus.h>
#include <media/v4l2-subdev.h>
@ -50,6 +51,7 @@ MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\"");
#define MT9V022_PIXEL_OPERATION_MODE 0x0f
#define MT9V022_LED_OUT_CONTROL 0x1b
#define MT9V022_ADC_MODE_CONTROL 0x1c
#define MT9V022_REG32 0x20
#define MT9V022_ANALOG_GAIN 0x35
#define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47
#define MT9V022_PIXCLK_FV_LV 0x74
@ -71,7 +73,15 @@ MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\"");
#define MT9V022_COLUMN_SKIP 1
#define MT9V022_ROW_SKIP 4
#define is_mt9v024(id) (id == 0x1324)
#define MT9V022_HORIZONTAL_BLANKING_MIN 43
#define MT9V022_HORIZONTAL_BLANKING_MAX 1023
#define MT9V022_HORIZONTAL_BLANKING_DEF 94
#define MT9V022_VERTICAL_BLANKING_MIN 2
#define MT9V022_VERTICAL_BLANKING_MAX 3000
#define MT9V022_VERTICAL_BLANKING_DEF 45
#define is_mt9v022_rev3(id) (id == 0x1313)
#define is_mt9v024(id) (id == 0x1324)
/* MT9V022 has only one fixed colorspace per pixelcode */
struct mt9v022_datafmt {
@ -136,6 +146,8 @@ struct mt9v022 {
struct v4l2_ctrl *autogain;
struct v4l2_ctrl *gain;
};
struct v4l2_ctrl *hblank;
struct v4l2_ctrl *vblank;
struct v4l2_rect rect; /* Sensor window */
const struct mt9v022_datafmt *fmt;
const struct mt9v022_datafmt *fmts;
@ -143,6 +155,7 @@ struct mt9v022 {
int num_fmts;
int model; /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */
u16 chip_control;
u16 chip_version;
unsigned short y_skip_top; /* Lines to skip at the top */
};
@ -225,12 +238,32 @@ static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable)
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct mt9v022 *mt9v022 = to_mt9v022(client);
if (enable)
if (enable) {
/* Switch to master "normal" mode */
mt9v022->chip_control &= ~0x10;
else
if (is_mt9v022_rev3(mt9v022->chip_version) ||
is_mt9v024(mt9v022->chip_version)) {
/*
* Unset snapshot mode specific settings: clear bit 9
* and bit 2 in reg. 0x20 when in normal mode.
*/
if (reg_clear(client, MT9V022_REG32, 0x204))
return -EIO;
}
} else {
/* Switch to snapshot mode */
mt9v022->chip_control |= 0x10;
if (is_mt9v022_rev3(mt9v022->chip_version) ||
is_mt9v024(mt9v022->chip_version)) {
/*
* Required settings for snapshot mode: set bit 9
* (RST enable) and bit 2 (CR enable) in reg. 0x20
* See TechNote TN0960 or TN-09-225.
*/
if (reg_set(client, MT9V022_REG32, 0x204))
return -EIO;
}
}
if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0)
return -EIO;
@ -282,11 +315,10 @@ static int mt9v022_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
* Default 94, Phytec driver says:
* "width + horizontal blank >= 660"
*/
ret = reg_write(client, MT9V022_HORIZONTAL_BLANKING,
rect.width > 660 - 43 ? 43 :
660 - rect.width);
ret = v4l2_ctrl_s_ctrl(mt9v022->hblank,
rect.width > 660 - 43 ? 43 : 660 - rect.width);
if (!ret)
ret = reg_write(client, MT9V022_VERTICAL_BLANKING, 45);
ret = v4l2_ctrl_s_ctrl(mt9v022->vblank, 45);
if (!ret)
ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width);
if (!ret)
@ -509,6 +541,18 @@ static int mt9v022_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
range = exp->maximum - exp->minimum;
exp->val = ((data - 1) * range + 239) / 479 + exp->minimum;
return 0;
case V4L2_CID_HBLANK:
data = reg_read(client, MT9V022_HORIZONTAL_BLANKING);
if (data < 0)
return -EIO;
ctrl->val = data;
return 0;
case V4L2_CID_VBLANK:
data = reg_read(client, MT9V022_VERTICAL_BLANKING);
if (data < 0)
return -EIO;
ctrl->val = data;
return 0;
}
return -EINVAL;
}
@ -590,6 +634,16 @@ static int mt9v022_s_ctrl(struct v4l2_ctrl *ctrl)
return -EIO;
}
return 0;
case V4L2_CID_HBLANK:
if (reg_write(client, MT9V022_HORIZONTAL_BLANKING,
ctrl->val) < 0)
return -EIO;
return 0;
case V4L2_CID_VBLANK:
if (reg_write(client, MT9V022_VERTICAL_BLANKING,
ctrl->val) < 0)
return -EIO;
return 0;
}
return -EINVAL;
}
@ -621,6 +675,8 @@ static int mt9v022_video_probe(struct i2c_client *client)
goto ei2c;
}
mt9v022->chip_version = data;
mt9v022->reg = is_mt9v024(data) ? &mt9v024_register :
&mt9v022_register;
@ -819,6 +875,7 @@ static int mt9v022_probe(struct i2c_client *client,
struct mt9v022 *mt9v022;
struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
struct mt9v022_platform_data *pdata = icl->priv;
int ret;
if (!icl) {
@ -857,10 +914,21 @@ static int mt9v022_probe(struct i2c_client *client,
mt9v022->exposure = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
V4L2_CID_EXPOSURE, 1, 255, 1, 255);
mt9v022->hblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
V4L2_CID_HBLANK, MT9V022_HORIZONTAL_BLANKING_MIN,
MT9V022_HORIZONTAL_BLANKING_MAX, 1,
MT9V022_HORIZONTAL_BLANKING_DEF);
mt9v022->vblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
V4L2_CID_VBLANK, MT9V022_VERTICAL_BLANKING_MIN,
MT9V022_VERTICAL_BLANKING_MAX, 1,
MT9V022_VERTICAL_BLANKING_DEF);
mt9v022->subdev.ctrl_handler = &mt9v022->hdl;
if (mt9v022->hdl.error) {
int err = mt9v022->hdl.error;
dev_err(&client->dev, "control initialisation err %d\n", err);
kfree(mt9v022);
return err;
}
@ -871,10 +939,10 @@ static int mt9v022_probe(struct i2c_client *client,
mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT;
/*
* MT9V022 _really_ corrupts the first read out line.
* TODO: verify on i.MX31
* On some platforms the first read out line is corrupted.
* Workaround it by skipping if indicated by platform data.
*/
mt9v022->y_skip_top = 1;
mt9v022->y_skip_top = pdata ? pdata->y_skip_top : 0;
mt9v022->rect.left = MT9V022_COLUMN_SKIP;
mt9v022->rect.top = MT9V022_ROW_SKIP;
mt9v022->rect.width = MT9V022_MAX_WIDTH;

55
drivers/media/i2c/soc_camera/ov2640.c
View file

@ -586,9 +586,20 @@ static const struct regval_list ov2640_format_change_preamble_regs[] = {
ENDMARKER,
};
static const struct regval_list ov2640_yuv422_regs[] = {
static const struct regval_list ov2640_yuyv_regs[] = {
{ IMAGE_MODE, IMAGE_MODE_YUV422 },
{ 0xd7, 0x03 },
{ 0x33, 0xa0 },
{ 0xe5, 0x1f },
{ 0xe1, 0x67 },
{ RESET, 0x00 },
{ R_BYPASS, R_BYPASS_USE_DSP },
ENDMARKER,
};
static const struct regval_list ov2640_uyvy_regs[] = {
{ IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
{ 0xD7, 0x01 },
{ 0xd7, 0x01 },
{ 0x33, 0xa0 },
{ 0xe1, 0x67 },
{ RESET, 0x00 },
@ -596,7 +607,15 @@ static const struct regval_list ov2640_yuv422_regs[] = {
ENDMARKER,
};
static const struct regval_list ov2640_rgb565_regs[] = {
static const struct regval_list ov2640_rgb565_be_regs[] = {
{ IMAGE_MODE, IMAGE_MODE_RGB565 },
{ 0xd7, 0x03 },
{ RESET, 0x00 },
{ R_BYPASS, R_BYPASS_USE_DSP },
ENDMARKER,
};
static const struct regval_list ov2640_rgb565_le_regs[] = {
{ IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
{ 0xd7, 0x03 },
{ RESET, 0x00 },
@ -605,7 +624,9 @@ static const struct regval_list ov2640_rgb565_regs[] = {
};
static enum v4l2_mbus_pixelcode ov2640_codes[] = {
V4L2_MBUS_FMT_YUYV8_2X8,
V4L2_MBUS_FMT_UYVY8_2X8,
V4L2_MBUS_FMT_RGB565_2X8_BE,
V4L2_MBUS_FMT_RGB565_2X8_LE,
};
@ -787,14 +808,22 @@ static int ov2640_set_params(struct i2c_client *client, u32 *width, u32 *height,
/* select format */
priv->cfmt_code = 0;
switch (code) {
case V4L2_MBUS_FMT_RGB565_2X8_BE:
dev_dbg(&client->dev, "%s: Selected cfmt RGB565 BE", __func__);
selected_cfmt_regs = ov2640_rgb565_be_regs;
break;
case V4L2_MBUS_FMT_RGB565_2X8_LE:
dev_dbg(&client->dev, "%s: Selected cfmt RGB565", __func__);
selected_cfmt_regs = ov2640_rgb565_regs;
dev_dbg(&client->dev, "%s: Selected cfmt RGB565 LE", __func__);
selected_cfmt_regs = ov2640_rgb565_le_regs;
break;
case V4L2_MBUS_FMT_YUYV8_2X8:
dev_dbg(&client->dev, "%s: Selected cfmt YUYV (YUV422)", __func__);
selected_cfmt_regs = ov2640_yuyv_regs;
break;
default:
case V4L2_MBUS_FMT_UYVY8_2X8:
dev_dbg(&client->dev, "%s: Selected cfmt YUV422", __func__);
selected_cfmt_regs = ov2640_yuv422_regs;
dev_dbg(&client->dev, "%s: Selected cfmt UYVY", __func__);
selected_cfmt_regs = ov2640_uyvy_regs;
}
/* reset hardware */
@ -859,10 +888,12 @@ static int ov2640_g_fmt(struct v4l2_subdev *sd,
mf->code = priv->cfmt_code;
switch (mf->code) {
case V4L2_MBUS_FMT_RGB565_2X8_BE:
case V4L2_MBUS_FMT_RGB565_2X8_LE:
mf->colorspace = V4L2_COLORSPACE_SRGB;
break;
default:
case V4L2_MBUS_FMT_YUYV8_2X8:
case V4L2_MBUS_FMT_UYVY8_2X8:
mf->colorspace = V4L2_COLORSPACE_JPEG;
}
@ -879,11 +910,13 @@ static int ov2640_s_fmt(struct v4l2_subdev *sd,
switch (mf->code) {
case V4L2_MBUS_FMT_RGB565_2X8_BE:
case V4L2_MBUS_FMT_RGB565_2X8_LE:
mf->colorspace = V4L2_COLORSPACE_SRGB;
break;
default:
mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
case V4L2_MBUS_FMT_YUYV8_2X8:
case V4L2_MBUS_FMT_UYVY8_2X8:
mf->colorspace = V4L2_COLORSPACE_JPEG;
}
@ -896,21 +929,21 @@ static int ov2640_s_fmt(struct v4l2_subdev *sd,
static int ov2640_try_fmt(struct v4l2_subdev *sd,
struct v4l2_mbus_framefmt *mf)
{
const struct ov2640_win_size *win;
/*
* select suitable win
* select suitable win, but don't store it
*/
win = ov2640_select_win(&mf->width, &mf->height);
ov2640_select_win(&mf->width, &mf->height);
mf->field = V4L2_FIELD_NONE;
switch (mf->code) {
case V4L2_MBUS_FMT_RGB565_2X8_BE:
case V4L2_MBUS_FMT_RGB565_2X8_LE:
mf->colorspace = V4L2_COLORSPACE_SRGB;
break;
default:
mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
case V4L2_MBUS_FMT_YUYV8_2X8:
case V4L2_MBUS_FMT_UYVY8_2X8:
mf->colorspace = V4L2_COLORSPACE_JPEG;
}

13
drivers/media/i2c/vs6624.c
View file

@ -910,18 +910,7 @@ static struct i2c_driver vs6624_driver = {
.id_table = vs6624_id,
};
static __init int vs6624_init(void)
{
return i2c_add_driver(&vs6624_driver);
}
static __exit void vs6624_exit(void)
{
i2c_del_driver(&vs6624_driver);
}
module_init(vs6624_init);
module_exit(vs6624_exit);
module_i2c_driver(vs6624_driver);
MODULE_DESCRIPTION("VS6624 sensor driver");
MODULE_AUTHOR("Scott Jiang <[email protected]>");

3
drivers/media/mmc/siano/Kconfig
View file

@ -4,7 +4,8 @@
config SMS_SDIO_DRV
tristate "Siano SMS1xxx based MDTV via SDIO interface"
depends on DVB_CORE && RC_CORE && HAS_DMA
depends on DVB_CORE && HAS_DMA
depends on MMC
select MEDIA_COMMON_OPTIONS
---help---
Choose if you would like to have Siano's support for SDIO interface

7
drivers/media/pci/bt8xx/bttv-driver.c
View file

@ -200,7 +200,7 @@ static void flush_request_modules(struct bttv *dev)
}
#else
#define request_modules(dev)
#define flush_request_modules(dev)
#define flush_request_modules(dev) do {} while(0)
#endif /* CONFIG_MODULES */
@ -301,11 +301,10 @@ const struct bttv_tvnorm bttv_tvnorms[] = {
/* totalwidth */ 1135,
/* sqwidth */ 944,
/* vdelay */ 0x20,
/* sheight */ 576,
/* videostart0 */ 23)
/* bt878 (and bt848?) can capture another
line below active video. */
.cropcap.bounds.height = (576 + 2) + 0x20 - 2,
/* sheight */ (576 + 2) + 0x20 - 2,
/* videostart0 */ 23)
},{
.v4l2_id = V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_KR,
.name = "NTSC",

2
drivers/media/pci/cx18/cx18-alsa-main.c
View file

@ -197,7 +197,7 @@ err_exit:
return ret;
}
int cx18_alsa_load(struct cx18 *cx)
static int __init cx18_alsa_load(struct cx18 *cx)
{
struct v4l2_device *v4l2_dev = &cx->v4l2_dev;
struct cx18_stream *s;

1
drivers/media/pci/cx18/cx18-alsa-pcm.c
View file

@ -37,6 +37,7 @@
#include "cx18-streams.h"
#include "cx18-fileops.h"
#include "cx18-alsa.h"
#include "cx18-alsa-pcm.h"
static unsigned int pcm_debug;
module_param(pcm_debug, int, 0644);

2
drivers/media/pci/cx18/cx18-i2c.c
View file

@ -98,7 +98,7 @@ static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
case CX18_HW_Z8F0811_IR_RX_HAUP:
init_data->ir_codes = RC_MAP_HAUPPAUGE;
init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
init_data->type = RC_TYPE_RC5;
init_data->type = RC_BIT_RC5;
init_data->name = cx->card_name;
info.platform_data = init_data;
break;

2
drivers/media/pci/cx18/cx18-streams.c
View file

@ -97,7 +97,7 @@ static struct {
};
void cx18_dma_free(struct videobuf_queue *q,
static void cx18_dma_free(struct videobuf_queue *q,
struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
{
videobuf_waiton(q, &buf->vb, 0, 0);

45
drivers/media/pci/cx23885/altera-ci.c
View file

@ -263,7 +263,7 @@ static int netup_fpga_op_rw(struct fpga_internal *inter, int addr,
}
/* flag - mem/io, read - read/write */
int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
static int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
u8 flag, u8 read, int addr, u8 val)
{
@ -298,31 +298,32 @@ int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
return mem;
}
int altera_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
int slot, int addr)
static int altera_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
int slot, int addr)
{
return altera_ci_op_cam(en50221, slot, 0, NETUP_CI_FLG_RD, addr, 0);
}
int altera_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
int slot, int addr, u8 data)
static int altera_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
int slot, int addr, u8 data)
{
return altera_ci_op_cam(en50221, slot, 0, 0, addr, data);
}
int altera_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
static int altera_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221,
int slot, u8 addr)
{
return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL,
NETUP_CI_FLG_RD, addr, 0);
}
int altera_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
u8 addr, u8 data)
static int altera_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
u8 addr, u8 data)
{
return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL, 0, addr, data);
}
int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
static int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
{
struct altera_ci_state *state = en50221->data;
struct fpga_internal *inter = state->internal;
@ -365,13 +366,13 @@ int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
return 0;
}
int altera_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
static int altera_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
{
/* not implemented */
return 0;
}
int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
static int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
{
struct altera_ci_state *state = en50221->data;
struct fpga_internal *inter = state->internal;
@ -448,8 +449,8 @@ int altera_ci_irq(void *dev)
}
EXPORT_SYMBOL(altera_ci_irq);
int altera_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot,
int open)
static int altera_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
int slot, int open)
{
struct altera_ci_state *state = en50221->data;
@ -459,7 +460,7 @@ int altera_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot,
return state->status;
}
void altera_hw_filt_release(void *main_dev, int filt_nr)
static void altera_hw_filt_release(void *main_dev, int filt_nr)
{
struct fpga_inode *temp_int = find_inode(main_dev);
struct netup_hw_pid_filter *pid_filt = NULL;
@ -581,7 +582,7 @@ static void altera_toggle_fullts_streaming(struct netup_hw_pid_filter *pid_filt,
mutex_unlock(&inter->fpga_mutex);
}
int altera_pid_feed_control(void *demux_dev, int filt_nr,
static int altera_pid_feed_control(void *demux_dev, int filt_nr,
struct dvb_demux_feed *feed, int onoff)
{
struct fpga_inode *temp_int = find_dinode(demux_dev);
@ -603,41 +604,41 @@ int altera_pid_feed_control(void *demux_dev, int filt_nr,
}
EXPORT_SYMBOL(altera_pid_feed_control);
int altera_ci_start_feed(struct dvb_demux_feed *feed, int num)
static int altera_ci_start_feed(struct dvb_demux_feed *feed, int num)
{
altera_pid_feed_control(feed->demux, num, feed, 1);
return 0;
}
int altera_ci_stop_feed(struct dvb_demux_feed *feed, int num)
static int altera_ci_stop_feed(struct dvb_demux_feed *feed, int num)
{
altera_pid_feed_control(feed->demux, num, feed, 0);
return 0;
}
int altera_ci_start_feed_1(struct dvb_demux_feed *feed)
static int altera_ci_start_feed_1(struct dvb_demux_feed *feed)
{
return altera_ci_start_feed(feed, 1);
}
int altera_ci_stop_feed_1(struct dvb_demux_feed *feed)
static int altera_ci_stop_feed_1(struct dvb_demux_feed *feed)
{
return altera_ci_stop_feed(feed, 1);
}
int altera_ci_start_feed_2(struct dvb_demux_feed *feed)
static int altera_ci_start_feed_2(struct dvb_demux_feed *feed)
{
return altera_ci_start_feed(feed, 2);
}
int altera_ci_stop_feed_2(struct dvb_demux_feed *feed)
static int altera_ci_stop_feed_2(struct dvb_demux_feed *feed)
{
return altera_ci_stop_feed(feed, 2);
}
int altera_hw_filt_init(struct altera_ci_config *config, int hw_filt_nr)
static int altera_hw_filt_init(struct altera_ci_config *config, int hw_filt_nr)
{
struct netup_hw_pid_filter *pid_filt = NULL;
struct fpga_inode *temp_int = find_inode(config->dev);

17
drivers/media/pci/cx23885/cimax2.c
View file

@ -24,6 +24,7 @@
*/
#include "cx23885.h"
#include "cimax2.h"
#include "dvb_ca_en50221.h"
/**** Bit definitions for MC417_RWD and MC417_OEN registers ***
bits 31-16
@ -87,7 +88,7 @@ struct netup_ci_state {
};
int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
static int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
u8 *buf, int len)
{
int ret;
@ -120,7 +121,7 @@ int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
return 0;
}
int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
static int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
u8 *buf, int len)
{
int ret;
@ -147,7 +148,7 @@ int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
return 0;
}
int netup_ci_get_mem(struct cx23885_dev *dev)
static int netup_ci_get_mem(struct cx23885_dev *dev)
{
int mem;
unsigned long timeout = jiffies + msecs_to_jiffies(1);
@ -166,7 +167,7 @@ int netup_ci_get_mem(struct cx23885_dev *dev)
return mem & 0xff;
}
int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
static int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
u8 flag, u8 read, int addr, u8 data)
{
struct netup_ci_state *state = en50221->data;
@ -248,7 +249,8 @@ int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
}
int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
u8 addr)
{
return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
NETUP_CI_RD, addr, 0);
@ -295,7 +297,7 @@ int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
return 0;
}
int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
static int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
{
struct netup_ci_state *state = en50221->data;
int ret;
@ -399,7 +401,8 @@ int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
return 1;
}
int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open)
int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
int slot, int open)
{
struct netup_ci_state *state = en50221->data;

6
drivers/media/pci/cx23885/cx23885-alsa.c
View file

@ -45,8 +45,10 @@
#define AUDIO_SRAM_CHANNEL SRAM_CH07
#define dprintk(level, fmt, arg...) if (audio_debug >= level) \
printk(KERN_INFO "%s: " fmt, chip->dev->name , ## arg)
#define dprintk(level, fmt, arg...) do { \
if (audio_debug + 1 > level) \
printk(KERN_INFO "%s: " fmt, chip->dev->name , ## arg); \
} while(0)
#define dprintk_core(level, fmt, arg...) if (audio_debug >= level) \
printk(KERN_DEBUG "%s: " fmt, chip->dev->name , ## arg)

1
drivers/media/pci/cx23885/cx23885-av.c
View file

@ -22,6 +22,7 @@
*/
#include "cx23885.h"
#include "cx23885-av.h"
void cx23885_av_work_handler(struct work_struct *work)
{

2
drivers/media/pci/cx23885/cx23885-cards.c
View file

@ -1427,7 +1427,7 @@ void cx23885_ir_fini(struct cx23885_dev *dev)
}
}
int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
{
int data;
int tdo = 0;

8
drivers/media/pci/cx23885/cx23885-core.c
View file

@ -303,7 +303,7 @@ static struct sram_channel cx23887_sram_channels[] = {
},
};
void cx23885_irq_add(struct cx23885_dev *dev, u32 mask)
static void cx23885_irq_add(struct cx23885_dev *dev, u32 mask)
{
unsigned long flags;
spin_lock_irqsave(&dev->pci_irqmask_lock, flags);
@ -1516,8 +1516,7 @@ int cx23885_restart_queue(struct cx23885_tsport *port,
buf = list_entry(q->queued.next, struct cx23885_buffer,
vb.queue);
if (NULL == prev) {
list_del(&buf->vb.queue);
list_add_tail(&buf->vb.queue, &q->active);
list_move_tail(&buf->vb.queue, &q->active);
cx23885_start_dma(port, q, buf);
buf->vb.state = VIDEOBUF_ACTIVE;
buf->count = q->count++;
@ -1528,8 +1527,7 @@ int cx23885_restart_queue(struct cx23885_tsport *port,
} else if (prev->vb.width == buf->vb.width &&
prev->vb.height == buf->vb.height &&
prev->fmt == buf->fmt) {
list_del(&buf->vb.queue);
list_add_tail(&buf->vb.queue, &q->active);
list_move_tail(&buf->vb.queue, &q->active);
buf->vb.state = VIDEOBUF_ACTIVE;
buf->count = q->count++;
prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);

2
drivers/media/pci/cx23885/cx23885-dvb.c
View file

@ -659,7 +659,7 @@ static struct mt2063_config terratec_mt2063_config[] = {
},
};
int netup_altera_fpga_rw(void *device, int flag, int data, int read)
static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
{
struct cx23885_dev *dev = (struct cx23885_dev *)device;
unsigned long timeout = jiffies + msecs_to_jiffies(1);

1
drivers/media/pci/cx23885/cx23885-f300.c
View file

@ -29,6 +29,7 @@
*/
#include "cx23885.h"
#include "cx23885-f300.h"
#define F300_DATA GPIO_0
#define F300_RESET GPIO_1

7
drivers/media/pci/cx23885/cx23885-input.c
View file

@ -40,6 +40,7 @@
#include <media/v4l2-subdev.h>
#include "cx23885.h"
#include "cx23885-input.h"
#define MODULE_NAME "cx23885"
@ -270,21 +271,21 @@ int cx23885_input_init(struct cx23885_dev *dev)
case CX23885_BOARD_HAUPPAUGE_HVR1250:
/* Integrated CX2388[58] IR controller */
driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_TYPE_ALL;
allowed_protos = RC_BIT_ALL;
/* The grey Hauppauge RC-5 remote */
rc_map = RC_MAP_HAUPPAUGE;
break;
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
/* Integrated CX23885 IR controller */
driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_TYPE_NEC;
allowed_protos = RC_BIT_NEC;
/* The grey Terratec remote with orange buttons */
rc_map = RC_MAP_NEC_TERRATEC_CINERGY_XS;
break;
case CX23885_BOARD_TEVII_S470:
/* Integrated CX23885 IR controller */
driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_TYPE_ALL;
allowed_protos = RC_BIT_ALL;
/* A guess at the remote */
rc_map = RC_MAP_TEVII_NEC;
break;

2
drivers/media/pci/cx23885/cx23885-input.h
View file

@ -23,7 +23,7 @@
#ifndef _CX23885_INPUT_H_
#define _CX23885_INPUT_H_
int cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events);
void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events);
int cx23885_input_init(struct cx23885_dev *dev);
void cx23885_input_fini(struct cx23885_dev *dev);

2
drivers/media/pci/cx23885/cx23885-ioctl.c
View file

@ -22,6 +22,8 @@
*/
#include "cx23885.h"
#include "cx23885-ioctl.h"
#include <media/v4l2-chip-ident.h>
int cx23885_g_chip_ident(struct file *file, void *fh,

1
drivers/media/pci/cx23885/cx23885-ir.c
View file

@ -24,6 +24,7 @@
#include <media/v4l2-device.h>
#include "cx23885.h"
#include "cx23885-ir.h"
#include "cx23885-input.h"
#define CX23885_IR_RX_FIFO_SERVICE_REQ 0

1
drivers/media/pci/cx23885/cx23888-ir.c
View file

@ -29,6 +29,7 @@
#include <media/rc-core.h>
#include "cx23885.h"
#include "cx23888-ir.h"
static unsigned int ir_888_debug;
module_param(ir_888_debug, int, 0644);

1
drivers/media/pci/cx23885/netup-init.c
View file

@ -24,6 +24,7 @@
*/
#include "cx23885.h"
#include "netup-init.h"
static void i2c_av_write(struct i2c_adapter *i2c, u16 reg, u8 val)
{

44
drivers/media/pci/cx25821/cx25821-audio-upstream.c
View file

@ -44,7 +44,7 @@ MODULE_LICENSE("GPL");
static int _intr_msk = FLD_AUD_SRC_RISCI1 | FLD_AUD_SRC_OF |
FLD_AUD_SRC_SYNC | FLD_AUD_SRC_OPC_ERR;
int cx25821_sram_channel_setup_upstream_audio(struct cx25821_dev *dev,
static int cx25821_sram_channel_setup_upstream_audio(struct cx25821_dev *dev,
struct sram_channel *ch,
unsigned int bpl, u32 risc)
{
@ -133,7 +133,7 @@ static __le32 *cx25821_risc_field_upstream_audio(struct cx25821_dev *dev,
return rp;
}
int cx25821_risc_buffer_upstream_audio(struct cx25821_dev *dev,
static int cx25821_risc_buffer_upstream_audio(struct cx25821_dev *dev,
struct pci_dev *pci,
unsigned int bpl, unsigned int lines)
{
@ -197,7 +197,7 @@ int cx25821_risc_buffer_upstream_audio(struct cx25821_dev *dev,
return 0;
}
void cx25821_free_memory_audio(struct cx25821_dev *dev)
static void cx25821_free_memory_audio(struct cx25821_dev *dev)
{
if (dev->_risc_virt_addr) {
pci_free_consistent(dev->pci, dev->_audiorisc_size,
@ -256,7 +256,7 @@ void cx25821_free_mem_upstream_audio(struct cx25821_dev *dev)
cx25821_free_memory_audio(dev);
}
int cx25821_get_audio_data(struct cx25821_dev *dev,
static int cx25821_get_audio_data(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
struct file *myfile;
@ -351,7 +351,7 @@ static void cx25821_audioups_handler(struct work_struct *work)
sram_channels);
}
int cx25821_openfile_audio(struct cx25821_dev *dev,
static int cx25821_openfile_audio(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
struct file *myfile;
@ -490,7 +490,7 @@ error:
return ret;
}
int cx25821_audio_upstream_irq(struct cx25821_dev *dev, int chan_num,
static int cx25821_audio_upstream_irq(struct cx25821_dev *dev, int chan_num,
u32 status)
{
int i = 0;
@ -634,8 +634,8 @@ static void cx25821_wait_fifo_enable(struct cx25821_dev *dev,
}
int cx25821_start_audio_dma_upstream(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
static int cx25821_start_audio_dma_upstream(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
u32 tmp = 0;
int err = 0;
@ -700,9 +700,7 @@ fail_irq:
int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
{
struct sram_channel *sram_ch;
int retval = 0;
int err = 0;
int str_length = 0;
if (dev->_audio_is_running) {
pr_warn("Audio Channel is still running so return!\n");
@ -731,27 +729,29 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
_line_size = AUDIO_LINE_SIZE;
if (dev->input_audiofilename) {
str_length = strlen(dev->input_audiofilename);
dev->_audiofilename = kmemdup(dev->input_audiofilename,
str_length + 1, GFP_KERNEL);
dev->_audiofilename = kstrdup(dev->input_audiofilename,
GFP_KERNEL);
if (!dev->_audiofilename)
if (!dev->_audiofilename) {
err = -ENOMEM;
goto error;
}
/* Default if filename is empty string */
if (strcmp(dev->input_audiofilename, "") == 0)
dev->_audiofilename = "/root/audioGOOD.wav";
} else {
str_length = strlen(_defaultAudioName);
dev->_audiofilename = kmemdup(_defaultAudioName,
str_length + 1, GFP_KERNEL);
dev->_audiofilename = kstrdup(_defaultAudioName,
GFP_KERNEL);
if (!dev->_audiofilename)
if (!dev->_audiofilename) {
err = -ENOMEM;
goto error;
}
}
retval = cx25821_sram_channel_setup_upstream_audio(dev, sram_ch,
_line_size, 0);
cx25821_sram_channel_setup_upstream_audio(dev, sram_ch,
_line_size, 0);
dev->audio_upstream_riscbuf_size =
AUDIO_RISC_DMA_BUF_SIZE * NUM_AUDIO_PROGS +
@ -759,9 +759,9 @@ int cx25821_audio_upstream_init(struct cx25821_dev *dev, int channel_select)
dev->audio_upstream_databuf_size = AUDIO_DATA_BUF_SZ * NUM_AUDIO_PROGS;
/* Allocating buffers and prepare RISC program */
retval = cx25821_audio_upstream_buffer_prepare(dev, sram_ch,
err = cx25821_audio_upstream_buffer_prepare(dev, sram_ch,
_line_size);
if (retval < 0) {
if (err < 0) {
pr_err("%s: Failed to set up Audio upstream buffers!\n",
dev->name);
goto error;

6
drivers/media/pci/cx25821/cx25821-biffuncs.h
View file

@ -25,17 +25,17 @@
#define SetBit(Bit) (1 << Bit)
inline u8 getBit(u32 sample, u8 index)
static inline u8 getBit(u32 sample, u8 index)
{
return (u8) ((sample >> index) & 1);
}
inline u32 clearBitAtPos(u32 value, u8 bit)
static inline u32 clearBitAtPos(u32 value, u8 bit)
{
return value & ~(1 << bit);
}
inline u32 setBitAtPos(u32 sample, u8 bit)
static inline u32 setBitAtPos(u32 sample, u8 bit)
{
sample |= (1 << bit);
return sample;

4
drivers/media/pci/cx25821/cx25821-i2c.c
View file

@ -329,7 +329,8 @@ int cx25821_i2c_unregister(struct cx25821_i2c *bus)
return 0;
}
void cx25821_av_clk(struct cx25821_dev *dev, int enable)
#if 0 /* Currently unused */
static void cx25821_av_clk(struct cx25821_dev *dev, int enable)
{
/* write 0 to bus 2 addr 0x144 via i2x_xfer() */
char buffer[3];
@ -351,6 +352,7 @@ void cx25821_av_clk(struct cx25821_dev *dev, int enable)
i2c_xfer(&dev->i2c_bus[0].i2c_adap, &msg, 1);
}
#endif
int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value)
{

54
drivers/media/pci/cx25821/cx25821-video-upstream-ch2.c
View file

@ -123,10 +123,11 @@ static __le32 *cx25821_risc_field_upstream_ch2(struct cx25821_dev *dev,
return rp;
}
int cx25821_risc_buffer_upstream_ch2(struct cx25821_dev *dev,
struct pci_dev *pci,
unsigned int top_offset, unsigned int bpl,
unsigned int lines)
static int cx25821_risc_buffer_upstream_ch2(struct cx25821_dev *dev,
struct pci_dev *pci,
unsigned int top_offset,
unsigned int bpl,
unsigned int lines)
{
__le32 *rp;
int fifo_enable = 0;
@ -255,7 +256,8 @@ void cx25821_free_mem_upstream_ch2(struct cx25821_dev *dev)
}
}
int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
static int cx25821_get_frame_ch2(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
struct file *myfile;
int frame_index_temp = dev->_frame_index_ch2;
@ -360,7 +362,8 @@ static void cx25821_vidups_handler_ch2(struct work_struct *work)
_channel2_upstream_select].sram_channels);
}
int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
static int cx25821_openfile_ch2(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
struct file *myfile;
int i = 0, j = 0;
@ -507,8 +510,9 @@ error:
return ret;
}
int cx25821_video_upstream_irq_ch2(struct cx25821_dev *dev, int chan_num,
u32 status)
static int cx25821_video_upstream_irq_ch2(struct cx25821_dev *dev,
int chan_num,
u32 status)
{
u32 int_msk_tmp;
struct sram_channel *channel = dev->channels[chan_num].sram_channels;
@ -647,8 +651,8 @@ static void cx25821_set_pixelengine_ch2(struct cx25821_dev *dev,
cx_write(ch->vid_cdt_size, VID_CDT_SIZE >> 3);
}
int cx25821_start_video_dma_upstream_ch2(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
static int cx25821_start_video_dma_upstream_ch2(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
u32 tmp = 0;
int err = 0;
@ -704,11 +708,9 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
{
struct sram_channel *sram_ch;
u32 tmp;
int retval = 0;
int err = 0;
int data_frame_size = 0;
int risc_buffer_size = 0;
int str_length = 0;
if (dev->_is_running_ch2) {
pr_info("Video Channel is still running so return!\n");
@ -744,20 +746,16 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
risc_buffer_size = dev->_isNTSC_ch2 ?
NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE;
if (dev->input_filename_ch2) {
str_length = strlen(dev->input_filename_ch2);
dev->_filename_ch2 = kmemdup(dev->input_filename_ch2,
str_length + 1, GFP_KERNEL);
if (dev->input_filename_ch2)
dev->_filename_ch2 = kstrdup(dev->input_filename_ch2,
GFP_KERNEL);
else
dev->_filename_ch2 = kstrdup(dev->_defaultname_ch2,
GFP_KERNEL);
if (!dev->_filename_ch2)
goto error;
} else {
str_length = strlen(dev->_defaultname_ch2);
dev->_filename_ch2 = kmemdup(dev->_defaultname_ch2,
str_length + 1, GFP_KERNEL);
if (!dev->_filename_ch2)
goto error;
if (!dev->_filename_ch2) {
err = -ENOENT;
goto error;
}
/* Default if filename is empty string */
@ -773,7 +771,7 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
}
}
retval = cx25821_sram_channel_setup_upstream(dev, sram_ch,
err = cx25821_sram_channel_setup_upstream(dev, sram_ch,
dev->_line_size_ch2, 0);
/* setup fifo + format */
@ -783,9 +781,9 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select,
dev->upstream_databuf_size_ch2 = data_frame_size * 2;
/* Allocating buffers and prepare RISC program */
retval = cx25821_upstream_buffer_prepare_ch2(dev, sram_ch,
err = cx25821_upstream_buffer_prepare_ch2(dev, sram_ch,
dev->_line_size_ch2);
if (retval < 0) {
if (err < 0) {
pr_err("%s: Failed to set up Video upstream buffers!\n",
dev->name);
goto error;

47
drivers/media/pci/cx25821/cx25821-video-upstream.c
View file

@ -173,10 +173,10 @@ static __le32 *cx25821_risc_field_upstream(struct cx25821_dev *dev, __le32 * rp,
return rp;
}
int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
struct pci_dev *pci,
unsigned int top_offset,
unsigned int bpl, unsigned int lines)
static int cx25821_risc_buffer_upstream(struct cx25821_dev *dev,
struct pci_dev *pci,
unsigned int top_offset,
unsigned int bpl, unsigned int lines)
{
__le32 *rp;
int fifo_enable = 0;
@ -300,7 +300,8 @@ void cx25821_free_mem_upstream_ch1(struct cx25821_dev *dev)
}
}
int cx25821_get_frame(struct cx25821_dev *dev, struct sram_channel *sram_ch)
static int cx25821_get_frame(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
struct file *myfile;
int frame_index_temp = dev->_frame_index;
@ -405,7 +406,8 @@ static void cx25821_vidups_handler(struct work_struct *work)
sram_channels);
}
int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch)
static int cx25821_openfile(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
struct file *myfile;
int i = 0, j = 0;
@ -486,8 +488,9 @@ int cx25821_openfile(struct cx25821_dev *dev, struct sram_channel *sram_ch)
return 0;
}
int cx25821_upstream_buffer_prepare(struct cx25821_dev *dev,
struct sram_channel *sram_ch, int bpl)
static int cx25821_upstream_buffer_prepare(struct cx25821_dev *dev,
struct sram_channel *sram_ch,
int bpl)
{
int ret = 0;
dma_addr_t dma_addr;
@ -548,8 +551,8 @@ error:
return ret;
}
int cx25821_video_upstream_irq(struct cx25821_dev *dev, int chan_num,
u32 status)
static int cx25821_video_upstream_irq(struct cx25821_dev *dev, int chan_num,
u32 status)
{
u32 int_msk_tmp;
struct sram_channel *channel = dev->channels[chan_num].sram_channels;
@ -664,8 +667,9 @@ static irqreturn_t cx25821_upstream_irq(int irq, void *dev_id)
return IRQ_RETVAL(handled);
}
void cx25821_set_pixelengine(struct cx25821_dev *dev, struct sram_channel *ch,
int pix_format)
static void cx25821_set_pixelengine(struct cx25821_dev *dev,
struct sram_channel *ch,
int pix_format)
{
int width = WIDTH_D1;
int height = dev->_lines_count;
@ -696,8 +700,8 @@ void cx25821_set_pixelengine(struct cx25821_dev *dev, struct sram_channel *ch,
cx_write(ch->vid_cdt_size, VID_CDT_SIZE >> 3);
}
int cx25821_start_video_dma_upstream(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
static int cx25821_start_video_dma_upstream(struct cx25821_dev *dev,
struct sram_channel *sram_ch)
{
u32 tmp = 0;
int err = 0;
@ -753,7 +757,6 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
{
struct sram_channel *sram_ch;
u32 tmp;
int retval = 0;
int err = 0;
int data_frame_size = 0;
int risc_buffer_size = 0;
@ -796,15 +799,19 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
dev->_filename = kmemdup(dev->input_filename, str_length + 1,
GFP_KERNEL);
if (!dev->_filename)
if (!dev->_filename) {
err = -ENOENT;
goto error;
}
} else {
str_length = strlen(dev->_defaultname);
dev->_filename = kmemdup(dev->_defaultname, str_length + 1,
GFP_KERNEL);
if (!dev->_filename)
if (!dev->_filename) {
err = -ENOENT;
goto error;
}
}
/* Default if filename is empty string */
@ -828,7 +835,7 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
dev->_line_size = (dev->_pixel_format == PIXEL_FRMT_422) ?
(WIDTH_D1 * 2) : (WIDTH_D1 * 3) / 2;
retval = cx25821_sram_channel_setup_upstream(dev, sram_ch,
err = cx25821_sram_channel_setup_upstream(dev, sram_ch,
dev->_line_size, 0);
/* setup fifo + format */
@ -838,8 +845,8 @@ int cx25821_vidupstream_init_ch1(struct cx25821_dev *dev, int channel_select,
dev->upstream_databuf_size = data_frame_size * 2;
/* Allocating buffers and prepare RISC program */
retval = cx25821_upstream_buffer_prepare(dev, sram_ch, dev->_line_size);
if (retval < 0) {
err = cx25821_upstream_buffer_prepare(dev, sram_ch, dev->_line_size);
if (err < 0) {
pr_err("%s: Failed to set up Video upstream buffers!\n",
dev->name);
goto error;

8
drivers/media/pci/cx25821/cx25821-video.c
View file

@ -291,9 +291,9 @@ int cx25821_start_video_dma(struct cx25821_dev *dev,
return 0;
}
int cx25821_restart_video_queue(struct cx25821_dev *dev,
struct cx25821_dmaqueue *q,
struct sram_channel *channel)
static int cx25821_restart_video_queue(struct cx25821_dev *dev,
struct cx25821_dmaqueue *q,
struct sram_channel *channel)
{
struct cx25821_buffer *buf, *prev;
struct list_head *item;
@ -342,7 +342,7 @@ int cx25821_restart_video_queue(struct cx25821_dev *dev,
}
}
void cx25821_vid_timeout(unsigned long data)
static void cx25821_vid_timeout(unsigned long data)
{
struct cx25821_data *timeout_data = (struct cx25821_data *)data;
struct cx25821_dev *dev = timeout_data->dev;

12
drivers/media/pci/cx88/cx88-alsa.c
View file

@ -45,11 +45,15 @@
#include "cx88.h"
#include "cx88-reg.h"
#define dprintk(level,fmt, arg...) if (debug >= level) \
printk(KERN_INFO "%s/1: " fmt, chip->core->name , ## arg)
#define dprintk(level, fmt, arg...) do { \
if (debug + 1 > level) \
printk(KERN_INFO "%s/1: " fmt, chip->core->name , ## arg);\
} while(0)
#define dprintk_core(level,fmt, arg...) if (debug >= level) \
printk(KERN_DEBUG "%s/1: " fmt, chip->core->name , ## arg)
#define dprintk_core(level, fmt, arg...) do { \
if (debug + 1 > level) \
printk(KERN_DEBUG "%s/1: " fmt, chip->core->name , ## arg);\
} while(0)
/****************************************************************************
Data type declarations - Can be moded to a header file later

7
drivers/media/pci/cx88/cx88-blackbird.c
View file

@ -53,9 +53,10 @@ static unsigned int debug;
module_param(debug,int,0644);
MODULE_PARM_DESC(debug,"enable debug messages [blackbird]");
#define dprintk(level,fmt, arg...) if (debug >= level) \
printk(KERN_DEBUG "%s/2-bb: " fmt, dev->core->name , ## arg)
#define dprintk(level, fmt, arg...) do { \
if (debug + 1 > level) \
printk(KERN_DEBUG "%s/2-bb: " fmt, dev->core->name , ## arg); \
} while(0)
/* ------------------------------------------------------------------ */

12
drivers/media/pci/cx88/cx88-core.c
View file

@ -646,22 +646,22 @@ int cx88_reset(struct cx88_core *core)
/* ------------------------------------------------------------------ */
static unsigned int inline norm_swidth(v4l2_std_id norm)
static inline unsigned int norm_swidth(v4l2_std_id norm)
{
return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
}
static unsigned int inline norm_hdelay(v4l2_std_id norm)
static inline unsigned int norm_hdelay(v4l2_std_id norm)
{
return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 135 : 186;
}
static unsigned int inline norm_vdelay(v4l2_std_id norm)
static inline unsigned int norm_vdelay(v4l2_std_id norm)
{
return (norm & V4L2_STD_625_50) ? 0x24 : 0x18;
}
static unsigned int inline norm_fsc8(v4l2_std_id norm)
static inline unsigned int norm_fsc8(v4l2_std_id norm)
{
if (norm & V4L2_STD_PAL_M)
return 28604892; // 3.575611 MHz
@ -681,7 +681,7 @@ static unsigned int inline norm_fsc8(v4l2_std_id norm)
return 35468950; // 4.43361875 MHz +/- 5 Hz
}
static unsigned int inline norm_htotal(v4l2_std_id norm)
static inline unsigned int norm_htotal(v4l2_std_id norm)
{
unsigned int fsc4=norm_fsc8(norm)/2;
@ -692,7 +692,7 @@ static unsigned int inline norm_htotal(v4l2_std_id norm)
((fsc4+262)/525*1001+15000)/30000;
}
static unsigned int inline norm_vbipack(v4l2_std_id norm)
static inline unsigned int norm_vbipack(v4l2_std_id norm)
{
return (norm & V4L2_STD_625_50) ? 511 : 400;
}

8
drivers/media/pci/cx88/cx88-input.c
View file

@ -248,7 +248,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
struct cx88_IR *ir;
struct rc_dev *dev;
char *ir_codes = NULL;
u64 rc_type = RC_TYPE_OTHER;
u64 rc_type = RC_BIT_OTHER;
int err = -ENOMEM;
u32 hardware_mask = 0; /* For devices with a hardware mask, when
* used with a full-code IR table
@ -416,7 +416,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
break;
case CX88_BOARD_TWINHAN_VP1027_DVBS:
ir_codes = RC_MAP_TWINHAN_VP1027_DVBS;
rc_type = RC_TYPE_NEC;
rc_type = RC_BIT_NEC;
ir->sampling = 0xff00; /* address */
break;
}
@ -592,7 +592,7 @@ void cx88_i2c_init_ir(struct cx88_core *core)
case CX88_BOARD_LEADTEK_PVR2000:
addr_list = pvr2000_addr_list;
core->init_data.name = "cx88 Leadtek PVR 2000 remote";
core->init_data.type = RC_TYPE_UNKNOWN;
core->init_data.type = RC_BIT_UNKNOWN;
core->init_data.get_key = get_key_pvr2000;
core->init_data.ir_codes = RC_MAP_EMPTY;
break;
@ -613,7 +613,7 @@ void cx88_i2c_init_ir(struct cx88_core *core)
/* Hauppauge XVR */
core->init_data.name = "cx88 Hauppauge XVR remote";
core->init_data.ir_codes = RC_MAP_HAUPPAUGE;
core->init_data.type = RC_TYPE_RC5;
core->init_data.type = RC_BIT_RC5;
core->init_data.internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
info.platform_data = &core->init_data;

18
drivers/media/pci/cx88/cx88-mpeg.c
View file

@ -45,11 +45,15 @@ static unsigned int debug;
module_param(debug,int,0644);
MODULE_PARM_DESC(debug,"enable debug messages [mpeg]");
#define dprintk(level,fmt, arg...) if (debug >= level) \
printk(KERN_DEBUG "%s/2-mpeg: " fmt, dev->core->name, ## arg)
#define dprintk(level, fmt, arg...) do { \
if (debug + 1 > level) \
printk(KERN_DEBUG "%s/2-mpeg: " fmt, dev->core->name, ## arg); \
} while(0)
#define mpeg_dbg(level,fmt, arg...) if (debug >= level) \
printk(KERN_DEBUG "%s/2-mpeg: " fmt, core->name, ## arg)
#define mpeg_dbg(level, fmt, arg...) do { \
if (debug + 1 > level) \
printk(KERN_DEBUG "%s/2-mpeg: " fmt, core->name, ## arg); \
} while(0)
#if defined(CONFIG_MODULES) && defined(MODULE)
static void request_module_async(struct work_struct *work)
@ -217,8 +221,7 @@ static int cx8802_restart_queue(struct cx8802_dev *dev,
return 0;
buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
if (NULL == prev) {
list_del(&buf->vb.queue);
list_add_tail(&buf->vb.queue,&q->active);
list_move_tail(&buf->vb.queue, &q->active);
cx8802_start_dma(dev, q, buf);
buf->vb.state = VIDEOBUF_ACTIVE;
buf->count = q->count++;
@ -229,8 +232,7 @@ static int cx8802_restart_queue(struct cx8802_dev *dev,
} else if (prev->vb.width == buf->vb.width &&
prev->vb.height == buf->vb.height &&
prev->fmt == buf->fmt) {
list_del(&buf->vb.queue);
list_add_tail(&buf->vb.queue,&q->active);
list_move_tail(&buf->vb.queue, &q->active);
buf->vb.state = VIDEOBUF_ACTIVE;
buf->count = q->count++;
prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);

4
drivers/media/pci/cx88/cx88.h
View file

@ -94,13 +94,13 @@ enum cx8802_board_access {
/* ----------------------------------------------------------- */
/* tv norms */
static unsigned int inline norm_maxw(v4l2_std_id norm)
static inline unsigned int norm_maxw(v4l2_std_id norm)
{
return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
}
static unsigned int inline norm_maxh(v4l2_std_id norm)
static inline unsigned int norm_maxh(v4l2_std_id norm)
{
return (norm & V4L2_STD_625_50) ? 576 : 480;
}

8
drivers/media/pci/dm1105/dm1105.c
View file

@ -736,7 +736,7 @@ static irqreturn_t dm1105_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
static int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
{
struct rc_dev *dev;
int err = -ENOMEM;
@ -776,7 +776,7 @@ int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
return 0;
}
void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
static void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
{
rc_unregister_device(dm1105->ir.dev);
}
@ -1128,8 +1128,10 @@ static int __devinit dm1105_probe(struct pci_dev *pdev,
INIT_WORK(&dev->work, dm1105_dmx_buffer);
sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
dev->wq = create_singlethread_workqueue(dev->wqn);
if (!dev->wq)
if (!dev->wq) {
ret = -ENOMEM;
goto err_dvb_net;
}
ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
DRIVER_NAME, dev);

2
drivers/media/pci/ivtv/ivtv-alsa-main.c
View file

@ -205,7 +205,7 @@ err_exit:
return ret;
}
int ivtv_alsa_load(struct ivtv *itv)
static int __init ivtv_alsa_load(struct ivtv *itv)
{
struct v4l2_device *v4l2_dev = &itv->v4l2_dev;
struct ivtv_stream *s;

6
drivers/media/pci/ivtv/ivtv-alsa-pcm.c
View file

@ -37,6 +37,7 @@
#include "ivtv-streams.h"
#include "ivtv-fileops.h"
#include "ivtv-alsa.h"
#include "ivtv-alsa-pcm.h"
static unsigned int pcm_debug;
module_param(pcm_debug, int, 0644);
@ -69,8 +70,9 @@ static struct snd_pcm_hardware snd_ivtv_hw_capture = {
.periods_max = 98, /* 12544, */
};
void ivtv_alsa_announce_pcm_data(struct snd_ivtv_card *itvsc, u8 *pcm_data,
size_t num_bytes)
static void ivtv_alsa_announce_pcm_data(struct snd_ivtv_card *itvsc,
u8 *pcm_data,
size_t num_bytes)
{
struct snd_pcm_substream *substream;
struct snd_pcm_runtime *runtime;

4
drivers/media/pci/ivtv/ivtv-alsa-pcm.h
View file

@ -21,7 +21,3 @@
*/
int __init snd_ivtv_pcm_create(struct snd_ivtv_card *itvsc);
/* Used by ivtv driver to announce the PCM data to the module */
void ivtv_alsa_announce_pcm_data(struct snd_ivtv_card *card, u8 *pcm_data,
size_t num_bytes);

2
drivers/media/pci/ivtv/ivtv-firmware.c
View file

@ -276,7 +276,7 @@ void ivtv_init_mpeg_decoder(struct ivtv *itv)
}
/* Try to restart the card & restore previous settings */
int ivtv_firmware_restart(struct ivtv *itv)
static int ivtv_firmware_restart(struct ivtv *itv)
{
int rc = 0;
v4l2_std_id std;

8
drivers/media/pci/ivtv/ivtv-i2c.c
View file

@ -200,21 +200,21 @@ static int ivtv_i2c_new_ir(struct ivtv *itv, u32 hw, const char *type, u8 addr)
init_data->ir_codes = RC_MAP_AVERMEDIA_CARDBUS;
init_data->internal_get_key_func =
IR_KBD_GET_KEY_AVERMEDIA_CARDBUS;
init_data->type = RC_TYPE_OTHER;
init_data->type = RC_BIT_OTHER;
init_data->name = "AVerMedia AVerTV card";
break;
case IVTV_HW_I2C_IR_RX_HAUP_EXT:
case IVTV_HW_I2C_IR_RX_HAUP_INT:
init_data->ir_codes = RC_MAP_HAUPPAUGE;
init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP;
init_data->type = RC_TYPE_RC5;
init_data->type = RC_BIT_RC5;
init_data->name = itv->card_name;
break;
case IVTV_HW_Z8F0811_IR_RX_HAUP:
/* Default to grey remote */
init_data->ir_codes = RC_MAP_HAUPPAUGE;
init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
init_data->type = RC_TYPE_RC5;
init_data->type = RC_BIT_RC5;
init_data->name = itv->card_name;
break;
case IVTV_HW_I2C_IR_RX_ADAPTEC:
@ -222,7 +222,7 @@ static int ivtv_i2c_new_ir(struct ivtv *itv, u32 hw, const char *type, u8 addr)
init_data->name = itv->card_name;
/* FIXME: The protocol and RC_MAP needs to be corrected */
init_data->ir_codes = RC_MAP_EMPTY;
init_data->type = RC_TYPE_UNKNOWN;
init_data->type = RC_BIT_UNKNOWN;
break;
}

4
drivers/media/pci/ivtv/ivtv-ioctl.c
View file

@ -993,7 +993,7 @@ int ivtv_s_input(struct file *file, void *fh, unsigned int inp)
v4l2_std_id std;
int i;
if (inp < 0 || inp >= itv->nof_inputs)
if (inp >= itv->nof_inputs)
return -EINVAL;
if (inp == itv->active_input) {
@ -1168,7 +1168,7 @@ void ivtv_s_std_dec(struct ivtv *itv, v4l2_std_id *std)
}
}
int ivtv_s_std(struct file *file, void *fh, v4l2_std_id *std)
static int ivtv_s_std(struct file *file, void *fh, v4l2_std_id *std)
{
struct ivtv *itv = fh2id(fh)->itv;

5
drivers/media/pci/mantis/mantis_input.c
View file

@ -18,6 +18,8 @@
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if 0 /* Currently unused */
#include <media/rc-core.h>
#include <linux/pci.h>
@ -150,10 +152,11 @@ out:
return err;
}
int mantis_exit(struct mantis_pci *mantis)
int mantis_init_exit(struct mantis_pci *mantis)
{
rc_unregister_device(mantis->rc);
rc_map_unregister(&ir_mantis_map);
return 0;
}
#endif

2
drivers/media/pci/mantis/mantis_uart.c
View file

@ -61,7 +61,7 @@ static struct {
#define UART_MAX_BUF 16
int mantis_uart_read(struct mantis_pci *mantis, u8 *data)
static int mantis_uart_read(struct mantis_pci *mantis, u8 *data)
{
struct mantis_hwconfig *config = mantis->hwconfig;
u32 stat = 0, i;

6
drivers/media/pci/mantis/mantis_vp1033.c
View file

@ -83,7 +83,7 @@ u8 lgtdqcs001f_inittab[] = {
#define MANTIS_MODEL_NAME "VP-1033"
#define MANTIS_DEV_TYPE "DVB-S/DSS"
int lgtdqcs001f_tuner_set(struct dvb_frontend *fe)
static int lgtdqcs001f_tuner_set(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct mantis_pci *mantis = fe->dvb->priv;
@ -115,8 +115,8 @@ int lgtdqcs001f_tuner_set(struct dvb_frontend *fe)
return 0;
}
int lgtdqcs001f_set_symbol_rate(struct dvb_frontend *fe,
u32 srate, u32 ratio)
static int lgtdqcs001f_set_symbol_rate(struct dvb_frontend *fe,
u32 srate, u32 ratio)
{
u8 aclk = 0;
u8 bclk = 0;

2
drivers/media/pci/meye/meye.c
View file

@ -1945,7 +1945,7 @@ static struct pci_driver meye_driver = {
static int __init meye_init(void)
{
gbuffers = max(2, min((int)gbuffers, MEYE_MAX_BUFNBRS));
if (gbufsize < 0 || gbufsize > MEYE_MAX_BUFSIZE)
if (gbufsize > MEYE_MAX_BUFSIZE)
gbufsize = MEYE_MAX_BUFSIZE;
gbufsize = PAGE_ALIGN(gbufsize);
printk(KERN_INFO "meye: using %d buffers with %dk (%dk total) "

4
drivers/media/pci/ngene/ngene-cards.c
View file

@ -425,8 +425,10 @@ static int ReadEEProm(struct i2c_adapter *adapter,
status = i2c_read_eeprom(adapter, 0x50, Addr, data, Length);
if (!status) {
*pLength = EETag[2];
#if 0
if (Length < EETag[2])
; /*status=STATUS_BUFFER_OVERFLOW; */
status = STATUS_BUFFER_OVERFLOW;
#endif
}
}
return status;

7
drivers/media/pci/ngene/ngene-core.c
View file

@ -752,8 +752,8 @@ void set_transfer(struct ngene_channel *chan, int state)
if (chan->mode & NGENE_IO_TSIN)
chan->pBufferExchange = tsin_exchange;
spin_unlock_irq(&chan->state_lock);
} else
;/* printk(KERN_INFO DEVICE_NAME ": lock=%08x\n",
}
/* else printk(KERN_INFO DEVICE_NAME ": lock=%08x\n",
ngreadl(0x9310)); */
ret = ngene_command_stream_control(dev, chan->number,
@ -1691,7 +1691,8 @@ int __devinit ngene_probe(struct pci_dev *pci_dev,
dev->i2c_current_bus = -1;
/* Register DVB adapters and devices for both channels */
if (init_channels(dev) < 0)
stat = init_channels(dev);
if (stat < 0)
goto fail2;
return 0;

3
drivers/media/pci/saa7134/saa7134-core.c
View file

@ -944,8 +944,7 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
/* board config */
dev->board = pci_id->driver_data;
if (card[dev->nr] >= 0 &&
card[dev->nr] < saa7134_bcount)
if ((unsigned)card[dev->nr] < saa7134_bcount)
dev->board = card[dev->nr];
if (SAA7134_BOARD_UNKNOWN == dev->board)
must_configure_manually(0);

2
drivers/media/pci/saa7134/saa7134-input.c
View file

@ -990,7 +990,7 @@ void saa7134_probe_i2c_ir(struct saa7134_dev *dev)
dev->init_data.name = "BeholdTV";
dev->init_data.get_key = get_key_beholdm6xx;
dev->init_data.ir_codes = RC_MAP_BEHOLD;
dev->init_data.type = RC_TYPE_NEC;
dev->init_data.type = RC_BIT_NEC;
info.addr = 0x2d;
break;
case SAA7134_BOARD_AVERMEDIA_CARDBUS_501:

2
drivers/media/pci/saa7134/saa7134-video.c
View file

@ -2511,7 +2511,7 @@ int saa7134_video_init1(struct saa7134_dev *dev)
/* sanitycheck insmod options */
if (gbuffers < 2 || gbuffers > VIDEO_MAX_FRAME)
gbuffers = 2;
if (gbufsize < 0 || gbufsize > gbufsize_max)
if (gbufsize > gbufsize_max)
gbufsize = gbufsize_max;
gbufsize = (gbufsize + PAGE_SIZE - 1) & PAGE_MASK;

26
drivers/media/pci/saa7164/saa7164-api.c
View file

@ -165,7 +165,7 @@ int saa7164_api_set_vbi_format(struct saa7164_port *port)
return ret;
}
int saa7164_api_set_gop_size(struct saa7164_port *port)
static int saa7164_api_set_gop_size(struct saa7164_port *port)
{
struct saa7164_dev *dev = port->dev;
struct tmComResEncVideoGopStructure gs;
@ -619,7 +619,7 @@ int saa7164_api_get_videomux(struct saa7164_port *port)
return ret;
}
int saa7164_api_set_dif(struct saa7164_port *port, u8 reg, u8 val)
static int saa7164_api_set_dif(struct saa7164_port *port, u8 reg, u8 val)
{
struct saa7164_dev *dev = port->dev;
@ -822,8 +822,8 @@ int saa7164_api_read_eeprom(struct saa7164_dev *dev, u8 *buf, int buflen)
&reg[0], 128, buf);
}
int saa7164_api_configure_port_vbi(struct saa7164_dev *dev,
struct saa7164_port *port)
static int saa7164_api_configure_port_vbi(struct saa7164_dev *dev,
struct saa7164_port *port)
{
struct tmComResVBIFormatDescrHeader *fmt = &port->vbi_fmt_ntsc;
@ -858,9 +858,10 @@ int saa7164_api_configure_port_vbi(struct saa7164_dev *dev,
return 0;
}
int saa7164_api_configure_port_mpeg2ts(struct saa7164_dev *dev,
struct saa7164_port *port,
struct tmComResTSFormatDescrHeader *tsfmt)
static int
saa7164_api_configure_port_mpeg2ts(struct saa7164_dev *dev,
struct saa7164_port *port,
struct tmComResTSFormatDescrHeader *tsfmt)
{
dprintk(DBGLVL_API, " bFormatIndex = 0x%x\n", tsfmt->bFormatIndex);
dprintk(DBGLVL_API, " bDataOffset = 0x%x\n", tsfmt->bDataOffset);
@ -892,9 +893,10 @@ int saa7164_api_configure_port_mpeg2ts(struct saa7164_dev *dev,
return 0;
}
int saa7164_api_configure_port_mpeg2ps(struct saa7164_dev *dev,
struct saa7164_port *port,
struct tmComResPSFormatDescrHeader *fmt)
static int
saa7164_api_configure_port_mpeg2ps(struct saa7164_dev *dev,
struct saa7164_port *port,
struct tmComResPSFormatDescrHeader *fmt)
{
dprintk(DBGLVL_API, " bFormatIndex = 0x%x\n", fmt->bFormatIndex);
dprintk(DBGLVL_API, " wPacketLength= 0x%x\n", fmt->wPacketLength);
@ -925,7 +927,7 @@ int saa7164_api_configure_port_mpeg2ps(struct saa7164_dev *dev,
return 0;
}
int saa7164_api_dump_subdevs(struct saa7164_dev *dev, u8 *buf, int len)
static int saa7164_api_dump_subdevs(struct saa7164_dev *dev, u8 *buf, int len)
{
struct saa7164_port *tsport = NULL;
struct saa7164_port *encport = NULL;
@ -1486,7 +1488,7 @@ int saa7164_api_i2c_write(struct saa7164_i2c *bus, u8 addr, u32 datalen,
return ret == SAA_OK ? 0 : -EIO;
}
int saa7164_api_modify_gpio(struct saa7164_dev *dev, u8 unitid,
static int saa7164_api_modify_gpio(struct saa7164_dev *dev, u8 unitid,
u8 pin, u8 state)
{
int ret;

6
drivers/media/pci/saa7164/saa7164-bus.c
View file

@ -81,7 +81,7 @@ void saa7164_bus_dump(struct saa7164_dev *dev)
}
/* Intensionally throw a BUG() if the state of the message bus looks corrupt */
void saa7164_bus_verify(struct saa7164_dev *dev)
static void saa7164_bus_verify(struct saa7164_dev *dev)
{
struct tmComResBusInfo *b = &dev->bus;
int bug = 0;
@ -106,8 +106,8 @@ void saa7164_bus_verify(struct saa7164_dev *dev)
}
}
void saa7164_bus_dumpmsg(struct saa7164_dev *dev, struct tmComResInfo* m,
void *buf)
static void saa7164_bus_dumpmsg(struct saa7164_dev *dev, struct tmComResInfo *m,
void *buf)
{
dprintk(DBGLVL_BUS, "Dumping msg structure:\n");
dprintk(DBGLVL_BUS, " .id = %d\n", m->id);

16
drivers/media/pci/saa7164/saa7164-cmd.c
View file

@ -23,7 +23,7 @@
#include "saa7164.h"
int saa7164_cmd_alloc_seqno(struct saa7164_dev *dev)
static int saa7164_cmd_alloc_seqno(struct saa7164_dev *dev)
{
int i, ret = -1;
@ -42,7 +42,7 @@ int saa7164_cmd_alloc_seqno(struct saa7164_dev *dev)
return ret;
}
void saa7164_cmd_free_seqno(struct saa7164_dev *dev, u8 seqno)
static void saa7164_cmd_free_seqno(struct saa7164_dev *dev, u8 seqno)
{
mutex_lock(&dev->lock);
if ((dev->cmds[seqno].inuse == 1) &&
@ -54,7 +54,7 @@ void saa7164_cmd_free_seqno(struct saa7164_dev *dev, u8 seqno)
mutex_unlock(&dev->lock);
}
void saa7164_cmd_timeout_seqno(struct saa7164_dev *dev, u8 seqno)
static void saa7164_cmd_timeout_seqno(struct saa7164_dev *dev, u8 seqno)
{
mutex_lock(&dev->lock);
if ((dev->cmds[seqno].inuse == 1) &&
@ -64,7 +64,7 @@ void saa7164_cmd_timeout_seqno(struct saa7164_dev *dev, u8 seqno)
mutex_unlock(&dev->lock);
}
u32 saa7164_cmd_timeout_get(struct saa7164_dev *dev, u8 seqno)
static u32 saa7164_cmd_timeout_get(struct saa7164_dev *dev, u8 seqno)
{
int ret = 0;
@ -132,7 +132,7 @@ int saa7164_irq_dequeue(struct saa7164_dev *dev)
/* Commands to the f/w get marshelled to/from this code then onto the PCI
* -bus/c running buffer. */
int saa7164_cmd_dequeue(struct saa7164_dev *dev)
static int saa7164_cmd_dequeue(struct saa7164_dev *dev)
{
int loop = 1;
int ret;
@ -186,8 +186,8 @@ int saa7164_cmd_dequeue(struct saa7164_dev *dev)
return SAA_OK;
}
int saa7164_cmd_set(struct saa7164_dev *dev, struct tmComResInfo *msg,
void *buf)
static int saa7164_cmd_set(struct saa7164_dev *dev, struct tmComResInfo *msg,
void *buf)
{
struct tmComResBusInfo *bus = &dev->bus;
u8 cmd_sent;
@ -259,7 +259,7 @@ out:
/* Wait for a signal event, without holding a mutex. Either return TIMEOUT if
* the event never occurred, or SAA_OK if it was signaled during the wait.
*/
int saa7164_cmd_wait(struct saa7164_dev *dev, u8 seqno)
static int saa7164_cmd_wait(struct saa7164_dev *dev, u8 seqno)
{
wait_queue_head_t *q = NULL;
int ret = SAA_BUS_TIMEOUT;

4
drivers/media/pci/saa7164/saa7164-core.c
View file

@ -410,7 +410,7 @@ static void saa7164_work_enchandler(struct work_struct *w)
} else
rp = (port->last_svc_rp + 1) % 8;
if ((rp < 0) || (rp > (port->hwcfg.buffercount - 1))) {
if (rp > (port->hwcfg.buffercount - 1)) {
printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
break;
}
@ -486,7 +486,7 @@ static void saa7164_work_vbihandler(struct work_struct *w)
} else
rp = (port->last_svc_rp + 1) % 8;
if ((rp < 0) || (rp > (port->hwcfg.buffercount - 1))) {
if (rp > (port->hwcfg.buffercount - 1)) {
printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
break;
}

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