milan5G: sar sensor bringup

1.add sx937x dts for milanf
  2.enable capsense_reset for headset

Change-Id: I651be46e437af445f224a20b837be1b41b7e26e0
Signed-off-by: weimh1 <weimh1@lenovo.com>
Reviewed-on: https://gerrit.mot.com/2048121
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Hujun Liao <liaohj@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
weimh1 2021-08-23 11:31:50 +08:00 • committed by panyq6
commit 7889e7d764

View file

@ -53,3 +53,135 @@
0x0 MMI_ANNOTATE_SIZE>;
};
};
&tlmm {
sar_int_default: sar_int_default {
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
num-grp-pins = <1>;
drive-strength = <2>;
bias-pull-up;
};
};
sar_int_sleep: sar_int_sleep {
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
num-grp-pins = <1>;
drive-strength = <2>;
bias-pull-up;
};
};
};
&qupv3_se10_i2c {
status = "okay";
sx937x:sx937x@2c {
compatible = "Semtech,sx937x";
reg = <0x2c>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&sar_int_default>;
pinctrl-1 = <&sar_int_sleep>;
interrupt-parent = <&tlmm>;
interrupts = <24 0x02>;
interrupt-names = "sx937x_irq";
Semtech,nirq-gpio = <&tlmm 24 0x02>;
cap_vdd-supply = <&pm6125_l9>;
/*use PH4/5/6 as the reference sensor
set it to 0xff if the ref-phases-x is not used*/
Semtech,ref-phases-a = <5>;
Semtech,ref-phases-b = <6>;
Semtech,ref-phases-c = <0xff>;
Semtech,button-flag = <0x1f>;
Semtech,reg-num = <75>;
Semtech,reg-init = <
0x8024 0x7F00 /*PHEN, Disable all Phases*/
0x4004 0x74 /*irq mask*/
0x8008 0x7F000081
0x4280 0x0
0x8020 0x32
0x8028 0x58E /*AFE_PARAM_PH0*/
0x8034 0x78E /*AFE_PARAM_PH1*/
0x8040 0x58E /*AFE_PARAM_PH2*/
0x804C 0x566 /*AFE_PARAM_PH3*/
0x8058 0x566 /*AFE_PARAM_PH4*/
0x8064 0x57E /*AFE_PARAM_PH5*/
0x8070 0x566 /*AFE_PARAM_PH6*/
0x807C 0x58D /*AFE_PARAM_PH7*/
/*set CS3 to hiz, because it used as IRQ pin*/
0x8030 0xFEF9FF /*REG_AFEPH_PH0, CS7, ANT1, Bottom center*/
0x803C 0xFFD9FF /*REG_AFEPH_PH1, CS4, ANT2, Top Left*/
0x8048 0xBFF9FF /*REG_AFEPH_PH2, CS5, ANT8, Bottom Right*/
0x8054 0xFFF9EF /*REG_AFEPH_PH3, CS1, ANT4, Right*/
0x8060 0xFFF9FD /*REG_AFEPH_PH4, CS0, ANT5, Back center*/
0x806C 0xF7F9FF /*REG_AFEPH_PH5, CS6, ANT1/8_REF, Bottom_Ref*/
0x8078 0xFFF97F /*REG_AFEPH_PH6, CS2, ANT4/5_REF, Middle*/
0x8084 0xBFF9FF /*REG_AFEPH_PH7, NOT USE*/
0x802C 0x0
0x8038 0xF3C3CF
0x8044 0x940250
0x8050 0x9BC26F
0x805C 0x990264
0x8068 0xD4C353
0x8074 0xB4C2D3
0x8080 0x0
0x8098 0x862D
0x80B8 0x782D
0x80D8 0x8774
0x80F8 0x785C
0x8118 0x5740
0x8138 0xF4
0x8158 0xF4
0x8178 0x0
0x80A0 0x222200E1
0x80C0 0x0
0x80E0 0x1E1E00E1
0x8100 0x2B2B00E2
0x8120 0xE2
0x8140 0x0
0x8160 0x0
0x8180 0x0
0x8188 0x8000015
0x818C 0x8000016
0x8190 0x0
0x8194 0x0
0x8090 0x46E87000
0x80B0 0x34F27000
0x80D0 0x50E87000
0x80F0 0x24E87000
0x8110 0x32E47000
0x8130 0x7000
0x8150 0x7000
0x8170 0x0
0x8088 0x200000
0x80A8 0x300000
0x80C8 0x300000
0x80E8 0x200000
0x8108 0x200000
0x8128 0x6500000
0x8148 0x6500000
0x8168 0x0
0x808C 0x60600019
0x80AC 0x60600019
0x80CC 0x60600019
0x80EC 0x60600019
0x810C 0x60600019
0x812C 0x60600019
0x814C 0x60600019
0x816C 0x0
0x8024 0x7F7F
0x4280 0xe
>;
status = "ok"
};
};