From fb67569025edea85d7b189c9b03b7f44e59156ce Mon Sep 17 00:00:00 2001 From: Ashok Vuyyuru Date: Thu, 17 Dec 2020 18:07:18 +0530 Subject: [PATCH] ARM: dts: msm: Adding IPA nodes for yupik target Adding IPA nodes for yupik target. Change-Id: If0a0c2d77117d51f2fe1e22258effba7984b777d --- qcom/yupik.dtsi | 148 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 148 insertions(+) diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi index 956f177295b5..622017c45b96 100644 --- a/qcom/yupik.dtsi +++ b/qcom/yupik.dtsi @@ -1620,6 +1620,18 @@ interrupt-controller; #interrupt-cells = <2>; }; + + smp2p_ipa_1_out: qcom,smp2p-ipa-1-out { + qcom,entry-name = "ipa"; + #qcom,smem-state-cells = <1>; + }; + + /* ipa - inbound entry from mss */ + smp2p_ipa_1_in: qcom,smp2p-ipa-1-in { + qcom,entry-name = "ipa"; + interrupt-controller; + #interrupt-cells = <2>; + }; }; qcom,smp2p-wpss { @@ -2744,6 +2756,142 @@ dma-coherent-hint-cached; }; }; + + qcom,msm_gsi { + compatible = "qcom,msm_gsi"; + }; + + qcom,rmnet-ipa { + compatible = "qcom,rmnet-ipa3"; + qcom,rmnet-ipa-ssr; + qcom,ipa-platform-type-msm; + qcom,ipa-advertise-sg-support; + qcom,ipa-napi-enable; + }; + + qcom,ipa_fws { + compatible = "qcom,pil-tz-generic"; + qcom,pas-id = <0xf>; + qcom,firmware-name = "yupik_ipa_fws"; + qcom,pil-force-shutdown; + memory-region = <&pil_ipa_gsi_mem>; + }; + + ipa_hw: qcom,ipa@1e00000 { + compatible = "qcom,ipa"; + mboxes = <&qmp_aop 0>; + reg = + <0x1e00000 0x84000>, + <0x1e04000 0x23000>; + reg-names = "ipa-base", "gsi-base"; + interrupts = + <0 654 IRQ_TYPE_LEVEL_HIGH>, + <0 432 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ipa-irq", "gsi-irq"; + qcom,ipa-hw-ver = <20>; /* IPA core version = IPAv4.11 */ + qcom,ipa-hw-mode = <0>; + qcom,platform-type = <1>; /* MSM platform */ + qcom,ee = <0>; + qcom,use-ipa-tethering-bridge; + qcom,modem-cfg-emb-pipe-flt; + qcom,ipa-wdi3-over-gsi; + qcom,arm-smmu; + qcom,smmu-fast-map; + qcom,use-64-bit-dma-mask; + qcom,ipa-endp-delay-wa-v2; + qcom,lan-rx-napi; + qcom,tx-napi; + qcom,wan-use-skb-page; + qcom,rmnet-ctl-enable; + qcom,ipa-uc-holb-monitor; + qcom,use-gsi-ipa-fw = "yupik_ipa_fws"; + qcom,gsi_wdi_db_polling; + qcom,ipa-holb-monitor-poll-period = <5>; + qcom,ipa-holb-monitor-max-cnt-wlan = <10>; + qcom,ipa-holb-monitor-max-cnt-usb = <10>; + qcom,ipa-holb-monitor-max-cnt-11ad = <10>; + qcom,tx-wrapper-cache-max-size = <400>; + qcom,ipa-gpi-event-rp-ddr; + clock-names = "core_clk"; + clocks = <&rpmhcc RPMH_IPA_CLK>; + qcom,interconnect,num-cases = <5>; + qcom,interconnect,num-paths = <3>; + interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_IPA_CFG>; + interconnect-names = "ipa_to_llcc", "llcc_to_ebi1", "appss_to_ipa"; + /* No vote */ + qcom,no-vote = + <0 0 0 0 0 0>; + + /* SVS2 */ + qcom,svs2 = + <150000 600000 150000 1804000 0 74000>; + + /* SVS */ + qcom,svs = + <625000 1200000 625000 3072000 0 150000>; + + /* NOMINAL */ + qcom,nominal = + <1250000 2400000 1250000 6220800 0 400000>; + + /* TURBO */ + qcom,turbo = + <2000000 3500000 2000000 7219200 0 400000>; + + qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", + "TURBO"; + qcom,throughput-threshold = <600 2500 5000>; + qcom,scaling-exceptions = <>; + + /* smp2p information */ + qcom,smp2p_map_ipa_1_out { + compatible = "qcom,smp2p-map-ipa-1-out"; + qcom,smem-states = <&smp2p_ipa_1_out 0>; + qcom,smem-state-names = "ipa-smp2p-out"; + }; + + qcom,smp2p_map_ipa_1_in { + compatible = "qcom,smp2p-map-ipa-1-in"; + interrupts-extended = <&smp2p_ipa_1_in 0 0>; + interrupt-names = "ipa-smp2p-in"; + }; + + ipa_smmu_ap: ipa_smmu_ap { + compatible = "qcom,ipa-smmu-ap-cb"; + iommus = <&apps_smmu 0x480 0x0>; + qcom,iommu-dma-addr-pool = <0x20000000 0x20000000>; + qcom,additional-mapping = + /* modem tables in IMEM */ + <0x146A8000 0x146A8000 0x2000>; + dma-coherent; + qcom,iommu-dma = "fastmap"; + qcom,ipa-q6-smem-size = <36864>; + }; + + ipa_smmu_wlan: ipa_smmu_wlan { + compatible = "qcom,ipa-smmu-wlan-cb"; + iommus = <&apps_smmu 0x481 0x0>; + qcom,iommu-dma = "atomic"; + dma-coherent; + }; + + ipa_smmu_uc: ipa_smmu_uc { + compatible = "qcom,ipa-smmu-uc-cb"; + iommus = <&apps_smmu 0x482 0x0>; + qcom,iommu-dma-addr-pool = <0x20000000 0x20000000>; + qcom,iommu-dma = "atomic"; + }; + + ipa_smmu_11ad: ipa_smmu_11ad { + compatible = "qcom,ipa-smmu-11ad-cb"; + iommus = <&apps_smmu 0x483 0x0>; + dma-coherent; + qcom,shared-cb; + qcom,iommu-group = <>; + }; + }; }; #include "shima-gdsc.dtsi"